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{
    "id": 249,
    "url": "https://patches.dpdk.org/api/patches/249/",
    "web_url": "https://patches.dpdk.org/patch/249/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk"
    },
    "msgid": "<1409105634-29980-4-git-send-email-jingjing.wu@intel.com>",
    "date": "2014-08-27T02:13:50",
    "name": "[dpdk-dev,v2,3/7] i40e: function implement in i40e for flow director filter programming",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "e2098f9f66b16e0e74523246a3d121ac8642f726",
    "submitter": {
        "id": 47,
        "url": "https://patches.dpdk.org/api/people/47/",
        "name": "Wu, Jingjing",
        "email": "jingjing.wu@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/patch/249/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/249/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/249/checks/",
    "tags": {},
    "headers": {
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Date": "Wed, 27 Aug 2014 10:13:50 +0800",
        "In-Reply-To": "<1409105634-29980-1-git-send-email-jingjing.wu@intel.com>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "X-BeenThere": "dev@dpdk.org",
        "References": "<1409105634-29980-1-git-send-email-jingjing.wu@intel.com>",
        "X-Mailer": "git-send-email 1.7.0.7",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "To": "dev@dpdk.org",
        "Received": [
            "from mga03.intel.com (mga03.intel.com [143.182.124.21])\n\tby dpdk.org (Postfix) with ESMTP id 5770C58EE\n\tfor <dev@dpdk.org>; Wed, 27 Aug 2014 04:10:48 +0200 (CEST)",
            "from azsmga001.ch.intel.com ([10.2.17.19])\n\tby azsmga101.ch.intel.com with ESMTP; 26 Aug 2014 19:14:47 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby azsmga001.ch.intel.com with ESMTP; 26 Aug 2014 19:14:27 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id s7R2EPlj005252;\n\tWed, 27 Aug 2014 10:14:25 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid s7R2EMS4030110; Wed, 27 Aug 2014 10:14:24 +0800",
            "(from wujingji@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s7R2EMdD030106; \n\tWed, 27 Aug 2014 10:14:22 +0800"
        ],
        "From": "Jingjing Wu <jingjing.wu@intel.com>",
        "Precedence": "list",
        "X-ExtLoop1": "1",
        "Message-Id": "<1409105634-29980-4-git-send-email-jingjing.wu@intel.com>",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "Subject": "[dpdk-dev] [PATCH v2 3/7] i40e: function implement in i40e for flow\n\tdirector filter programming",
        "X-List-Received-Date": "Wed, 27 Aug 2014 02:10:53 -0000",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "Return-Path": "<wujingji@shecgisg004.sh.intel.com>",
        "X-IronPort-AV": "E=Sophos;i=\"5.04,408,1406617200\"; d=\"scan'208\";a=\"473000504\"",
        "List-Post": "<mailto:dev@dpdk.org>",
        "X-Mailman-Version": "2.1.15"
    },
    "content": "support the API ops defined in ethdev, the behavior according to each command:\n  RTE_CMD_FDIR_RULE_ADD: add a new FDIR filter rule.\n  RTE_CMD_FDIR_RULE_DEL: delete a FDIR filter rule.\n \nSigned-off-by: jingjing.wu <jingjing.wu@intel.com>\nReviewed-by: Helin Zhang <helin.zhang@intel.com>\nReviewed-by: Jing Chen <jing.d.chen@intel.com>\nReviewed-by: Jijiang Liu <jijiang.liu@intel.com>\n \n---\n lib/librte_pmd_i40e/Makefile      |   4 +\n lib/librte_pmd_i40e/i40e_ethdev.c |  43 ++++++++\n lib/librte_pmd_i40e/i40e_ethdev.h |   7 ++\n lib/librte_pmd_i40e/i40e_fdir.c   | 225 ++++++++++++++++++++++++++++++++++++++\n lib/librte_pmd_i40e/rte_i40e.h    | 111 +++++++++++++++++++\n 5 files changed, 390 insertions(+)\n create mode 100644 lib/librte_pmd_i40e/rte_i40e.h",
    "diff": "diff --git a/lib/librte_pmd_i40e/Makefile b/lib/librte_pmd_i40e/Makefile\nindex 6537654..3da20c5 100644\n--- a/lib/librte_pmd_i40e/Makefile\n+++ b/lib/librte_pmd_i40e/Makefile\n@@ -88,6 +88,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_rxtx.c\n SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_ethdev_vf.c\n SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_pf.c\n SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_fdir.c\n+\n+# install this header file\n+SYMLINK-$(CONFIG_RTE_LIBRTE_I40E_PMD)-include := rte_i40e.h\n+\n # this lib depends upon:\n DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_eal lib/librte_ether\n DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_mempool lib/librte_mbuf\ndiff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c\nindex a08b43c..7dcf964 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.c\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.c\n@@ -48,6 +48,7 @@\n #include <rte_malloc.h>\n #include <rte_memcpy.h>\n #include <rte_dev.h>\n+#include <rte_eth_features.h>\n \n #include \"i40e_logs.h\"\n #include \"i40e/i40e_register_x710_int.h\"\n@@ -205,6 +206,9 @@ static int i40e_dev_rss_hash_update(struct rte_eth_dev *dev,\n \t\t\t\t    struct rte_eth_rss_conf *rss_conf);\n static int i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev,\n \t\t\t\t      struct rte_eth_rss_conf *rss_conf);\n+static int i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev,\n+\t\t\t\t\t     enum rte_eth_command cmd,\n+\t\t\t\t\t     void *args);\n \n /* Default hash key buffer for RSS */\n static uint32_t rss_key_default[I40E_PFQF_HKEY_MAX_INDEX + 1];\n@@ -256,6 +260,7 @@ static struct eth_dev_ops i40e_eth_dev_ops = {\n \t.reta_query                   = i40e_dev_rss_reta_query,\n \t.rss_hash_update              = i40e_dev_rss_hash_update,\n \t.rss_hash_conf_get            = i40e_dev_rss_hash_conf_get,\n+\t.rx_classification_filter_ctl = i40e_rx_classification_filter_ctl,\n };\n \n static struct eth_driver rte_i40e_pmd = {\n@@ -4185,3 +4190,41 @@ i40e_pf_config_mq_rx(struct i40e_pf *pf)\n \n \treturn 0;\n }\n+\n+static int\n+i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev,\n+\t\t\t\t  enum rte_eth_command cmd,\n+\t\t\t\t  void *args)\n+{\n+\tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct rte_i40e_fdir_entry *fdir_entry = NULL;\n+\tint ret = I40E_SUCCESS;\n+\n+\tswitch (cmd) {\n+\tcase RTE_CMD_FDIR_RULE_ADD:\n+\t\tif (args == NULL)\n+\t\t\treturn I40E_ERR_PARAM;\n+\t\tfdir_entry = (struct rte_i40e_fdir_entry *)args;\n+\t\tret = i40e_fdir_filter_programming(pf,\n+\t\t\tfdir_entry->soft_id,\n+\t\t\t&fdir_entry->input,\n+\t\t\t&fdir_entry->action,\n+\t\t\tTRUE);\n+\t\tbreak;\n+\tcase RTE_CMD_FDIR_RULE_DEL:\n+\t\tif (args == NULL)\n+\t\t\treturn I40E_ERR_PARAM;\n+\t\tfdir_entry = (struct rte_i40e_fdir_entry *)args;\n+\t\tret = i40e_fdir_filter_programming(pf,\n+\t\t\tfdir_entry->soft_id,\n+\t\t\t&fdir_entry->input,\n+\t\t\t&fdir_entry->action,\n+\t\t\tFALSE);\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"unknown command type %u\\n\", cmd);\n+\t\tret = I40E_ERR_PARAM;\n+\t\tbreak;\n+\t}\n+\treturn ret;\n+}\ndiff --git a/lib/librte_pmd_i40e/i40e_ethdev.h b/lib/librte_pmd_i40e/i40e_ethdev.h\nindex c2c7fa9..5edb99e 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.h\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.h\n@@ -34,6 +34,8 @@\n #ifndef _I40E_ETHDEV_H_\n #define _I40E_ETHDEV_H_\n \n+#include \"rte_i40e.h\"\n+\n #define I40E_AQ_LEN               32\n #define I40E_AQ_BUF_SZ            4096\n /* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */\n@@ -332,6 +334,11 @@ i40e_fdir_setup_rx_resources(struct i40e_pf *pf,\n \t\t\t\t    unsigned int socket_id);\n int i40e_fdir_setup(struct i40e_pf *pf);\n void i40e_fdir_teardown(struct i40e_pf *pf);\n+int i40e_fdir_filter_programming(struct i40e_pf *pf,\n+\t\t\tuint16_t soft_id,\n+\t\t\tstruct rte_i40e_fdir_input *fdir_filter,\n+\t\t\tstruct rte_i40e_fdir_action *fdir_action,\n+\t\t\tbool add);\n \n /* I40E_DEV_PRIVATE_TO */\n #define I40E_DEV_PRIVATE_TO_PF(adapter) \\\ndiff --git a/lib/librte_pmd_i40e/i40e_fdir.c b/lib/librte_pmd_i40e/i40e_fdir.c\nindex f6297a8..df9a889 100644\n--- a/lib/librte_pmd_i40e/i40e_fdir.c\n+++ b/lib/librte_pmd_i40e/i40e_fdir.c\n@@ -48,11 +48,21 @@\n #include \"i40e/i40e_type.h\"\n #include \"i40e_ethdev.h\"\n #include \"i40e_rxtx.h\"\n+/* Wait count and inteval for fdir filter programming */\n+#define I40E_FDIR_WAIT_COUNT       10\n+#define I40E_FDIR_WAIT_INTERVAL_US 1000\n \n #define I40E_COUNTER_PF           2\n /* Statistic counter index for one pf */\n #define I40E_COUNTER_INDEX_FDIR(pf_id)   (0 + (pf_id) * I40E_COUNTER_PF)\n \n+#ifndef RTE_MBUF_DATA_DMA_ADDR\n+#define RTE_MBUF_DATA_DMA_ADDR(mb) \\\n+\t((uint64_t)((mb)->buf_physaddr + \\\n+\t(uint64_t)((char *)((mb)->pkt.data) - \\\n+\t(char *)(mb)->buf_addr)))\n+#endif\n+\n static int\n i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq)\n {\n@@ -206,3 +216,218 @@ i40e_fdir_teardown(struct i40e_pf *pf)\n \tpf->fdir.fdir_vsi = NULL;\n \treturn;\n }\n+\n+/* Construct the tx flags */\n+static inline uint64_t\n+i40e_build_ctob(uint32_t td_cmd,\n+\t\tuint32_t td_offset,\n+\t\tunsigned int size,\n+\t\tuint32_t td_tag)\n+{\n+\treturn rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DATA |\n+\t\t\t((uint64_t)td_cmd  << I40E_TXD_QW1_CMD_SHIFT) |\n+\t\t\t((uint64_t)td_offset << I40E_TXD_QW1_OFFSET_SHIFT) |\n+\t\t\t((uint64_t)size  << I40E_TXD_QW1_TX_BUF_SZ_SHIFT) |\n+\t\t\t((uint64_t)td_tag  << I40E_TXD_QW1_L2TAG1_SHIFT));\n+}\n+\n+/*\n+ * check the programming status descriptor in rx queue.\n+ * done after Programming Flow Director is programmed on\n+ * tx queue\n+ */\n+static inline int\n+i40e_check_fdir_programming_status(struct i40e_rx_queue *rxq)\n+{\n+\tvolatile union i40e_rx_desc *rxdp;\n+\tuint64_t qword1;\n+\tuint32_t rx_status;\n+\tuint32_t len, id;\n+\tuint32_t error;\n+\tint ret = 0;\n+\n+\trxdp = &rxq->rx_ring[rxq->rx_tail];\n+\tqword1 = rte_le_to_cpu_64(rxdp->wb.qword1.status_error_len);\n+\trx_status = (qword1 & I40E_RXD_QW1_STATUS_MASK)\n+\t\t\t>> I40E_RXD_QW1_STATUS_SHIFT;\n+\n+\tif (rx_status & (1 << I40E_RX_DESC_STATUS_DD_SHIFT)) {\n+\t\tlen = qword1 >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT;\n+\t\tid = (qword1 & I40E_RX_PROG_STATUS_DESC_QW1_PROGID_MASK) >>\n+\t\t\t    I40E_RX_PROG_STATUS_DESC_QW1_PROGID_SHIFT;\n+\n+\t\tif (len  == I40E_RX_PROG_STATUS_DESC_LENGTH &&\n+\t\t    id == I40E_RX_PROG_STATUS_DESC_FD_FILTER_STATUS) {\n+\t\t\terror = (qword1 &\n+\t\t\t\tI40E_RX_PROG_STATUS_DESC_QW1_ERROR_MASK) >>\n+\t\t\t\tI40E_RX_PROG_STATUS_DESC_QW1_ERROR_SHIFT;\n+\t\t\tif (error == (0x1 <<\n+\t\t\t\tI40E_RX_PROG_STATUS_DESC_FD_TBL_FULL_SHIFT)) {\n+\t\t\t\tPMD_DRV_LOG(ERR, \"Failed to add FDIR filter\"\n+\t\t\t\t\t    \" (FD_ID %u): programming status\"\n+\t\t\t\t\t    \" reported\\n\",\n+\t\t\t\t\t    rxdp->wb.qword0.hi_dword.fd_id);\n+\t\t\t\tret = -1;\n+\t\t\t} else if (error == (0x1 <<\n+\t\t\t\tI40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) {\n+\t\t\t\tPMD_DRV_LOG(ERR, \"Failed to delete FDIR filter\"\n+\t\t\t\t\t    \" (FD_ID %u): programming status\"\n+\t\t\t\t\t    \" reported\\n\",\n+\t\t\t\t\t    rxdp->wb.qword0.hi_dword.fd_id);\n+\t\t\t\tret = -1;\n+\t\t\t} else\n+\t\t\t\tPMD_DRV_LOG(ERR, \"invalid programming status\"\n+\t\t\t\t\t    \" reported, error = %u\\n\", error);\n+\t\t} else\n+\t\t\tPMD_DRV_LOG(ERR, \"unknown programming status\"\n+\t\t\t\t    \" reported,len = %d, id = %u\\n\", len, id);\n+\t\trxdp->wb.qword1.status_error_len = 0;\n+\t\trxq->rx_tail++;\n+\t\tif (unlikely(rxq->rx_tail == rxq->nb_rx_desc))\n+\t\t\trxq->rx_tail = 0;\n+\t}\n+\treturn ret;\n+}\n+\n+/*\n+ * Program a flow diretor filter rule.\n+ * Is done by Flow Director Programming\n+ * Descriptor  followed by packet structure that contains the filter fields\n+ * need to match.\n+ */\n+int\n+i40e_fdir_filter_programming(struct i40e_pf *pf,\n+\t\t\tuint16_t soft_id,\n+\t\t\tstruct rte_i40e_fdir_input *fdir_input,\n+\t\t\tstruct rte_i40e_fdir_action *fdir_action,\n+\t\t\tbool add)\n+{\n+\tstruct i40e_tx_queue *txq = pf->fdir.txq;\n+\tstruct i40e_rx_queue *rxq = pf->fdir.rxq;\n+\tvolatile struct i40e_tx_desc *txdp;\n+\tstruct rte_mbuf *mbuf = fdir_input->data;\n+\tvolatile struct i40e_filter_program_desc *fdirdp;\n+\tuint64_t dma_addr;\n+\tuint32_t td_cmd;\n+\tuint16_t i;\n+\tuint8_t dest;\n+\n+\tif (!(pf->flags & I40E_FLAG_FDIR)) {\n+\t\tPMD_DRV_LOG(ERR, \"unsupported operation,\"\n+\t\t\t\t \"FDIR is not enabled.\\n\");\n+\t\treturn I40E_NOT_SUPPORTED;\n+\t}\n+\n+\tPMD_DRV_LOG(INFO, \"filling filter prgramming descriptor\\n\");\n+\tfdirdp = (volatile struct i40e_filter_program_desc *)\n+\t\t\t(&(txq->tx_ring[txq->tx_tail]));\n+\n+\tfdirdp->qindex_flex_ptype_vsi =\n+\t\t\trte_cpu_to_le_32((fdir_action->rx_queue <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_QINDEX_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_QINDEX_MASK);\n+\n+\tfdirdp->qindex_flex_ptype_vsi |=\n+\t\t\trte_cpu_to_le_32((fdir_input->flex_off <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_FLEXOFF_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_FLEXOFF_MASK);\n+\n+\tfdirdp->qindex_flex_ptype_vsi |=\n+\t\t\trte_cpu_to_le_32((fdir_input->pctype <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_PCTYPE_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_PCTYPE_MASK);\n+\n+\t/* Use LAN VSI Id if not programmed by user */\n+\tif (fdir_input->dest_vsi == 0)\n+\t\tfdirdp->qindex_flex_ptype_vsi |=\n+\t\t\trte_cpu_to_le_32((pf->main_vsi->vsi_id <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_DEST_VSI_MASK);\n+\telse\n+\t\tfdirdp->qindex_flex_ptype_vsi |=\n+\t\t\trte_cpu_to_le_32((fdir_input->dest_vsi <<\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) &\n+\t\t\t\t\t  I40E_TXD_FLTR_QW0_DEST_VSI_MASK);\n+\n+\tfdirdp->dtype_cmd_cntindex =\n+\t\t\trte_cpu_to_le_32(I40E_TX_DESC_DTYPE_FILTER_PROG);\n+\n+\tif (add)\n+\t\tfdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32(\n+\t\t\t\tI40E_FILTER_PROGRAM_DESC_PCMD_ADD_UPDATE <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_PCMD_SHIFT);\n+\telse\n+\t\tfdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32(\n+\t\t\t\tI40E_FILTER_PROGRAM_DESC_PCMD_REMOVE <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_PCMD_SHIFT);\n+\n+\tif (fdir_action->drop == RTE_I40E_DEST_DROP_PACKET)\n+\t\tdest = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;\n+\telse\n+\t\tdest = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;\n+\tfdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32((dest <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_DEST_SHIFT) &\n+\t\t\t\tI40E_TXD_FLTR_QW1_DEST_MASK);\n+\n+\tfdirdp->dtype_cmd_cntindex |=\n+\t\trte_cpu_to_le_32((fdir_action->report_status<<\n+\t\t\t\tI40E_TXD_FLTR_QW1_FD_STATUS_SHIFT) &\n+\t\t\t\tI40E_TXD_FLTR_QW1_FD_STATUS_MASK);\n+\n+\tfdirdp->dtype_cmd_cntindex |=\n+\t\t\trte_cpu_to_le_32(I40E_TXD_FLTR_QW1_CNT_ENA_MASK);\n+\tif (fdir_action->cnt_index != 0)\n+\t\tfdirdp->dtype_cmd_cntindex |=\n+\t\t\t\trte_cpu_to_le_32((fdir_action->cnt_index <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) &\n+\t\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_MASK);\n+\telse\n+\t\tfdirdp->dtype_cmd_cntindex |=\n+\t\t\t\trte_cpu_to_le_32((pf->fdir.match_counter_index <<\n+\t\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) &\n+\t\t\t\tI40E_TXD_FLTR_QW1_CNTINDEX_MASK);\n+\n+\tfdirdp->fd_id = rte_cpu_to_le_32(soft_id);\n+\ttxq->tx_tail++;\n+\tif (txq->tx_tail >= txq->nb_tx_desc)\n+\t\ttxq->tx_tail = 0;\n+\n+\tPMD_DRV_LOG(INFO, \"filling transmit descriptor\\n\");\n+\ttxdp = &(txq->tx_ring[txq->tx_tail]);\n+\tdma_addr = RTE_MBUF_DATA_DMA_ADDR(mbuf);\n+\ttxdp->buffer_addr = rte_cpu_to_le_64(dma_addr);\n+\ttd_cmd = I40E_TX_DESC_CMD_EOP |\n+\t\t I40E_TX_DESC_CMD_RS  |\n+\t\t I40E_TX_DESC_CMD_DUMMY;\n+\n+\ttxdp->cmd_type_offset_bsz =\n+\t\ti40e_build_ctob(td_cmd, 0,\n+\t\t\t\tmbuf->pkt.data_len, 0);\n+\n+\ttxq->tx_tail++;\n+\tif (txq->tx_tail >= txq->nb_tx_desc)\n+\t\ttxq->tx_tail = 0;\n+\t/* Update the tx tail register */\n+\trte_wmb();\n+\tI40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);\n+\n+\tfor (i = 0; i < I40E_FDIR_WAIT_COUNT; i++) {\n+\t\trte_delay_us(I40E_FDIR_WAIT_INTERVAL_US);\n+\t\tif (txdp->cmd_type_offset_bsz &\n+\t\t\t\trte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE))\n+\t\t\tbreak;\n+\t}\n+\tif (i >= I40E_FDIR_WAIT_COUNT) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to program FDIR filter:\"\n+\t\t\t    \" timeout to get DD on tx queue\\n\");\n+\t\treturn I40E_ERR_TIMEOUT;\n+\t}\n+\t/* totally delay 10 ms to check programming status*/\n+\trte_delay_us((I40E_FDIR_WAIT_COUNT - i) * I40E_FDIR_WAIT_INTERVAL_US);\n+\tif (i40e_check_fdir_programming_status(rxq) < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to program FDIR filter:\"\n+\t\t\t    \" programming status reported\\n\");\n+\t\treturn I40E_ERR_CONFIG;\n+\t}\n+\treturn I40E_SUCCESS;\n+}\ndiff --git a/lib/librte_pmd_i40e/rte_i40e.h b/lib/librte_pmd_i40e/rte_i40e.h\nnew file mode 100644\nindex 0000000..3d9cc3d\n--- /dev/null\n+++ b/lib/librte_pmd_i40e/rte_i40e.h\n@@ -0,0 +1,111 @@\n+/*-\n+ *   BSD LICENSE\n+ *\n+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n+ *   All rights reserved.\n+ *\n+ *   Redistribution and use in source and binary forms, with or without\n+ *   modification, are permitted provided that the following conditions\n+ *   are met:\n+ *\n+ *     * Redistributions of source code must retain the above copyright\n+ *       notice, this list of conditions and the following disclaimer.\n+ *     * Redistributions in binary form must reproduce the above copyright\n+ *       notice, this list of conditions and the following disclaimer in\n+ *       the documentation and/or other materials provided with the\n+ *       distribution.\n+ *     * Neither the name of Intel Corporation nor the names of its\n+ *       contributors may be used to endorse or promote products derived\n+ *       from this software without specific prior written permission.\n+ *\n+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _RTE_I40E_H_\n+#define _RTE_I40E_H_\n+\n+/**\n+ * @file\n+ *\n+ * RTE I40E\n+ *\n+ * The I40E defines the commands and structures specifically for i40e hardware\n+ * features. As different types of NIC hardware may have different features,\n+ * they might not be common for all types of NIC hardwares. The commands and\n+ * structures can be used in applications directly together with generalized\n+ * APIs declared in rte_ethdev.h. The commands couldn't be supported by\n+ * non-i40e PMD.\n+ */\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#define I40E_FDIR_PKT_LEN                   512\n+#define I40E_FDIR_IP_DEFAULT_LEN            0x003C\n+#define I40E_FDIR_IP_DEFAULT_TTL            0x40\n+#define I40E_FDIR_IP_DEFAULT_VERSION_IHL    0x45\n+#define I40E_FDIR_TCP_DEFAULT_DATAOFF       0x50\n+#define I40E_FDIR_IPv6_DEFAULT_VTC_FLOW     0x60300000\n+#define I40E_FDIR_IPv6_DEFAULT_PAYLOAD_LEN  0x0014\n+#define I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS   0xFF\n+#define I40E_FDIR_UDP_DEFAULT_LEN           0x0028\n+\n+enum rte_i40e_fdir_status {\n+\tRTE_I40E_FDIR_NO_REPORT_STATUS = 0, /**< no report FDIR. */\n+\tRTE_I40E_FDIR_REPORT_FD_ID,         /**< only report FD ID. */\n+\tRTE_I40E_FDIR_REPORT_FD_ID_FLEX_4,  /**< report FD ID and 4 flex bytes. */\n+\tRTE_I40E_FDIR_REPORT_FLEX_8,        /**< report 8 flex bytes. */\n+};\n+\n+#define RTE_I40E_DEST_DROP_PACKET          0x01\n+#define RTE_I40E_DEST_DIRECT_PACKET_QINDEX 0x02\n+\n+/**\n+ * A structure used to define the input for an flow director filter entry\n+ */\n+struct rte_i40e_fdir_input {\n+\tuint8_t  pctype;\n+\tuint8_t  flex_off;\n+\tuint16_t dest_vsi;      /**< destination VSI ID*/\n+\tstruct rte_mbuf *data;  /**< mbuf store raw packet used to program */\n+};\n+\n+/**\n+ * A structure used to define an action when match FDIR packet filter.\n+ */\n+struct rte_i40e_fdir_action {\n+\tuint16_t rx_queue;        /**< queue assigned to if fdir match. */\n+\tuint16_t cnt_index;       /**< statistic count index */\n+\tuint8_t  drop;            /**< accept or reject */\n+\tenum rte_i40e_fdir_status report_status;  /**< status report. */\n+};\n+\n+/**\n+ * For commands:\n+ * 'RTE_CMD_FDIR_RULE_ADD'\n+ * 'RTE_CMD_FDIR_RULE_DEL'\n+ *\n+ * A structure used to define the flow director filter entry\n+ */\n+struct rte_i40e_fdir_entry {\n+\tuint16_t soft_id;                   /**< id */\n+\tstruct rte_i40e_fdir_input input;   /**< input set */\n+\tstruct rte_i40e_fdir_action action; /**< action taken when match */\n+};\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_I40E_H_ */\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "3/7"
    ]
}