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GET /api/patches/2329/?format=api
{ "id": 2329, "url": "https://patches.dpdk.org/api/patches/2329/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1421375468-18083-2-git-send-email-jijiang.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1421375468-18083-2-git-send-email-jijiang.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1421375468-18083-2-git-send-email-jijiang.liu@intel.com", "date": "2015-01-16T02:31:07", "name": "[dpdk-dev,1/2] i40e:support i40e TSO", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "36196b6e99e44425634c8852804828f1a11a8448", "submitter": { "id": 52, "url": "https://patches.dpdk.org/api/people/52/?format=api", "name": "Jijiang Liu", "email": "jijiang.liu@intel.com" }, "delegate": { "id": 24, "url": "https://patches.dpdk.org/api/users/24/?format=api", "username": "helin_zhang", "first_name": "Helin", "last_name": "Zhang", "email": "helin.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1421375468-18083-2-git-send-email-jijiang.liu@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/2329/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/2329/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 23B045A82;\n\tFri, 16 Jan 2015 03:31:20 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 51AB15A82\n\tfor <dev@dpdk.org>; Fri, 16 Jan 2015 03:31:18 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby fmsmga101.fm.intel.com with ESMTP; 15 Jan 2015 18:31:17 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 15 Jan 2015 18:31:16 -0800", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t0G2VEuH018628;\n\tFri, 16 Jan 2015 10:31:14 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t0G2VCa4018126; Fri, 16 Jan 2015 10:31:14 +0800", "(from jijiangl@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t0G2VC98018122; \n\tFri, 16 Jan 2015 10:31:12 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.09,407,1418112000\"; d=\"scan'208\";a=\"670799170\"", "From": "Jijiang Liu <jijiang.liu@intel.com>", "To": "dev@dpdk.org", "Date": "Fri, 16 Jan 2015 10:31:07 +0800", "Message-Id": "<1421375468-18083-2-git-send-email-jijiang.liu@intel.com>", "X-Mailer": "git-send-email 1.7.12.2", "In-Reply-To": "<1421375468-18083-1-git-send-email-jijiang.liu@intel.com>", "References": "<1421375468-18083-1-git-send-email-jijiang.liu@intel.com>", "Subject": "[dpdk-dev] [PATCH 1/2] i40e:support i40e TSO", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch enables i40e TSO feature for both non-tunneling packet and UDP tunneling packet.\n\nSigned-off-by: Jijiang Liu <jijiang.liu@intel.com>\nSigned-off-by: Miroslaw Walukiewicz <miroslaw.walukiewicz@intel.com>\n---\n lib/librte_pmd_i40e/i40e_ethdev.c | 3 +-\n lib/librte_pmd_i40e/i40e_rxtx.c | 111 +++++++++++++++++++++++++++---------\n lib/librte_pmd_i40e/i40e_rxtx.h | 13 ++++\n 3 files changed, 98 insertions(+), 29 deletions(-)", "diff": "diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c\nindex b47a3d2..af95296 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.c\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.c\n@@ -1516,7 +1516,8 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \t\tDEV_TX_OFFLOAD_IPV4_CKSUM |\n \t\tDEV_TX_OFFLOAD_UDP_CKSUM |\n \t\tDEV_TX_OFFLOAD_TCP_CKSUM |\n-\t\tDEV_TX_OFFLOAD_SCTP_CKSUM;\n+\t\tDEV_TX_OFFLOAD_SCTP_CKSUM |\n+\t\tDEV_TX_OFFLOAD_TCP_TSO;\n \tdev_info->reta_size = pf->hash_lut_size;\n \n \tdev_info->default_rxconf = (struct rte_eth_rxconf) {\ndiff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c\nindex 2beae3c..529ffb2 100644\n--- a/lib/librte_pmd_i40e/i40e_rxtx.c\n+++ b/lib/librte_pmd_i40e/i40e_rxtx.c\n@@ -460,18 +460,15 @@ static inline void\n i40e_txd_enable_checksum(uint64_t ol_flags,\n \t\t\tuint32_t *td_cmd,\n \t\t\tuint32_t *td_offset,\n-\t\t\tuint8_t l2_len,\n-\t\t\tuint16_t l3_len,\n-\t\t\tuint8_t outer_l2_len,\n-\t\t\tuint16_t outer_l3_len,\n+\t\t\tunion i40e_tx_offload tx_offload,\n \t\t\tuint32_t *cd_tunneling)\n {\n-\tif (!l2_len) {\n+\tif (!tx_offload.l2_len) {\n \t\tPMD_DRV_LOG(DEBUG, \"L2 length set to 0\");\n \t\treturn;\n \t}\n \n-\tif (!l3_len) {\n+\tif (!tx_offload.l3_len) {\n \t\tPMD_DRV_LOG(DEBUG, \"L3 length set to 0\");\n \t\treturn;\n \t}\n@@ -479,7 +476,7 @@ i40e_txd_enable_checksum(uint64_t ol_flags,\n \t/* UDP tunneling packet TX checksum offload */\n \tif (unlikely(ol_flags & PKT_TX_UDP_TUNNEL_PKT)) {\n \n-\t\t*td_offset |= (outer_l2_len >> 1)\n+\t\t*td_offset |= (tx_offload.outer_l2_len >> 1)\n \t\t\t\t<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;\n \n \t\tif (ol_flags & PKT_TX_OUTER_IP_CKSUM)\n@@ -490,26 +487,36 @@ i40e_txd_enable_checksum(uint64_t ol_flags,\n \t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6;\n \n \t\t/* Now set the ctx descriptor fields */\n-\t\t*cd_tunneling |= (outer_l3_len >> 2) <<\n+\t\t*cd_tunneling |= (tx_offload.outer_l3_len >> 2) <<\n \t\t\t\tI40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |\n \t\t\t\tI40E_TXD_CTX_UDP_TUNNELING |\n-\t\t\t\t(l2_len >> 1) <<\n+\t\t\t\t(tx_offload.l2_len >> 1) <<\n \t\t\t\tI40E_TXD_CTX_QW0_NATLEN_SHIFT;\n \n \t} else\n-\t\t*td_offset |= (l2_len >> 1)\n+\t\t*td_offset |= (tx_offload.l2_len >> 1)\n \t\t\t<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;\n \n \t/* Enable L3 checksum offloads */\n \tif (ol_flags & PKT_TX_IPV4_CSUM) {\n \t\t*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4_CSUM;\n-\t\t*td_offset |= (l3_len >> 2) << I40E_TX_DESC_LENGTH_IPLEN_SHIFT;\n+\t\t*td_offset |= (tx_offload.l3_len >> 2)\n+\t\t\t\t<< I40E_TX_DESC_LENGTH_IPLEN_SHIFT;\n \t} else if (ol_flags & PKT_TX_IPV4) {\n \t\t*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4;\n-\t\t*td_offset |= (l3_len >> 2) << I40E_TX_DESC_LENGTH_IPLEN_SHIFT;\n+\t\t*td_offset |= (tx_offload.l3_len >> 2)\n+\t\t\t\t<< I40E_TX_DESC_LENGTH_IPLEN_SHIFT;\n \t} else if (ol_flags & PKT_TX_IPV6) {\n \t\t*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV6;\n-\t\t*td_offset |= (l3_len >> 2) << I40E_TX_DESC_LENGTH_IPLEN_SHIFT;\n+\t\t*td_offset |= (tx_offload.l3_len >> 2)\n+\t\t\t\t<< I40E_TX_DESC_LENGTH_IPLEN_SHIFT;\n+\t}\n+\n+\tif (ol_flags & PKT_TX_TCP_SEG) {\n+\t\t*td_cmd |= I40E_TX_DESC_CMD_L4T_EOFT_TCP;\n+\t\t*td_offset |= (tx_offload.l4_len >> 2)\n+\t\t\t\t<< I40E_TX_DESC_LENGTH_L4_FC_LEN_SHIFT;\n+\t\treturn;\n \t}\n \n \t/* Enable L4 checksum offloads */\n@@ -1160,8 +1167,11 @@ i40e_calc_context_desc(uint64_t flags)\n {\n \tuint64_t mask = 0ULL;\n \n-\tif (flags | PKT_TX_UDP_TUNNEL_PKT)\n+\tif (flags & PKT_TX_UDP_TUNNEL_PKT)\n \t\tmask |= PKT_TX_UDP_TUNNEL_PKT;\n+\tif (flags & PKT_TX_TCP_SEG)\n+\t\t/* need for context descriptor when TSO enabled */\n+\t\tmask |= PKT_TX_TCP_SEG;\n \n #ifdef RTE_LIBRTE_IEEE1588\n \tmask |= PKT_TX_IEEE1588_TMST;\n@@ -1172,6 +1182,47 @@ i40e_calc_context_desc(uint64_t flags)\n \treturn 0;\n }\n \n+/* set i40e TSO context descriptor */\n+static inline uint64_t\n+i40e_set_tso_ctx(struct rte_mbuf *mbuf, union i40e_tx_offload tx_offload)\n+{\n+\n+\tuint64_t ctx_desc = 0;\n+\tuint32_t cd_cmd, hdr_len, cd_tso_len;\n+\n+\n+\tif (!tx_offload.l4_len) {\n+\t\tPMD_DRV_LOG(DEBUG, \"L4 length set to 0\");\n+\t\treturn ctx_desc;\n+\t}\n+\n+\tif (unlikely(mbuf->ol_flags & PKT_TX_UDP_TUNNEL_PKT)) {\n+\n+\t\t/**\n+\t\t * Caculate total header length of UDP tunneling packet.\n+\t\t * the l2_len is outer UDP header length plus tunnel\n+\t\t * header length plus inner L2 header length.\n+\t\t */\n+\t\thdr_len = tx_offload.outer_l2_len +\n+\t\t\t\ttx_offload.outer_l3_len +\n+\t\t\t\ttx_offload.l2_len +\n+\t\t\t\ttx_offload.l3_len +\n+\t\t\t\ttx_offload.l4_len;\n+\t} else\n+\t\thdr_len = tx_offload.l2_len + tx_offload.l3_len +\n+\t\t\t\ttx_offload.l4_len;\n+\n+\tcd_cmd = I40E_TX_CTX_DESC_TSO;\n+\tcd_tso_len = mbuf->pkt_len - hdr_len;\n+\tctx_desc |= ((uint64_t)cd_cmd << I40E_TXD_CTX_QW1_CMD_SHIFT) |\n+\t\t\t\t((uint64_t)cd_tso_len <<\n+\t\t\t\t I40E_TXD_CTX_QW1_TSO_LEN_SHIFT) |\n+\t\t\t\t((uint64_t)mbuf->tso_segsz <<\n+\t\t\t\tI40E_TXD_CTX_QW1_MSS_SHIFT);\n+\n+\treturn ctx_desc;\n+}\n+\n uint16_t\n i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n {\n@@ -1190,15 +1241,12 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tuint32_t tx_flags;\n \tuint32_t td_tag;\n \tuint64_t ol_flags;\n-\tuint8_t l2_len;\n-\tuint16_t l3_len;\n-\tuint8_t outer_l2_len;\n-\tuint16_t outer_l3_len;\n \tuint16_t nb_used;\n \tuint16_t nb_ctx;\n \tuint16_t tx_last;\n \tuint16_t slen;\n \tuint64_t buf_dma_addr;\n+\tunion i40e_tx_offload tx_offload = { .data = 0 };\n \n \ttxq = tx_queue;\n \tsw_ring = txq->sw_ring;\n@@ -1220,10 +1268,12 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\tRTE_MBUF_PREFETCH_TO_FREE(txe->mbuf);\n \n \t\tol_flags = tx_pkt->ol_flags;\n-\t\tl2_len = tx_pkt->l2_len;\n-\t\tl3_len = tx_pkt->l3_len;\n-\t\touter_l2_len = tx_pkt->outer_l2_len;\n-\t\touter_l3_len = tx_pkt->outer_l3_len;\n+\t\ttx_offload.l2_len = tx_pkt->l2_len;\n+\t\ttx_offload.l3_len = tx_pkt->l3_len;\n+\t\ttx_offload.l4_len = tx_pkt->l4_len;\n+\t\ttx_offload.tso_segsz = tx_pkt->tso_segsz;\n+\t\ttx_offload.outer_l2_len = tx_pkt->outer_l2_len;\n+\t\ttx_offload.outer_l3_len = tx_pkt->outer_l3_len;\n \n \t\t/* Calculate the number of context descriptors needed. */\n \t\tnb_ctx = i40e_calc_context_desc(ol_flags);\n@@ -1273,8 +1323,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\t/* Enable checksum offloading */\n \t\tcd_tunneling_params = 0;\n \t\ti40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset,\n-\t\t\t\t\t\tl2_len, l3_len, outer_l2_len,\n-\t\t\t\t\t\touter_l3_len,\n+\t\t\t\t\t\ttx_offload,\n \t\t\t\t\t\t&cd_tunneling_params);\n \n \t\tif (unlikely(nb_ctx)) {\n@@ -1292,12 +1341,18 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\t\t\trte_pktmbuf_free_seg(txe->mbuf);\n \t\t\t\ttxe->mbuf = NULL;\n \t\t\t}\n-#ifdef RTE_LIBRTE_IEEE1588\n-\t\t\tif (ol_flags & PKT_TX_IEEE1588_TMST)\n+\t\t\t/* TSO enabled means no timestamp */\n+\t\t\tif (ol_flags & PKT_TX_TCP_SEG) {\n \t\t\t\tcd_type_cmd_tso_mss |=\n-\t\t\t\t\t((uint64_t)I40E_TX_CTX_DESC_TSYN <<\n-\t\t\t\t\t\tI40E_TXD_CTX_QW1_CMD_SHIFT);\n+\t\t\t\t\ti40e_set_tso_ctx(tx_pkt, tx_offload);\n+\t\t\t} else {\n+#ifdef RTE_LIBRTE_IEEE1588\n+\t\t\t\tif (ol_flags & PKT_TX_IEEE1588_TMST)\n+\t\t\t\t\tcd_type_cmd_tso_mss |=\n+\t\t\t\t\t\t((uint64_t)I40E_TX_CTX_DESC_TSYN <<\n+\t\t\t\t\t\t\tI40E_TXD_CTX_QW1_CMD_SHIFT);\n #endif\n+\t\t\t}\n \t\t\tctx_txd->tunneling_params =\n \t\t\t\trte_cpu_to_le_32(cd_tunneling_params);\n \t\t\tctx_txd->l2tag2 = rte_cpu_to_le_16(cd_l2tag2);\ndiff --git a/lib/librte_pmd_i40e/i40e_rxtx.h b/lib/librte_pmd_i40e/i40e_rxtx.h\nindex af932e3..4c81a24 100644\n--- a/lib/librte_pmd_i40e/i40e_rxtx.h\n+++ b/lib/librte_pmd_i40e/i40e_rxtx.h\n@@ -154,6 +154,19 @@ struct i40e_tx_queue {\n \tbool tx_deferred_start; /**< don't start this queue in dev start */\n };\n \n+/** Offload features */\n+union i40e_tx_offload {\n+\tuint64_t data;\n+\tstruct {\n+\t\tuint64_t l2_len:7; /**< L2 (MAC) Header Length. */\n+\t\tuint64_t l3_len:9; /**< L3 (IP) Header Length. */\n+\t\tuint64_t l4_len:8; /**< L4 (TCP/UDP) Header Length. */\n+\t\tuint64_t tso_segsz:16; /**< TCP TSO segment size */\n+\t\tuint64_t outer_l2_len:8; /**< L2 outer Header Length */\n+\t\tuint64_t outer_l3_len:16; /**< L2 outer Header Length */\n+\t};\n+};\n+\n int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n", "prefixes": [ "dpdk-dev", "1/2" ] }