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GET /api/patches/23159/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 23159,
    "url": "https://patches.dpdk.org/api/patches/23159/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20170403143944.17719-2-bruce.richardson@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20170403143944.17719-2-bruce.richardson@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20170403143944.17719-2-bruce.richardson@intel.com",
    "date": "2017-04-03T14:39:43",
    "name": "[dpdk-dev,1/2] net/i40e: eliminate mbuf write on rearm",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "78786093c9f56cfbb7c686b9519d8f3cef21cef4",
    "submitter": {
        "id": 20,
        "url": "https://patches.dpdk.org/api/people/20/?format=api",
        "name": "Bruce Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20170403143944.17719-2-bruce.richardson@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/23159/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/23159/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 44DF92BBE;\n\tMon,  3 Apr 2017 16:40:13 +0200 (CEST)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 046622B9B\n\tfor <dev@dpdk.org>; Mon,  3 Apr 2017 16:40:11 +0200 (CEST)",
            "from fmsmga004.fm.intel.com ([10.253.24.48])\n\tby orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t03 Apr 2017 07:40:09 -0700",
            "from sivswdev01.ir.intel.com ([10.237.217.45])\n\tby fmsmga004.fm.intel.com with ESMTP; 03 Apr 2017 07:40:07 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=simple/simple;\n\td=intel.com; i=@intel.com; q=dns/txt; s=intel;\n\tt=1491230412; x=1522766412;\n\th=from:to:cc:subject:date:message-id:in-reply-to: references;\n\tbh=2ajK6to6g0WW5LQqvHwGFraPryNympblwRcRyZObskY=;\n\tb=GHsv+owcWJZpd90u8rtY84nojgpfe73/8mWqC2fooHncQatkQ37HkVZh\n\tm30Xk8hxpPpjcebspy/864ivGThnKQ==;",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.36,270,1486454400\"; d=\"scan'208\";a=\"243470678\"",
        "From": "Bruce Richardson <bruce.richardson@intel.com>",
        "To": "helin.zhang@intel.com,\n\tjingjing.wu@intel.com",
        "Cc": "dev@dpdk.org, jerin.jacob@caviumnetworks.com, jianbo.liu@linaro.org,\n\tBruce Richardson <bruce.richardson@intel.com>",
        "Date": "Mon,  3 Apr 2017 15:39:43 +0100",
        "Message-Id": "<20170403143944.17719-2-bruce.richardson@intel.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20170403143944.17719-1-bruce.richardson@intel.com>",
        "References": "<20170403143944.17719-1-bruce.richardson@intel.com>",
        "Subject": "[dpdk-dev] [PATCH 1/2] net/i40e: eliminate mbuf write on rearm",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "With the mbuf rework, we now have 8 contiguous bytes to be rearmed in the\nmbuf just before the 8-bytes of olflags. If we don't do the rearm write\ninside the descriptor ring replenishment function, and delay it to\nreceiving the packet, we can do a single 16B write inside the RX function\nto set both the rearm data, and the flags together.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n drivers/net/i40e/i40e_rxtx_vec_sse.c | 47 +++++++++++++++++++++---------------\n 1 file changed, 28 insertions(+), 19 deletions(-)",
    "diff": "diff --git a/drivers/net/i40e/i40e_rxtx_vec_sse.c b/drivers/net/i40e/i40e_rxtx_vec_sse.c\nindex e17235a..09a33c3 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_sse.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_sse.c\n@@ -82,19 +82,10 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)\n \t/* Initialize the mbufs in vector, process 2 mbufs in one loop */\n \tfor (i = 0; i < RTE_I40E_RXQ_REARM_THRESH; i += 2, rxep += 2) {\n \t\t__m128i vaddr0, vaddr1;\n-\t\tuintptr_t p0, p1;\n \n \t\tmb0 = rxep[0].mbuf;\n \t\tmb1 = rxep[1].mbuf;\n \n-\t\t/* Flush mbuf with pkt template.\n-\t\t * Data to be rearmed is 6 bytes long.\n-\t\t */\n-\t\tp0 = (uintptr_t)&mb0->rearm_data;\n-\t\t*(uint64_t *)p0 = rxq->mbuf_initializer;\n-\t\tp1 = (uintptr_t)&mb1->rearm_data;\n-\t\t*(uint64_t *)p1 = rxq->mbuf_initializer;\n-\n \t\t/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n@@ -125,6 +116,14 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)\n \tI40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id);\n }\n \n+static inline void\n+desc_to_olflags_v(struct i40e_rx_queue *rxq, __m128i descs[4] __rte_unused,\n+\tstruct rte_mbuf **rx_pkts)\n+{\n+\n+\tconst __m128i mbuf_init = _mm_set_epi64x(0, rxq->mbuf_initializer);\n+\t__m128i rearm0, rearm1, rearm2, rearm3;\n+\n /* Handling the offload flags (olflags) field takes computation\n  * time when receiving packets. Therefore we provide a flag to disable\n  * the processing of the olflags field when they are not needed. This\n@@ -133,9 +132,6 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq)\n  */\n #ifdef RTE_LIBRTE_I40E_RX_OLFLAGS_ENABLE\n \n-static inline void\n-desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts)\n-{\n \t__m128i vlan0, vlan1, rss, l3_l4e;\n \n \t/* mask everything except RSS, flow director and VLAN flags\n@@ -203,14 +199,27 @@ desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts)\n \tvlan0 = _mm_or_si128(vlan0, rss);\n \tvlan0 = _mm_or_si128(vlan0, l3_l4e);\n \n-\trx_pkts[0]->ol_flags = _mm_extract_epi16(vlan0, 0);\n-\trx_pkts[1]->ol_flags = _mm_extract_epi16(vlan0, 2);\n-\trx_pkts[2]->ol_flags = _mm_extract_epi16(vlan0, 4);\n-\trx_pkts[3]->ol_flags = _mm_extract_epi16(vlan0, 6);\n-}\n+\t/*\n+\t * At this point, we have the 4 sets of flags in the low 16-bits\n+\t * of each 32-bit value in vlan0.\n+\t * We want to extract these, and merge them with the mbuf init data\n+\t * so we can do a single 16-byte write to the mbuf to set the flags\n+\t * and all the other initialization fields. Extracting the\n+\t * appropriate flags means that we have to do a shift and blend for\n+\t * each mbuf before we do the write.\n+\t */\n+\trearm0 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vlan0, 8), 0x10);\n+\trearm1 = _mm_blend_epi16(mbuf_init, _mm_slli_si128(vlan0, 4), 0x10);\n+\trearm2 = _mm_blend_epi16(mbuf_init, vlan0, 0x10);\n+\trearm3 = _mm_blend_epi16(mbuf_init, _mm_srli_si128(vlan0, 4), 0x10);\n #else\n-#define desc_to_olflags_v(desc, rx_pkts) do {} while (0)\n+\trearm0 = rearm1 = rearm2 = rearm3 = mbuf_init;\n #endif\n+\t_mm_store_si128((__m128i *)&rx_pkts[0]->rearm_data, rearm0);\n+\t_mm_store_si128((__m128i *)&rx_pkts[1]->rearm_data, rearm1);\n+\t_mm_store_si128((__m128i *)&rx_pkts[2]->rearm_data, rearm2);\n+\t_mm_store_si128((__m128i *)&rx_pkts[3]->rearm_data, rearm3);\n+}\n \n #define PKTLEN_SHIFT     10\n \n@@ -369,7 +378,7 @@ _recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n \t\t/* C.1 4=>2 filter staterr info only */\n \t\tsterr_tmp1 = _mm_unpackhi_epi32(descs[1], descs[0]);\n \n-\t\tdesc_to_olflags_v(descs, &rx_pkts[pos]);\n+\t\tdesc_to_olflags_v(rxq, descs, &rx_pkts[pos]);\n \n \t\t/* D.2 pkt 3,4 set in_port/nb_seg and remove crc */\n \t\tpkt_mb4 = _mm_add_epi16(pkt_mb4, crc_adjust);\n",
    "prefixes": [
        "dpdk-dev",
        "1/2"
    ]
}