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GET /api/patches/2235/?format=api
{ "id": 2235, "url": "https://patches.dpdk.org/api/patches/2235/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1421077843-8492-2-git-send-email-michalx.k.jastrzebski@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1421077843-8492-2-git-send-email-michalx.k.jastrzebski@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1421077843-8492-2-git-send-email-michalx.k.jastrzebski@intel.com", "date": "2015-01-12T15:50:42", "name": "[dpdk-dev,1/2] pmd: add DCB for VF for ixgbe", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4d34b0fa5414c1db3dfe7d4d06dc121673f83f42", "submitter": { "id": 74, "url": "https://patches.dpdk.org/api/people/74/?format=api", "name": "Michal Jastrzebski", "email": "michalx.k.jastrzebski@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1421077843-8492-2-git-send-email-michalx.k.jastrzebski@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/2235/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/2235/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id C64775AC3;\n\tMon, 12 Jan 2015 16:52:39 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id C96D05ABE\n\tfor <dev@dpdk.org>; Mon, 12 Jan 2015 16:52:32 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby fmsmga101.fm.intel.com with ESMTP; 12 Jan 2015 07:52:31 -0800", "from unknown (HELO Sent) ([10.217.248.81])\n\tby orsmga002.jf.intel.com with SMTP; 12 Jan 2015 07:52:26 -0800", "by Sent (sSMTP sendmail emulation); Mon, 12 Jan 2015 16:51:43 +0200" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.07,744,1413270000\"; d=\"scan'208\";a=\"668498257\"", "From": "Michal Jastrzebski <michalx.k.jastrzebski@intel.com>", "To": "dev@dpdk.org", "Date": "Mon, 12 Jan 2015 16:50:42 +0100", "Message-Id": "<1421077843-8492-2-git-send-email-michalx.k.jastrzebski@intel.com>", "X-Mailer": "git-send-email 2.1.1", "In-Reply-To": "<1421077843-8492-1-git-send-email-michalx.k.jastrzebski@intel.com>", "References": "<1421077843-8492-1-git-send-email-michalx.k.jastrzebski@intel.com>", "Subject": "[dpdk-dev] [PATCH 1/2] pmd: add DCB for VF for ixgbe", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pawel Wodkowski <pawelx.wodkowski@intel.com>\n\nThis patch add support for DCB in SRIOV mode. When no PFC\nis enabled this feature might be used as multiple queues\n(up to 8 or 4) for VF.\n\nIt incorporate following modifications:\n - Allow zero rx/tx queues to be passed to rte_eth_dev_configure().\n Rationale:\n in SRIOV mode PF use first free VF to RX/TX. If VF count\n is 16 or 32 all recources are assigned to VFs so PF can\n be used only for configuration.\n - split nb_q_per_pool to nb_rx_q_per_pool and nb_tx_q_per_pool\n Rationale:\n rx and tx number of queue might be different if RX and TX are\n configured in different mode. This allow to inform VF about\n proper number of queues.\n - extern mailbox API for DCB mode\n\nSigned-off-by: Pawel Wodkowski <pawelx.wodkowski@intel.com>\n---\n lib/librte_ether/rte_ethdev.c | 84 +++++++++++++++++++++---------\n lib/librte_ether/rte_ethdev.h | 5 +-\n lib/librte_pmd_e1000/igb_pf.c | 3 +-\n lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 10 ++--\n lib/librte_pmd_ixgbe/ixgbe_ethdev.h | 1 +\n lib/librte_pmd_ixgbe/ixgbe_pf.c | 98 ++++++++++++++++++++++++++++++-----\n lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 7 ++-\n 7 files changed, 159 insertions(+), 49 deletions(-)", "diff": "diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c\nindex 95f2ceb..4c1a494 100644\n--- a/lib/librte_ether/rte_ethdev.c\n+++ b/lib/librte_ether/rte_ethdev.c\n@@ -333,7 +333,7 @@ rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)\n \t\tdev->data->rx_queues = rte_zmalloc(\"ethdev->rx_queues\",\n \t\t\t\tsizeof(dev->data->rx_queues[0]) * nb_queues,\n \t\t\t\tRTE_CACHE_LINE_SIZE);\n-\t\tif (dev->data->rx_queues == NULL) {\n+\t\tif (dev->data->rx_queues == NULL && nb_queues > 0) {\n \t\t\tdev->data->nb_rx_queues = 0;\n \t\t\treturn -(ENOMEM);\n \t\t}\n@@ -475,7 +475,7 @@ rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)\n \t\tdev->data->tx_queues = rte_zmalloc(\"ethdev->tx_queues\",\n \t\t\t\tsizeof(dev->data->tx_queues[0]) * nb_queues,\n \t\t\t\tRTE_CACHE_LINE_SIZE);\n-\t\tif (dev->data->tx_queues == NULL) {\n+\t\tif (dev->data->tx_queues == NULL && nb_queues > 0) {\n \t\t\tdev->data->nb_tx_queues = 0;\n \t\t\treturn -(ENOMEM);\n \t\t}\n@@ -507,6 +507,7 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t const struct rte_eth_conf *dev_conf)\n {\n \tstruct rte_eth_dev *dev = &rte_eth_devices[port_id];\n+\tstruct rte_eth_dev_info dev_info;\n \n \tif (RTE_ETH_DEV_SRIOV(dev).active != 0) {\n \t\t/* check multi-queue mode */\n@@ -524,11 +525,33 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t\treturn (-EINVAL);\n \t\t}\n \n+\t\tif ((dev_conf->rxmode.mq_mode == ETH_MQ_RX_VMDQ_DCB) &&\n+\t\t\t(dev_conf->txmode.mq_mode == ETH_MQ_TX_VMDQ_DCB)) {\n+\t\t\tenum rte_eth_nb_pools rx_pools =\n+\t\t\t\t\t\tdev_conf->rx_adv_conf.vmdq_dcb_conf.nb_queue_pools;\n+\t\t\tenum rte_eth_nb_pools tx_pools =\n+\t\t\t\t\t\tdev_conf->tx_adv_conf.vmdq_dcb_tx_conf.nb_queue_pools;\n+\n+\t\t\tif (rx_pools != tx_pools) {\n+\t\t\t\t/* Only equal number of pools is supported when\n+\t\t\t\t * DCB+VMDq in SRIOV */\n+\t\t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%\" PRIu8\n+\t\t\t\t\t\t\" SRIOV active, DCB+VMDQ mode, \"\n+\t\t\t\t\t\t\"number of rx and tx pools is not eqaul\\n\",\n+\t\t\t\t\t\tport_id);\n+\t\t\t\treturn (-EINVAL);\n+\t\t\t}\n+\t\t}\n+\n+\t\tuint16_t nb_rx_q_per_pool = RTE_ETH_DEV_SRIOV(dev).nb_rx_q_per_pool;\n+\t\tuint16_t nb_tx_q_per_pool = RTE_ETH_DEV_SRIOV(dev).nb_tx_q_per_pool;\n+\n \t\tswitch (dev_conf->rxmode.mq_mode) {\n-\t\tcase ETH_MQ_RX_VMDQ_RSS:\n \t\tcase ETH_MQ_RX_VMDQ_DCB:\n+\t\t\tbreak;\n+\t\tcase ETH_MQ_RX_VMDQ_RSS:\n \t\tcase ETH_MQ_RX_VMDQ_DCB_RSS:\n-\t\t\t/* DCB/RSS VMDQ in SRIOV mode, not implement yet */\n+\t\t\t/* RSS, DCB+RSS VMDQ in SRIOV mode, not implement yet */\n \t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%\" PRIu8\n \t\t\t\t\t\" SRIOV active, \"\n \t\t\t\t\t\"unsupported VMDQ mq_mode rx %u\\n\",\n@@ -537,37 +560,32 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\tdefault: /* ETH_MQ_RX_VMDQ_ONLY or ETH_MQ_RX_NONE */\n \t\t\t/* if nothing mq mode configure, use default scheme */\n \t\t\tdev->data->dev_conf.rxmode.mq_mode = ETH_MQ_RX_VMDQ_ONLY;\n-\t\t\tif (RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool > 1)\n-\t\t\t\tRTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = 1;\n+\t\t\tif (nb_rx_q_per_pool > 1)\n+\t\t\t\tnb_rx_q_per_pool = 1;\n \t\t\tbreak;\n \t\t}\n \n \t\tswitch (dev_conf->txmode.mq_mode) {\n-\t\tcase ETH_MQ_TX_VMDQ_DCB:\n-\t\t\t/* DCB VMDQ in SRIOV mode, not implement yet */\n-\t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%\" PRIu8\n-\t\t\t\t\t\" SRIOV active, \"\n-\t\t\t\t\t\"unsupported VMDQ mq_mode tx %u\\n\",\n-\t\t\t\t\tport_id, dev_conf->txmode.mq_mode);\n-\t\t\treturn (-EINVAL);\n+\t\tcase ETH_MQ_TX_VMDQ_DCB: /* DCB VMDQ in SRIOV mode*/\n+\t\t\tbreak;\n \t\tdefault: /* ETH_MQ_TX_VMDQ_ONLY or ETH_MQ_TX_NONE */\n \t\t\t/* if nothing mq mode configure, use default scheme */\n \t\t\tdev->data->dev_conf.txmode.mq_mode = ETH_MQ_TX_VMDQ_ONLY;\n-\t\t\tif (RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool > 1)\n-\t\t\t\tRTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = 1;\n+\t\t\tif (nb_tx_q_per_pool > 1)\n+\t\t\t\tnb_tx_q_per_pool = 1;\n \t\t\tbreak;\n \t\t}\n \n \t\t/* check valid queue number */\n-\t\tif ((nb_rx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool) ||\n-\t\t (nb_tx_q > RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool)) {\n+\t\tif (nb_rx_q > nb_rx_q_per_pool || nb_tx_q > nb_tx_q_per_pool) {\n \t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%d SRIOV active, \"\n-\t\t\t\t \"queue number must less equal to %d\\n\",\n-\t\t\t\t\tport_id, RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool);\n+\t\t\t\t \"rx/tx queue number must less equal to %d/%d\\n\",\n+\t\t\t\t\tport_id, RTE_ETH_DEV_SRIOV(dev).nb_rx_q_per_pool,\n+\t\t\t\t\tRTE_ETH_DEV_SRIOV(dev).nb_tx_q_per_pool);\n \t\t\treturn (-EINVAL);\n \t\t}\n \t} else {\n-\t\t/* For vmdb+dcb mode check our configuration before we go further */\n+\t\t/* For vmdq+dcb mode check our configuration before we go further */\n \t\tif (dev_conf->rxmode.mq_mode == ETH_MQ_RX_VMDQ_DCB) {\n \t\t\tconst struct rte_eth_vmdq_dcb_conf *conf;\n \n@@ -606,11 +624,20 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t\t}\n \t\t}\n \n+\t\t/* For DCB we need to obtain maximum number of queues dinamically,\n+\t\t * as this depends on max VF exported in PF */\n+\t\tif ((dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) ||\n+\t\t\t(dev_conf->txmode.mq_mode == ETH_MQ_TX_DCB)) {\n+\n+\t\t\t\tFUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);\n+\t\t\t\t(*dev->dev_ops->dev_infos_get)(dev, &dev_info);\n+\t\t}\n+\n \t\t/* For DCB mode check our configuration before we go further */\n \t\tif (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) {\n \t\t\tconst struct rte_eth_dcb_rx_conf *conf;\n \n-\t\t\tif (nb_rx_q != ETH_DCB_NUM_QUEUES) {\n+\t\t\tif (nb_rx_q != dev_info.max_rx_queues) {\n \t\t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%d DCB, nb_rx_q \"\n \t\t\t\t\t\t\"!= %d\\n\",\n \t\t\t\t\t\tport_id, ETH_DCB_NUM_QUEUES);\n@@ -630,7 +657,7 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\tif (dev_conf->txmode.mq_mode == ETH_MQ_TX_DCB) {\n \t\t\tconst struct rte_eth_dcb_tx_conf *conf;\n \n-\t\t\tif (nb_tx_q != ETH_DCB_NUM_QUEUES) {\n+\t\t\tif (nb_tx_q != dev_info.max_tx_queues) {\n \t\t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%d DCB, nb_tx_q \"\n \t\t\t\t\t\t\"!= %d\\n\",\n \t\t\t\t\t\tport_id, ETH_DCB_NUM_QUEUES);\n@@ -690,7 +717,10 @@ rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t}\n \tif (nb_rx_q == 0) {\n \t\tPMD_DEBUG_TRACE(\"ethdev port_id=%d nb_rx_q == 0\\n\", port_id);\n-\t\treturn (-EINVAL);\n+\t\t/* In SRIOV there can be no free resource for PF. So permit use only\n+\t\t * for configuration. */\n+\t\tif (RTE_ETH_DEV_SRIOV(dev).active == 0)\n+\t\t\treturn (-EINVAL);\n \t}\n \n \tif (nb_tx_q > dev_info.max_tx_queues) {\n@@ -698,9 +728,13 @@ rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t\t\tport_id, nb_tx_q, dev_info.max_tx_queues);\n \t\treturn (-EINVAL);\n \t}\n+\n \tif (nb_tx_q == 0) {\n \t\tPMD_DEBUG_TRACE(\"ethdev port_id=%d nb_tx_q == 0\\n\", port_id);\n-\t\treturn (-EINVAL);\n+\t\t/* In SRIOV there can be no free resource for PF. So permit use only\n+\t\t * for configuration. */\n+\t\tif (RTE_ETH_DEV_SRIOV(dev).active == 0)\n+\t\t\treturn (-EINVAL);\n \t}\n \n \t/* Copy the dev_conf parameter into the dev structure */\n@@ -750,7 +784,7 @@ rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t\t\t\t\t\tETHER_MAX_LEN;\n \t}\n \n-\t/* multipe queue mode checking */\n+\t/* multiple queue mode checking */\n \tdiag = rte_eth_dev_check_mq_mode(port_id, nb_rx_q, nb_tx_q, dev_conf);\n \tif (diag != 0) {\n \t\tPMD_DEBUG_TRACE(\"port%d rte_eth_dev_check_mq_mode = %d\\n\",\ndiff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex ce0528f..04fda83 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -299,7 +299,7 @@ enum rte_eth_rx_mq_mode {\n enum rte_eth_tx_mq_mode {\n \tETH_MQ_TX_NONE = 0, /**< It is in neither DCB nor VT mode. */\n \tETH_MQ_TX_DCB, /**< For TX side,only DCB is on. */\n-\tETH_MQ_TX_VMDQ_DCB,\t/**< For TX side,both DCB and VT is on. */\n+\tETH_MQ_TX_VMDQ_DCB, /**< For TX side,both DCB and VT is on. */\n \tETH_MQ_TX_VMDQ_ONLY, /**< Only VT on, no DCB */\n };\n \n@@ -1569,7 +1569,8 @@ struct rte_eth_dev {\n \n struct rte_eth_dev_sriov {\n \tuint8_t active; /**< SRIOV is active with 16, 32 or 64 pools */\n-\tuint8_t nb_q_per_pool; /**< rx queue number per pool */\n+\tuint8_t nb_rx_q_per_pool; /**< rx queue number per pool */\n+\tuint8_t nb_tx_q_per_pool; /**< tx queue number per pool */\n \tuint16_t def_vmdq_idx; /**< Default pool num used for PF */\n \tuint16_t def_pool_q_idx; /**< Default pool queue start reg index */\n };\ndiff --git a/lib/librte_pmd_e1000/igb_pf.c b/lib/librte_pmd_e1000/igb_pf.c\nindex bc3816a..9d2f858 100644\n--- a/lib/librte_pmd_e1000/igb_pf.c\n+++ b/lib/librte_pmd_e1000/igb_pf.c\n@@ -115,7 +115,8 @@ void igb_pf_host_init(struct rte_eth_dev *eth_dev)\n \t\trte_panic(\"Cannot allocate memory for private VF data\\n\");\n \n \tRTE_ETH_DEV_SRIOV(eth_dev).active = ETH_8_POOLS;\n-\tRTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = nb_queue;\n+\tRTE_ETH_DEV_SRIOV(eth_dev).nb_rx_q_per_pool = nb_queue;\n+\tRTE_ETH_DEV_SRIOV(eth_dev).nb_tx_q_per_pool = nb_queue;\n \tRTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx = vf_num;\n \tRTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx = (uint16_t)(vf_num * nb_queue);\n \ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\nindex 3fc3738..347f03c 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\n@@ -3555,14 +3555,14 @@ static int ixgbe_set_vf_rate_limit(struct rte_eth_dev *dev, uint16_t vf,\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct ixgbe_vf_info *vfinfo =\n \t\t*(IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private));\n-\tuint8_t nb_q_per_pool = RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool;\n+\tuint8_t nb_tx_q_per_pool = RTE_ETH_DEV_SRIOV(dev).nb_tx_q_per_pool;\n \tuint32_t queue_stride =\n \t\tIXGBE_MAX_RX_QUEUE_NUM / RTE_ETH_DEV_SRIOV(dev).active;\n \tuint32_t queue_idx = vf * queue_stride, idx = 0, vf_idx;\n-\tuint32_t queue_end = queue_idx + nb_q_per_pool - 1;\n+\tuint32_t tx_queue_end = queue_idx + nb_tx_q_per_pool - 1;\n \tuint16_t total_rate = 0;\n \n-\tif (queue_end >= hw->mac.max_tx_queues)\n+\tif (tx_queue_end >= hw->mac.max_tx_queues)\n \t\treturn -EINVAL;\n \n \tif (vfinfo != NULL) {\n@@ -3577,7 +3577,7 @@ static int ixgbe_set_vf_rate_limit(struct rte_eth_dev *dev, uint16_t vf,\n \t\treturn -EINVAL;\n \n \t/* Store tx_rate for this vf. */\n-\tfor (idx = 0; idx < nb_q_per_pool; idx++) {\n+\tfor (idx = 0; idx < nb_tx_q_per_pool; idx++) {\n \t\tif (((uint64_t)0x1 << idx) & q_msk) {\n \t\t\tif (vfinfo[vf].tx_rate[idx] != tx_rate)\n \t\t\t\tvfinfo[vf].tx_rate[idx] = tx_rate;\n@@ -3595,7 +3595,7 @@ static int ixgbe_set_vf_rate_limit(struct rte_eth_dev *dev, uint16_t vf,\n \t}\n \n \t/* Set RTTBCNRC of each queue/pool for vf X */\n-\tfor (; queue_idx <= queue_end; queue_idx++) {\n+\tfor (; queue_idx <= tx_queue_end; queue_idx++) {\n \t\tif (0x1 & q_msk)\n \t\t\tixgbe_set_queue_rate_limit(dev, queue_idx, tx_rate);\n \t\tq_msk = q_msk >> 1;\ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h\nindex ca99170..ebf16e9 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h\n+++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h\n@@ -159,6 +159,7 @@ struct ixgbe_vf_info {\n \tuint16_t tx_rate[IXGBE_MAX_QUEUE_NUM_PER_VF];\n \tuint16_t vlan_count;\n \tuint8_t spoofchk_enabled;\n+\tunsigned int vf_api;\n };\n \n /*\ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_pf.c b/lib/librte_pmd_ixgbe/ixgbe_pf.c\nindex 51da1fd..4d30bcf 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_pf.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_pf.c\n@@ -127,7 +127,8 @@ void ixgbe_pf_host_init(struct rte_eth_dev *eth_dev)\n \t\tRTE_ETH_DEV_SRIOV(eth_dev).active = ETH_16_POOLS;\n \t}\n \n-\tRTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = nb_queue;\n+\tRTE_ETH_DEV_SRIOV(eth_dev).nb_rx_q_per_pool = nb_queue;\n+\tRTE_ETH_DEV_SRIOV(eth_dev).nb_tx_q_per_pool = nb_queue;\n \tRTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx = vf_num;\n \tRTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx = (uint16_t)(vf_num * nb_queue);\n \n@@ -189,7 +190,7 @@ int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev)\n \thw->mac.ops.set_vmdq(hw, 0, RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx);\n \n \t/*\n-\t * SW msut set GCR_EXT.VT_Mode the same as GPIE.VT_Mode\n+\t * SW must set GCR_EXT.VT_Mode the same as GPIE.VT_Mode\n \t */\n \tgcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);\n \tgcr_ext &= ~IXGBE_GCR_EXT_VT_MODE_MASK;\n@@ -214,19 +215,19 @@ int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev)\n \t}\n \n \tIXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);\n- IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);\n+\tIXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);\n \n- /*\n+\t/*\n \t * enable vlan filtering and allow all vlan tags through\n \t */\n- vlanctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);\n- vlanctrl |= IXGBE_VLNCTRL_VFE ; /* enable vlan filters */\n- IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlanctrl);\n+\tvlanctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);\n+\tvlanctrl |= IXGBE_VLNCTRL_VFE ; /* enable vlan filters */\n+\tIXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlanctrl);\n \n- /* VFTA - enable all vlan filters */\n- for (i = 0; i < IXGBE_MAX_VFTA; i++) {\n- IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 0xFFFFFFFF);\n- }\n+\t/* VFTA - enable all vlan filters */\n+\tfor (i = 0; i < IXGBE_MAX_VFTA; i++) {\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VFTA(i), 0xFFFFFFFF);\n+\t}\n \n \t/* Enable MAC Anti-Spoofing */\n \thw->mac.ops.set_mac_anti_spoofing(hw, FALSE, vf_num);\n@@ -369,6 +370,73 @@ ixgbe_vf_reset(struct rte_eth_dev *dev, uint16_t vf, uint32_t *msgbuf)\n }\n \n static int\n+ixgbe_negotiate_vf_api(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf)\n+{\n+\tstruct ixgbe_vf_info *vfinfo =\n+\t\t*(IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private));\n+\tint api = msgbuf[1];\n+\n+\tswitch (api) {\n+\tcase ixgbe_mbox_api_10:\n+\tcase ixgbe_mbox_api_11:\n+\t\tvfinfo[vf].vf_api = api;\n+\t\treturn 0;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\tRTE_LOG(DEBUG, PMD, \"VF %d requested invalid api version %u\\n\", vf, api);\n+\treturn -1;\n+}\n+\n+static int\n+ixgbe_get_vf_queues(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf)\n+{\n+\tstruct ixgbe_vf_info *vfinfo =\n+\t\t*(IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private));\n+\tstruct ixgbe_dcb_config *dcb_cfg =\n+\t\t\tIXGBE_DEV_PRIVATE_TO_DCB_CFG(dev->data->dev_private);\n+\n+\tuint8_t num_tcs = dcb_cfg->num_tcs.pg_tcs;\n+\n+\t/* verify the PF is supporting the correct APIs */\n+\tswitch (vfinfo[vf].vf_api) {\n+\tcase ixgbe_mbox_api_10:\n+\tcase ixgbe_mbox_api_11:\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -1;\n+\t}\n+\n+\tif (RTE_ETH_DEV_SRIOV(dev).active) {\n+\t\tif (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_VMDQ_DCB)\n+\t\t\tmsgbuf[IXGBE_VF_TX_QUEUES] = num_tcs;\n+\t\telse\n+\t\t\tmsgbuf[IXGBE_VF_TX_QUEUES] = 1;\n+\n+\t\tif (dev->data->dev_conf.txmode.mq_mode == ETH_MQ_TX_VMDQ_DCB)\n+\t\t\tmsgbuf[IXGBE_VF_RX_QUEUES] = num_tcs;\n+\t\telse\n+\t\t\tmsgbuf[IXGBE_VF_RX_QUEUES] = 1;\n+\t}\telse {\n+\t\t/* only allow 1 Tx queue for bandwidth limiting */\n+\t\tmsgbuf[IXGBE_VF_TX_QUEUES] = 1;\n+\t\tmsgbuf[IXGBE_VF_RX_QUEUES] = 1;\n+\t}\n+\n+\t/* notify VF of need for VLAN tag stripping, and correct queue */\n+\tif (num_tcs)\n+\t\tmsgbuf[IXGBE_VF_TRANS_VLAN] = num_tcs;\n+\telse\n+\t\tmsgbuf[IXGBE_VF_TRANS_VLAN] = 0;\n+\n+\t/* notify VF of default queue */\n+\tmsgbuf[IXGBE_VF_DEF_QUEUE] = 0;\n+\n+\treturn 0;\n+}\n+\n+static int\n ixgbe_vf_set_mac_addr(struct rte_eth_dev *dev, uint32_t vf, uint32_t *msgbuf)\n {\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n@@ -512,6 +580,12 @@ ixgbe_rcv_msg_from_vf(struct rte_eth_dev *dev, uint16_t vf)\n \tcase IXGBE_VF_SET_VLAN:\n \t\tretval = ixgbe_vf_set_vlan(dev, vf, msgbuf);\n \t\tbreak;\n+\tcase IXGBE_VF_API_NEGOTIATE:\n+\t\tretval = ixgbe_negotiate_vf_api(dev, vf, msgbuf);\n+\t\tbreak;\n+\tcase IXGBE_VF_GET_QUEUES:\n+\t\tretval = ixgbe_get_vf_queues(dev, vf, msgbuf);\n+\t\tbreak;\n \tdefault:\n \t\tPMD_DRV_LOG(DEBUG, \"Unhandled Msg %8.8x\", (unsigned)msgbuf[0]);\n \t\tretval = IXGBE_ERR_MBX;\n@@ -526,7 +600,7 @@ ixgbe_rcv_msg_from_vf(struct rte_eth_dev *dev, uint16_t vf)\n \n \tmsgbuf[0] |= IXGBE_VT_MSGTYPE_CTS;\n \n-\tixgbe_write_mbx(hw, msgbuf, 1, vf);\n+\tixgbe_write_mbx(hw, msgbuf, mbx_size, vf);\n \n \treturn retval;\n }\ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\nindex e10d6a2..49b44fe 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n@@ -3166,10 +3166,9 @@ void ixgbe_configure_dcb(struct rte_eth_dev *dev)\n \n \t/* check support mq_mode for DCB */\n \tif ((dev_conf->rxmode.mq_mode != ETH_MQ_RX_VMDQ_DCB) &&\n-\t (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB))\n-\t\treturn;\n-\n-\tif (dev->data->nb_rx_queues != ETH_DCB_NUM_QUEUES)\n+\t (dev_conf->rxmode.mq_mode != ETH_MQ_RX_DCB) &&\n+\t (dev_conf->txmode.mq_mode != ETH_MQ_TX_VMDQ_DCB) &&\n+\t (dev_conf->txmode.mq_mode != ETH_MQ_TX_DCB))\n \t\treturn;\n \n \t/** Configure DCB hardware **/\n", "prefixes": [ "dpdk-dev", "1/2" ] }