get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/2214/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2214,
    "url": "https://patches.dpdk.org/api/patches/2214/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1420612355-6666-6-git-send-email-changchun.ouyang@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1420612355-6666-6-git-send-email-changchun.ouyang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1420612355-6666-6-git-send-email-changchun.ouyang@intel.com",
    "date": "2015-01-07T06:32:34",
    "name": "[dpdk-dev,v5,5/6] ixgbe: Config VF RSS",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "3d2df024c7727a583ce671939cd8ac06c983e78d",
    "submitter": {
        "id": 31,
        "url": "https://patches.dpdk.org/api/people/31/?format=api",
        "name": "Ouyang Changchun",
        "email": "changchun.ouyang@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1420612355-6666-6-git-send-email-changchun.ouyang@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/2214/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/2214/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 250EF5A7B;\n\tWed,  7 Jan 2015 07:33:02 +0100 (CET)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 4F3FD5A61\n\tfor <dev@dpdk.org>; Wed,  7 Jan 2015 07:32:57 +0100 (CET)",
            "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga103.jf.intel.com with ESMTP; 06 Jan 2015 22:29:38 -0800",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 06 Jan 2015 22:32:54 -0800",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t076Wqws001204;\n\tWed, 7 Jan 2015 14:32:52 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t076Wnm4006734; Wed, 7 Jan 2015 14:32:51 +0800",
            "(from couyang@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t076WndE006730; \n\tWed, 7 Jan 2015 14:32:49 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.07,713,1413270000\"; d=\"scan'208\";a=\"665607122\"",
        "From": "Ouyang Changchun <changchun.ouyang@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Wed,  7 Jan 2015 14:32:34 +0800",
        "Message-Id": "<1420612355-6666-6-git-send-email-changchun.ouyang@intel.com>",
        "X-Mailer": "git-send-email 1.7.12.2",
        "In-Reply-To": "<1420612355-6666-1-git-send-email-changchun.ouyang@intel.com>",
        "References": "<1420355937-18484-1-git-send-email-changchun.ouyang@intel.com>\n\t<1420612355-6666-1-git-send-email-changchun.ouyang@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v5 5/6] ixgbe: Config VF RSS",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "It needs config RSS and IXGBE_MRQC and IXGBE_VFPSRTYPE to enable VF RSS.\n\nThe psrtype will determine how many queues the received packets will distribute to,\nand the value of psrtype should depends on both facet: max VF rxq number which\nhas been negotiated with PF, and the number of rxq specified in config on guest.\n\nSigned-off-by: Changchun Ouyang <changchun.ouyang@intel.com>\n\nChanges in v4:\n - the number of rxq from config should be power of 2 and should not bigger than\n    max VF rxq number(negotiated between guest and host).\n\n---\n lib/librte_pmd_ixgbe/ixgbe_pf.c   |  15 ++++++\n lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 103 +++++++++++++++++++++++++++++++++-----\n 2 files changed, 106 insertions(+), 12 deletions(-)",
    "diff": "diff --git a/lib/librte_pmd_ixgbe/ixgbe_pf.c b/lib/librte_pmd_ixgbe/ixgbe_pf.c\nindex dbda9b5..93f6e43 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_pf.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_pf.c\n@@ -187,6 +187,21 @@ int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev)\n \tIXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(hw->mac.num_rar_entries), 0);\n \tIXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(hw->mac.num_rar_entries), 0);\n \n+\t/*\n+\t * VF RSS can support at most 4 queues for each VF, even if\n+\t * 8 queues are available for each VF, it need refine to 4\n+\t * queues here due to this limitation, otherwise no queue\n+\t * will receive any packet even RSS is enabled.\n+\t */\n+\tif (eth_dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_VMDQ_RSS) {\n+\t\tif (RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool == 8) {\n+\t\t\tRTE_ETH_DEV_SRIOV(eth_dev).active = ETH_32_POOLS;\n+\t\t\tRTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = 4;\n+\t\t\tRTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx =\n+\t\t\t\tdev_num_vf(eth_dev) * 4;\n+\t\t}\n+\t}\n+\n \t/* set VMDq map to default PF pool */\n \thw->mac.ops.set_vmdq(hw, 0, RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx);\n \ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\nindex f69abda..e83a9ab 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n@@ -3327,6 +3327,68 @@ ixgbe_alloc_rx_queue_mbufs(struct igb_rx_queue *rxq)\n }\n \n static int\n+ixgbe_config_vf_rss(struct rte_eth_dev *dev)\n+{\n+\tstruct ixgbe_hw *hw;\n+\tuint32_t mrqc;\n+\n+\tixgbe_rss_configure(dev);\n+\n+\thw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\t/* MRQC: enable VF RSS */\n+\tmrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);\n+\tmrqc &= ~IXGBE_MRQC_MRQE_MASK;\n+\tswitch (RTE_ETH_DEV_SRIOV(dev).active) {\n+\tcase ETH_64_POOLS:\n+\t\tmrqc |= IXGBE_MRQC_VMDQRSS64EN;\n+\t\tbreak;\n+\n+\tcase ETH_32_POOLS:\n+\tcase ETH_16_POOLS:\n+\t\tmrqc |= IXGBE_MRQC_VMDQRSS32EN;\n+\t\tbreak;\n+\n+\tdefault:\n+\t\tPMD_INIT_LOG(ERR, \"Invalid pool number in IOV mode\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tIXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);\n+\n+\treturn 0;\n+}\n+\n+static int\n+ixgbe_config_vf_default(struct rte_eth_dev *dev)\n+{\n+\tstruct ixgbe_hw *hw =\n+\t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\n+\tswitch (RTE_ETH_DEV_SRIOV(dev).active) {\n+\tcase ETH_64_POOLS:\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_MRQC,\n+\t\t\tIXGBE_MRQC_VMDQEN);\n+\t\tbreak;\n+\n+\tcase ETH_32_POOLS:\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_MRQC,\n+\t\t\tIXGBE_MRQC_VMDQRT4TCEN);\n+\t\tbreak;\n+\n+\tcase ETH_16_POOLS:\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_MRQC,\n+\t\t\tIXGBE_MRQC_VMDQRT8TCEN);\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_INIT_LOG(ERR,\n+\t\t\t\"invalid pool number in IOV mode\");\n+\t\tbreak;\n+\t}\n+\treturn 0;\n+}\n+\n+static int\n ixgbe_dev_mq_rx_configure(struct rte_eth_dev *dev)\n {\n \tstruct ixgbe_hw *hw =\n@@ -3358,24 +3420,25 @@ ixgbe_dev_mq_rx_configure(struct rte_eth_dev *dev)\n \t\t\tdefault: ixgbe_rss_disable(dev);\n \t\t}\n \t} else {\n-\t\tswitch (RTE_ETH_DEV_SRIOV(dev).active) {\n \t\t/*\n \t\t * SRIOV active scheme\n-\t\t * FIXME if support DCB/RSS together with VMDq & SRIOV\n+\t\t * Support RSS together with VMDq & SRIOV\n \t\t */\n-\t\tcase ETH_64_POOLS:\n-\t\t\tIXGBE_WRITE_REG(hw, IXGBE_MRQC, IXGBE_MRQC_VMDQEN);\n-\t\t\tbreak;\n-\n-\t\tcase ETH_32_POOLS:\n-\t\t\tIXGBE_WRITE_REG(hw, IXGBE_MRQC, IXGBE_MRQC_VMDQRT4TCEN);\n+\t\tswitch (dev->data->dev_conf.rxmode.mq_mode) {\n+\t\tcase ETH_MQ_RX_RSS:\n+\t\tcase ETH_MQ_RX_VMDQ_RSS:\n+\t\t\tixgbe_config_vf_rss(dev);\n \t\t\tbreak;\n \n-\t\tcase ETH_16_POOLS:\n-\t\t\tIXGBE_WRITE_REG(hw, IXGBE_MRQC, IXGBE_MRQC_VMDQRT8TCEN);\n-\t\t\tbreak;\n+\t\t/* FIXME if support DCB/RSS together with VMDq & SRIOV */\n+\t\tcase ETH_MQ_RX_VMDQ_DCB:\n+\t\tcase ETH_MQ_RX_VMDQ_DCB_RSS:\n+\t\t\tPMD_INIT_LOG(ERR,\n+\t\t\t\t\"Could not support DCB with VMDq & SRIOV\");\n+\t\t\treturn -1;\n \t\tdefault:\n-\t\t\tPMD_INIT_LOG(ERR, \"invalid pool number in IOV mode\");\n+\t\t\tixgbe_config_vf_default(dev);\n+\t\t\tbreak;\n \t\t}\n \t}\n \n@@ -3993,6 +4056,19 @@ ixgbevf_dev_rx_init(struct rte_eth_dev *dev)\n \tPMD_INIT_FUNC_TRACE();\n \thw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n+\tif (rte_is_power_of_2(dev->data->nb_rx_queues) == 0) {\n+\t\tPMD_INIT_LOG(ERR, \"The number of Rx queue invalid, \"\n+\t\t\t\"it should be power of 2\");\n+\t\treturn -1;\n+\t}\n+\n+\tif (dev->data->nb_rx_queues > hw->mac.max_rx_queues) {\n+\t\tPMD_INIT_LOG(ERR, \"The number of Rx queue invalid, \"\n+\t\t\t\"it should be equal to or less than %d\",\n+\t\t\thw->mac.max_rx_queues);\n+\t\treturn -1;\n+\t}\n+\n \t/*\n \t * When the VF driver issues a IXGBE_VF_RESET request, the PF driver\n \t * disables the VF receipt of packets if the PF MTU is > 1500.\n@@ -4094,6 +4170,9 @@ ixgbevf_dev_rx_init(struct rte_eth_dev *dev)\n \t\t\tIXGBE_PSRTYPE_IPV6HDR;\n #endif\n \n+\t/* Set RQPL for VF RSS according to max Rx queue */\n+\tpsrtype |= (dev->data->nb_rx_queues >> 1) <<\n+\t\tIXGBE_PSRTYPE_RQPL_SHIFT;\n \tIXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);\n \n \tif (dev->data->dev_conf.rxmode.enable_scatter) {\n",
    "prefixes": [
        "dpdk-dev",
        "v5",
        "5/6"
    ]
}