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GET /api/patches/2213/?format=api
{ "id": 2213, "url": "https://patches.dpdk.org/api/patches/2213/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1420612355-6666-5-git-send-email-changchun.ouyang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1420612355-6666-5-git-send-email-changchun.ouyang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1420612355-6666-5-git-send-email-changchun.ouyang@intel.com", "date": "2015-01-07T06:32:33", "name": "[dpdk-dev,v5,4/6] ether: Check VMDq RSS mode", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cc354f5fad6967b9e927d68cbcdace986df2969e", "submitter": { "id": 31, "url": "https://patches.dpdk.org/api/people/31/?format=api", "name": "Ouyang Changchun", "email": "changchun.ouyang@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1420612355-6666-5-git-send-email-changchun.ouyang@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/2213/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/2213/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 5AB665A75;\n\tWed, 7 Jan 2015 07:32:59 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 284205A6A\n\tfor <dev@dpdk.org>; Wed, 7 Jan 2015 07:32:54 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga101.fm.intel.com with ESMTP; 06 Jan 2015 22:32:52 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga002.fm.intel.com with ESMTP; 06 Jan 2015 22:32:52 -0800", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t076WojY001198;\n\tWed, 7 Jan 2015 14:32:50 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t076Wl3a006727; Wed, 7 Jan 2015 14:32:49 +0800", "(from couyang@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t076Wl7r006723; \n\tWed, 7 Jan 2015 14:32:47 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.07,713,1413270000\"; d=\"scan'208\";a=\"657950942\"", "From": "Ouyang Changchun <changchun.ouyang@intel.com>", "To": "dev@dpdk.org", "Date": "Wed, 7 Jan 2015 14:32:33 +0800", "Message-Id": "<1420612355-6666-5-git-send-email-changchun.ouyang@intel.com>", "X-Mailer": "git-send-email 1.7.12.2", "In-Reply-To": "<1420612355-6666-1-git-send-email-changchun.ouyang@intel.com>", "References": "<1420355937-18484-1-git-send-email-changchun.ouyang@intel.com>\n\t<1420612355-6666-1-git-send-email-changchun.ouyang@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 4/6] ether: Check VMDq RSS mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Check mq mode for VMDq RSS, handle it correctly instead of returning an error;\nAlso remove the limitation of per pool queue number has max value of 1, because\nthe per pool queue number could be 2 or 4 if it is VMDq RSS mode;\n\nThe number of rxq specified in config will determine the mq mode for VMDq RSS.\n\nSigned-off-by: Changchun Ouyang <changchun.ouyang@intel.com>\n\nchanges in v5:\n - Fix '<' issue, it should be '<=' to test rxq number;\n - Extract a function to remove the embeded switch-case statement.\n\n---\n lib/librte_ether/rte_ethdev.c | 50 ++++++++++++++++++++++++++++++++++++++-----\n 1 file changed, 45 insertions(+), 5 deletions(-)", "diff": "diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c\nindex 95f2ceb..8363e26 100644\n--- a/lib/librte_ether/rte_ethdev.c\n+++ b/lib/librte_ether/rte_ethdev.c\n@@ -503,6 +503,31 @@ rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)\n }\n \n static int\n+rte_eth_dev_check_vf_rss_rxq_num(uint8_t port_id, uint16_t nb_rx_q)\n+{\n+\tstruct rte_eth_dev *dev = &rte_eth_devices[port_id];\n+\tswitch (nb_rx_q) {\n+\tcase 1:\n+\tcase 2:\n+\t\tRTE_ETH_DEV_SRIOV(dev).active =\n+\t\t\tETH_64_POOLS;\n+\t\tbreak;\n+\tcase 4:\n+\t\tRTE_ETH_DEV_SRIOV(dev).active =\n+\t\t\tETH_32_POOLS;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tRTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = nb_rx_q;\n+\tRTE_ETH_DEV_SRIOV(dev).def_pool_q_idx =\n+\t\tdev->pci_dev->max_vfs * nb_rx_q;\n+\n+\treturn 0;\n+}\n+\n+static int\n rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t const struct rte_eth_conf *dev_conf)\n {\n@@ -510,8 +535,7 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \n \tif (RTE_ETH_DEV_SRIOV(dev).active != 0) {\n \t\t/* check multi-queue mode */\n-\t\tif ((dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) ||\n-\t\t (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) ||\n+\t\tif ((dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) ||\n \t\t (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB_RSS) ||\n \t\t (dev_conf->txmode.mq_mode == ETH_MQ_TX_DCB)) {\n \t\t\t/* SRIOV only works in VMDq enable mode */\n@@ -525,7 +549,6 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t}\n \n \t\tswitch (dev_conf->rxmode.mq_mode) {\n-\t\tcase ETH_MQ_RX_VMDQ_RSS:\n \t\tcase ETH_MQ_RX_VMDQ_DCB:\n \t\tcase ETH_MQ_RX_VMDQ_DCB_RSS:\n \t\t\t/* DCB/RSS VMDQ in SRIOV mode, not implement yet */\n@@ -534,6 +557,25 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\t\t\t\t\"unsupported VMDQ mq_mode rx %u\\n\",\n \t\t\t\t\tport_id, dev_conf->rxmode.mq_mode);\n \t\t\treturn (-EINVAL);\n+\t\tcase ETH_MQ_RX_RSS:\n+\t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%\" PRIu8\n+\t\t\t\t\t\" SRIOV active, \"\n+\t\t\t\t\t\"Rx mq mode is changed from:\"\n+\t\t\t\t\t\"mq_mode %u into VMDQ mq_mode %u\\n\",\n+\t\t\t\t\tport_id,\n+\t\t\t\t\tdev_conf->rxmode.mq_mode,\n+\t\t\t\t\tdev->data->dev_conf.rxmode.mq_mode);\n+\t\tcase ETH_MQ_RX_VMDQ_RSS:\n+\t\t\tdev->data->dev_conf.rxmode.mq_mode = ETH_MQ_RX_VMDQ_RSS;\n+\t\t\tif (nb_rx_q <= RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool)\n+\t\t\t\tif (rte_eth_dev_check_vf_rss_rxq_num(port_id, nb_rx_q) != 0) {\n+\t\t\t\t\tPMD_DEBUG_TRACE(\"ethdev port_id=%d\"\n+\t\t\t\t\t\t\" SRIOV active, invalid queue\"\n+\t\t\t\t\t\t\" number for VMDQ RSS\\n\",\n+\t\t\t\t\t\tport_id);\n+\t\t\t\t\treturn -EINVAL;\n+\t\t\t\t}\n+\t\t\tbreak;\n \t\tdefault: /* ETH_MQ_RX_VMDQ_ONLY or ETH_MQ_RX_NONE */\n \t\t\t/* if nothing mq mode configure, use default scheme */\n \t\t\tdev->data->dev_conf.rxmode.mq_mode = ETH_MQ_RX_VMDQ_ONLY;\n@@ -553,8 +595,6 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,\n \t\tdefault: /* ETH_MQ_TX_VMDQ_ONLY or ETH_MQ_TX_NONE */\n \t\t\t/* if nothing mq mode configure, use default scheme */\n \t\t\tdev->data->dev_conf.txmode.mq_mode = ETH_MQ_TX_VMDQ_ONLY;\n-\t\t\tif (RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool > 1)\n-\t\t\t\tRTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = 1;\n \t\t\tbreak;\n \t\t}\n \n", "prefixes": [ "dpdk-dev", "v5", "4/6" ] }