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{
    "id": 2200,
    "url": "https://patches.dpdk.org/api/patches/2200/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1420527230-17037-11-git-send-email-zlu@ezchip.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
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    "msgid": "<1420527230-17037-11-git-send-email-zlu@ezchip.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1420527230-17037-11-git-send-email-zlu@ezchip.com",
    "date": "2015-01-06T06:53:48",
    "name": "[dpdk-dev,v2,10/12] app/test: remove architecture specific code from cpuflags test",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "caa1d6ec2894f9318d537bf5eb69c107e4a8d6e8",
    "submitter": {
        "id": 130,
        "url": "https://patches.dpdk.org/api/people/130/?format=api",
        "name": "Zhigang Lu",
        "email": "zlu@ezchip.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1420527230-17037-11-git-send-email-zlu@ezchip.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/2200/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/2200/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        ],
        "From": "Zhigang Lu <zlu@ezchip.com>",
        "To": "<dev@dpdk.org>",
        "Date": "Tue, 6 Jan 2015 14:53:48 +0800",
        "Message-ID": "<1420527230-17037-11-git-send-email-zlu@ezchip.com>",
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        "Subject": "[dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific\n\tcode from cpuflags test",
        "X-BeenThere": "dev@dpdk.org",
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        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
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    },
    "content": "Test all defined CPU flags for supported architectures so that we\ndo not have to include conditional compilation for each architecture\nin app test case.\n\nSigned-off-by: Zhigang Lu <zlu@ezchip.com>\nSigned-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>\n---\n app/test/test_cpuflags.c | 78 ++++--------------------------------------------\n 1 file changed, 5 insertions(+), 73 deletions(-)",
    "diff": "diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c\nindex 5aeba5d..1a58c03 100644\n--- a/app/test/test_cpuflags.c\n+++ b/app/test/test_cpuflags.c\n@@ -77,81 +77,13 @@ cpu_flag_result(int result)\n static int\n test_cpuflags(void)\n {\n-\tint result;\n+\tint i, result;\n \tprintf(\"\\nChecking for flags from different registers...\\n\");\n \n-#ifdef RTE_ARCH_PPC_64\n-\tprintf(\"Check for PPC64:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_PPC64);\n-\n-\tprintf(\"Check for PPC32:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_PPC32);\n-\n-\tprintf(\"Check for VSX:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_VSX);\n-\n-\tprintf(\"Check for DFP:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_DFP);\n-\n-\tprintf(\"Check for FPU:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_FPU);\n-\n-\tprintf(\"Check for SMT:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_SMT);\n-\n-\tprintf(\"Check for MMU:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_MMU);\n-\n-\tprintf(\"Check for ALTIVEC:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_ALTIVEC);\n-\n-\tprintf(\"Check for ARCH_2_06:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_06);\n-\n-\tprintf(\"Check for ARCH_2_07:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_07);\n-\n-\tprintf(\"Check for ICACHE_SNOOP:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);\n-#else\n-\tprintf(\"Check for SSE:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_SSE);\n-\n-\tprintf(\"Check for SSE2:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_SSE2);\n-\n-\tprintf(\"Check for SSE3:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_SSE3);\n-\n-\tprintf(\"Check for SSE4.1:\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_1);\n-\n-\tprintf(\"Check for SSE4.2:\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_2);\n-\n-\tprintf(\"Check for AVX:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_AVX);\n-\n-\tprintf(\"Check for AVX2:\\t\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_AVX2);\n-\n-\tprintf(\"Check for TRBOBST:\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_TRBOBST);\n-\n-\tprintf(\"Check for ENERGY_EFF:\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_ENERGY_EFF);\n-\n-\tprintf(\"Check for LAHF_SAHF:\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_LAHF_SAHF);\n-\n-\tprintf(\"Check for 1GB_PG:\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_1GB_PG);\n-\n-\tprintf(\"Check for INVTSC:\\t\");\n-\tCHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC);\n-\n-\n-#endif\n+\tfor (i = 0; i < RTE_CPUFLAG_NUMFLAGS; i++) {\n+\t\tprintf(\"Check for %s:\\t\\t\", cpu_feature_table[i].name);\n+\t\tCHECK_FOR_FLAG(i);\n+\t}\n \n \t/*\n \t * Check if invalid data is handled properly\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "10/12"
    ]
}