Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2192/?format=api
https://patches.dpdk.org/api/patches/2192/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1420527230-17037-3-git-send-email-zlu@ezchip.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1420527230-17037-3-git-send-email-zlu@ezchip.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1420527230-17037-3-git-send-email-zlu@ezchip.com", "date": "2015-01-06T06:53:40", "name": "[dpdk-dev,v2,02/12] eal/tile: add byte order operations for TileGx", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "91067bd96c387c1997f49ba85deecb8e06829e72", "submitter": { "id": 130, "url": "https://patches.dpdk.org/api/people/130/?format=api", "name": "Zhigang Lu", "email": "zlu@ezchip.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1420527230-17037-3-git-send-email-zlu@ezchip.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/2192/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/2192/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 59B035921;\n\tTue, 6 Jan 2015 07:58:32 +0100 (CET)", "from emea01-db3-obe.outbound.protection.outlook.com\n\t(mail-db3on0081.outbound.protection.outlook.com [157.55.234.81])\n\tby dpdk.org (Postfix) with ESMTP id 1EFD058DD\n\tfor <dev@dpdk.org>; Tue, 6 Jan 2015 07:58:31 +0100 (CET)", "from DB4PR02CA0049.eurprd02.prod.outlook.com (10.242.174.177) by\n\tAM2PR02MB0577.eurprd02.prod.outlook.com (25.160.56.23) with Microsoft\n\tSMTP Server (TLS) id 15.1.49.12; Tue, 6 Jan 2015 06:58:29 +0000", "from DB3FFO11FD006.protection.gbl (2a01:111:f400:7e04::152) by\n\tDB4PR02CA0049.outlook.office365.com (2a01:111:e400:983b::49) with\n\tMicrosoft SMTP Server (TLS) id 15.1.49.12 via Frontend Transport;\n\tTue, 6 Jan 2015 06:58:28 +0000", "from bjgfarm-2.internal.tilera.com (124.207.145.166) by\n\tDB3FFO11FD006.mail.protection.outlook.com (10.47.216.95) with\n\tMicrosoft SMTP Server (TLS) id 15.1.49.13 via Frontend Transport;\n\tTue, 6 Jan 2015 06:58:27 +0000", "(from zlu@localhost)\n\tby bjgfarm-2.internal.tilera.com (8.14.4/8.14.4/Submit) id\n\tt066uo3W017135; Tue, 6 Jan 2015 14:56:50 +0800" ], "From": "Zhigang Lu <zlu@ezchip.com>", "To": "<dev@dpdk.org>", "Date": "Tue, 6 Jan 2015 14:53:40 +0800", "Message-ID": "<1420527230-17037-3-git-send-email-zlu@ezchip.com>", "X-Mailer": "git-send-email 2.1.2", "In-Reply-To": "<1420527230-17037-1-git-send-email-zlu@ezchip.com>", "References": "<1420527230-17037-1-git-send-email-zlu@ezchip.com>", "X-EOPAttributedMessage": "0", "Received-SPF": "Fail (protection.outlook.com: domain of ezchip.com does not\n\tdesignate 124.207.145.166 as permitted sender)\n\treceiver=protection.outlook.com; client-ip=124.207.145.166;\n\thelo=bjgfarm-2.internal.tilera.com;", "Authentication-Results": "spf=fail (sender IP is 124.207.145.166)\n\tsmtp.mailfrom=zlu@ezchip.com; ", "X-Forefront-Antispam-Report": "CIP:124.207.145.166; CTRY:CN; IPV:NLI; EFV:NLI; \n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(339900001)(199003)(189002)(31966008)(50986999)(19580405001)(6806004)(84676001)(92566001)(110136001)(4396001)(104016003)(89996001)(21056001)(99396003)(33646002)(97736003)(50226001)(87936001)(19580395003)(76176999)(120916001)(48376002)(47776003)(50466002)(42186005)(46102003)(36756003)(68736005)(2351001)(106466001)(2950100001)(64706001)(20776003)(62966003)(105606002)(229853001)(107046002)(77156002)(86362001);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:AM2PR02MB0577;\n\tH:bjgfarm-2.internal.tilera.com; \n\tFPR:; SPF:Fail; MLV:sfv; PTR:ErrorRetry; A:1; MX:1; LANG:en; ", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-DmarcAction": "None", "X-Microsoft-Antispam": [ "UriScan:;", "BCL:0;PCL:0;RULEID:(3005003);SRVR:AM2PR02MB0577;" ], "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-Exchange-Antispam-Report-CFA-Test": [ "BCL:0; PCL:0; RULEID:(601004);\n\tSRVR:AM2PR02MB0577; ", "BCL:0; PCL:0; RULEID:;\n\tSRVR:AM2PR02MB0577; " ], "X-Forefront-PRVS": "0448A97BF2", "X-OriginatorOrg": "ezchip.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "06 Jan 2015 06:58:27.2526\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "0fc16e0a-3cd3-4092-8b2f-0a42cff122c3", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=0fc16e0a-3cd3-4092-8b2f-0a42cff122c3;\n\tIp=[124.207.145.166]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM2PR02MB0577", "Subject": "[dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order operations for\n\tTileGx", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds architecture specific byte swap and endianness\noperations for TileGx.\n\nSigned-off-by: Zhigang Lu <zlu@ezchip.com>\nSigned-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>\n---\n .../common/include/arch/tile/rte_byteorder.h | 70 ++++++++++++++++++++++\n 1 file changed, 70 insertions(+)\n create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h", "diff": "diff --git a/lib/librte_eal/common/include/arch/tile/rte_byteorder.h b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h\nnew file mode 100644\nindex 0000000..38f3a23\n--- /dev/null\n+++ b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h\n@@ -0,0 +1,70 @@\n+/*-\n+ * BSD LICENSE\n+ *\n+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Tilera Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _RTE_BYTEORDER_TILE_H_\n+#define _RTE_BYTEORDER_TILE_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include \"generic/rte_byteorder.h\"\n+\n+/*\n+ * __builtin_bswap16 is only available gcc 4.8 and upwards\n+ */\n+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)\n+#define rte_bswap16(x) ((uint16_t)rte_constant_bswap16(x))\n+#endif\n+\n+#define rte_cpu_to_le_16(x) (x)\n+#define rte_cpu_to_le_32(x) (x)\n+#define rte_cpu_to_le_64(x) (x)\n+\n+#define rte_cpu_to_be_16(x) rte_bswap16(x)\n+#define rte_cpu_to_be_32(x) rte_bswap32(x)\n+#define rte_cpu_to_be_64(x) rte_bswap64(x)\n+\n+#define rte_le_to_cpu_16(x) (x)\n+#define rte_le_to_cpu_32(x) (x)\n+#define rte_le_to_cpu_64(x) (x)\n+\n+#define rte_be_to_cpu_16(x) rte_bswap16(x)\n+#define rte_be_to_cpu_32(x) rte_bswap32(x)\n+#define rte_be_to_cpu_64(x) rte_bswap64(x)\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_BYTEORDER_TILE_H_ */\n", "prefixes": [ "dpdk-dev", "v2", "02/12" ] }{ "id": 2192, "url": "