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GET /api/patches/19306/?format=api
{ "id": 19306, "url": "https://patches.dpdk.org/api/patches/19306/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20170113081641.GA17635@localhost.localdomain/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20170113081641.GA17635@localhost.localdomain>", "list_archive_url": "https://inbox.dpdk.org/dev/20170113081641.GA17635@localhost.localdomain", "date": "2017-01-13T08:17:05", "name": "[dpdk-dev,v3,15/29] crypto/qat: use eal I/O device memory read/write API", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "633e9df587f1ef48bc9d490741d8dcc72251cb75", "submitter": { "id": 305, "url": "https://patches.dpdk.org/api/people/305/?format=api", "name": "Jerin Jacob", "email": "jerin.jacob@caviumnetworks.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20170113081641.GA17635@localhost.localdomain/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/19306/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/19306/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 7BDF2F8AA;\n\tFri, 13 Jan 2017 09:17:34 +0100 (CET)", "from NAM01-BY2-obe.outbound.protection.outlook.com\n\t(mail-by2nam01on0041.outbound.protection.outlook.com [104.47.34.41])\n\tby dpdk.org (Postfix) with ESMTP id EB781F6D2\n\tfor <dev@dpdk.org>; Fri, 13 Jan 2017 09:17:31 +0100 (CET)", "from localhost.localdomain (171.61.97.114) by\n\tCY1PR0701MB1726.namprd07.prod.outlook.com (10.163.21.140) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P384) id\n\t15.1.845.12; Fri, 13 Jan 2017 08:17:24 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=IeRWcm1zZUhUlYCgQwG19zbzvoNM57AKzp03xTLRe3I=;\n\tb=hKVqjS46cnUxlTsiFiIM/73deC7ok67eg0p26FqPWdpqWZFfeuq3EEAx/zu4XuS+3kPuFQLG9ULqwwdtpJ1+6QQtUO2JRuS1RrBAVEmJopeWw11mx4xkb3fhBy/ogL01rPMCEhCErir4ajnAk+jY1bM6R+KYmBYlOOMb5s1G1Cg=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Jerin.Jacob@cavium.com; ", "Date": "Fri, 13 Jan 2017 13:47:05 +0530", "From": "Jerin Jacob <jerin.jacob@caviumnetworks.com>", "To": "Ferruh Yigit <ferruh.yigit@intel.com>", "CC": "<dev@dpdk.org>, <konstantin.ananyev@intel.com>,\n\t<thomas.monjalon@6wind.com>, <bruce.richardson@intel.com>,\n\t<jianbo.liu@linaro.org>, <viktorin@rehivetech.com>,\n\t<santosh.shukla@caviumnetworks.com>,\n\tJohn Griffin <john.griffin@intel.com>, \n\tFiona Trahe <fiona.trahe@intel.com>, Deepak Kumar Jain\n\t<deepak.k.jain@intel.com>", "Message-ID": "<20170113081641.GA17635@localhost.localdomain>", "References": "<1482832175-27199-1-git-send-email-jerin.jacob@caviumnetworks.com>\n\t<1484212646-10338-1-git-send-email-jerin.jacob@caviumnetworks.com>\n\t<1484212646-10338-16-git-send-email-jerin.jacob@caviumnetworks.com>\n\t<6bb9980b-f546-38d5-044a-63507510f6a5@intel.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; 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PCL:0;\n\tRULEID:(6040375)(601004)(2401047)(5005006)(8121501046)(10201501046)(3002001)(6041248)(20161123564025)(20161123562025)(20161123555025)(20161123560025)(6072148);\n\tSRVR:CY1PR0701MB1726; BCL:0; PCL:0; RULEID:; SRVR:CY1PR0701MB1726; ", "X-Forefront-PRVS": "018632C080", "X-Forefront-Antispam-Report": "SFV:NSPM;\n\tSFS:(10009020)(4630300001)(6009001)(6069001)(7916002)(39450400003)(24454002)(189002)(199003)(76104003)(377454003)(42882006)(6666003)(6916009)(81166006)(2950100002)(189998001)(93886004)(4326007)(92566002)(7416002)(7736002)(9686003)(8676002)(5660300001)(305945005)(81156014)(50986999)(110136003)(97736004)(54356999)(66066001)(76176999)(54906002)(4001350100001)(25786008)(33656002)(97756001)(105586002)(2906002)(47776003)(61506002)(42186005)(50466002)(55016002)(3846002)(23726003)(68736007)(101416001)(229853002)(106356001)(6116002)(1076002)(46406003)(38730400001)(6506006)(83506001)(18370500001);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:CY1PR0701MB1726;\n\tH:localhost.localdomain; FPR:; \n\tSPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; ", "Received-SPF": "None (protection.outlook.com: cavium.com does not designate\n\tpermitted sender hosts)", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "13 Jan 2017 08:17:24.2871\n\t(UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY1PR0701MB1726", "Subject": "Re: [dpdk-dev] [PATCH v3 15/29] crypto/qat: use eal I/O device\n\tmemory read/write API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "On Thu, Jan 12, 2017 at 07:09:22PM +0000, Ferruh Yigit wrote:\n> Hi Jerin,\n> \n> On 1/12/2017 9:17 AM, Jerin Jacob wrote:\n> <...>\n> \n> > +#include <rte_io.h>\n> > +\n> > /* CSR write macro */\n> > -#define ADF_CSR_WR(csrAddr, csrOffset, val) \\\n> > -\t(void)((*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset)) \\\n> > -\t\t\t= (val)))\n> > +#define ADF_CSR_WR(csrAddr, csrOffset, val)\t\t\\\n> > +\trte_write32(val, (((uint8_t *)csrAddr) + csrOffset))\n> \n> For IA, this update introduces an extra compiler barrier (rte_io_wmb()),\n> which is indeed not a must, is this correct?\n\nAFAIK, Compiler barrier is required for IA. I am not an IA expert, if\nsomeone thinks it needs to changed then I can fix it in following commit\nin this patch series by making rte_io_wmb() and rte_io_rmb() as empty.\n\nLet me know.\n\nAFAIK, Linux kernel code has a barrier in readl/writel for IA.\n\nTypically we don't use any non relaxed versions in fast path.In fast\ntypically all the drivers has explicit write barrier for doorbell write\nand followed by a relaxed version of write. IMO, In any event, it won't\ngenerate performance regression.\n\n[dpdk-master] $ git show\n70c343bdc8c33a51a9db23cd58122bdfc120a58f\ncommit 70c343bdc8c33a51a9db23cd58122bdfc120a58f\nAuthor: Jerin Jacob <jerin.jacob@caviumnetworks.com>\nDate: Mon Dec 5 06:36:49 2016 +0530\n\n eal/x86: define I/O device memory barriers for IA\n\n The patch does not provide any functional change for IA.\n I/O barriers are mapped to existing smp barriers.\n\n CC: Bruce Richardson <bruce.richardson@intel.com>\n CC: Konstantin Ananyev <konstantin.ananyev@intel.com>\n Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>\n\n #ifndef RTE_FORCE_INTRINSICS\n\n> \n> If so, does it make sense to override these functions for x86, and make\n> rte_writeX = rte_writeX_relaxed\n> rte_readX = rte_readX_relaxed\n> \n> > \n> > /* CSR read macro */\n> > -#define ADF_CSR_RD(csrAddr, csrOffset) \\\n> > -\t(*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset)))\n> > +#define ADF_CSR_RD(csrAddr, csrOffset)\t\t\t\\\n> > +\trte_read32((((uint8_t *)csrAddr) + csrOffset))\n> \n> This patchset both introduces new rte_readX/rte_writeX functions, also\n> applies them into drivers.\n> \n> While applying them, it changes the behavior.\n> Like above code was doing a read, but after update it does read and\n> read_memory_barrier.\n> \n> What do you think this patchset updates usage in a manner that keeps\n> behavior exact same. Like using rte_read32_relaxed for this case.\n> And doing architecture related updates in a different patchset?\n\nNeed to use rte_read32 at this commit otherwise it will break for ARM.\nThat's was all point for this patchset.\nFor performance regression, we can always verify by taking delta\nbetween this changeset and the previous changeset. If you think, I need\nto make rte_io_wmb()/rte_io_rmb() as empty for IA then I could do that\nas well.\n\n\n> \n> This both makes easy to see architecture specific updates, and makes\n> easy to trace any possible performance issues by this patchset.\n> \n> > \n> > #define ADF_BANK_INT_SRC_SEL_MASK_0 0x4444444CUL\n> > #define ADF_BANK_INT_SRC_SEL_MASK_X 0x44444444UL\n> > \n>", "diff": "diff --git a/lib/librte_eal/common/include/arch/x86/rte_atomic.h\nb/lib/librte_eal/common/include/arch/x86/rte_atomic.h\nindex 00b1cdf..4eac666 100644\n--- a/lib/librte_eal/common/include/arch/x86/rte_atomic.h\n+++ b/lib/librte_eal/common/include/arch/x86/rte_atomic.h\n@@ -61,6 +61,12 @@ extern \"C\" {\n \n #define rte_smp_rmb() rte_compiler_barrier()\n \n+#define rte_io_mb() rte_mb()\n+\n+#define rte_io_wmb() rte_compiler_barrier()\n+\n+#define rte_io_rmb() rte_compiler_barrier()\n+\n /*------------------------- 16 bit atomic operations\n * -------------------------*/\n \n", "prefixes": [ "dpdk-dev", "v3", "15/29" ] }