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GET /api/patches/17107/?format=api
{ "id": 17107, "url": "https://patches.dpdk.org/api/patches/17107/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1479740470-6723-5-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1479740470-6723-5-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1479740470-6723-5-git-send-email-arybchenko@solarflare.com", "date": "2016-11-21T15:00:18", "name": "[dpdk-dev,04/56] net/sfc: import libefx filters support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "bfd3e8e8c8aedfc14f5e5307f79c03337bd99ce8", "submitter": { "id": 607, "url": "https://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1479740470-6723-5-git-send-email-arybchenko@solarflare.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/17107/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/17107/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 80178558C;\n\tMon, 21 Nov 2016 16:02:23 +0100 (CET)", "from nbfkord-smmo02.seg.att.com (nbfkord-smmo02.seg.att.com\n\t[209.65.160.78]) by dpdk.org (Postfix) with ESMTP id 7BBC12C48\n\tfor <dev@dpdk.org>; Mon, 21 Nov 2016 16:01:27 +0100 (CET)", "from unknown [12.187.104.26]\n\tby nbfkord-smmo02.seg.att.com(mxl_mta-7.2.4-7) with SMTP id\n\t54c03385.0.1541294.00-2341.3424168.nbfkord-smmo02.seg.att.com\n\t(envelope-from <arybchenko@solarflare.com>); \n\tMon, 21 Nov 2016 15:01:27 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Mon, 21 Nov 2016 07:01:21 -0800", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 21 Nov 2016 07:01:20 -0800", "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tuALF1JfN007108 for <dev@dpdk.org>; Mon, 21 Nov 2016 15:01:19 GMT", "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tuALF1J2t006765 for <dev@dpdk.org>; Mon, 21 Nov 2016 15:01:19 GMT" ], "X-MXL-Hash": "58330c473d0af518-8ee1d29e9b02a5cbd740f0c052cbcedc565d4517", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "Date": "Mon, 21 Nov 2016 15:00:18 +0000", "Message-ID": "<1479740470-6723-5-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.2.3", "In-Reply-To": "<1479740470-6723-1-git-send-email-arybchenko@solarflare.com>", "References": "<1479740470-6723-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-AnalysisOut": [ "[v=2.1 cv=UI/baXry c=1 sm=1 tr=0 a=8BlWFWvVlq5taO8ncb8nKg==]", "[:17 a=L24OOQBejmoA:10 a=zRKbQ67AAAAA:8 a=BdOJWFQ3u9IY5zPS7]", "[7sA:9 a=oPJt01YDbrsomwVw:21 a=kEvDsVCiNhxru1AA:21 a=-063Su]", "[OGh3fMR5gy:21 a=PA03WX8tBzeizutn5_OT:22]" ], "X-Spam": "[F=0.4870059538; CM=0.500; S=0.487(2015072901)]", "X-MAIL-FROM": "<arybchenko@solarflare.com>", "X-SOURCE-IP": "[12.187.104.26]", "Subject": "[dpdk-dev] [PATCH 04/56] net/sfc: import libefx filters support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Filtering capabilities depend on NIC family and used firmware\nvariant. Provided API allows to get supported filter types\n(in a priority order), add/delete individual filters and\nrestore entire filter table after, for example, NIC management\nCPU reboot.\n\nRx filters allow to redirect matching flow to specified Rx queue.\n\nTx filters allow to control generated traffic (e.g. to implement\nvirtual function anti-spoofing control).\n\nEFSYS_OPT_FILTER should be enabled to use it. It is required\nfor SFN7xxx and SFN8xxx adapter families support.\n\nFrom Solarflare Communications Inc.\n\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/efx/base/efx.h | 157 ++++++++++++++++\n drivers/net/sfc/efx/base/efx_check.h | 5 +\n drivers/net/sfc/efx/base/efx_filter.c | 332 ++++++++++++++++++++++++++++++++++\n drivers/net/sfc/efx/base/efx_impl.h | 38 ++++\n 4 files changed, 532 insertions(+)\n create mode 100644 drivers/net/sfc/efx/base/efx_filter.c", "diff": "diff --git a/drivers/net/sfc/efx/base/efx.h b/drivers/net/sfc/efx/base/efx.h\nindex 79c6fdc..485ce51 100644\n--- a/drivers/net/sfc/efx/base/efx.h\n+++ b/drivers/net/sfc/efx/base/efx.h\n@@ -1044,6 +1044,163 @@ efx_tx_qdestroy(\n \n /* FILTER */\n \n+#if EFSYS_OPT_FILTER\n+\n+#define\tEFX_ETHER_TYPE_IPV4 0x0800\n+#define\tEFX_ETHER_TYPE_IPV6 0x86DD\n+\n+#define\tEFX_IPPROTO_TCP 6\n+#define\tEFX_IPPROTO_UDP 17\n+\n+typedef enum efx_filter_flag_e {\n+\tEFX_FILTER_FLAG_RX_RSS = 0x01,\t\t/* use RSS to spread across\n+\t\t\t\t\t\t * multiple queues */\n+\tEFX_FILTER_FLAG_RX_SCATTER = 0x02,\t/* enable RX scatter */\n+\tEFX_FILTER_FLAG_RX_OVER_AUTO = 0x04,\t/* Override an automatic filter\n+\t\t\t\t\t\t * (priority EFX_FILTER_PRI_AUTO).\n+\t\t\t\t\t\t * May only be set by the filter\n+\t\t\t\t\t\t * implementation for each type.\n+\t\t\t\t\t\t * A removal request will\n+\t\t\t\t\t\t * restore the automatic filter\n+\t\t\t\t\t\t * in its place. */\n+\tEFX_FILTER_FLAG_RX = 0x08,\t\t/* Filter is for RX */\n+\tEFX_FILTER_FLAG_TX = 0x10,\t\t/* Filter is for TX */\n+} efx_filter_flag_t;\n+\n+typedef enum efx_filter_match_flags_e {\n+\tEFX_FILTER_MATCH_REM_HOST = 0x0001,\t/* Match by remote IP host\n+\t\t\t\t\t\t * address */\n+\tEFX_FILTER_MATCH_LOC_HOST = 0x0002,\t/* Match by local IP host\n+\t\t\t\t\t\t * address */\n+\tEFX_FILTER_MATCH_REM_MAC = 0x0004,\t/* Match by remote MAC address */\n+\tEFX_FILTER_MATCH_REM_PORT = 0x0008,\t/* Match by remote TCP/UDP port */\n+\tEFX_FILTER_MATCH_LOC_MAC = 0x0010,\t/* Match by remote TCP/UDP port */\n+\tEFX_FILTER_MATCH_LOC_PORT = 0x0020,\t/* Match by local TCP/UDP port */\n+\tEFX_FILTER_MATCH_ETHER_TYPE = 0x0040,\t/* Match by Ether-type */\n+\tEFX_FILTER_MATCH_INNER_VID = 0x0080,\t/* Match by inner VLAN ID */\n+\tEFX_FILTER_MATCH_OUTER_VID = 0x0100,\t/* Match by outer VLAN ID */\n+\tEFX_FILTER_MATCH_IP_PROTO = 0x0200,\t/* Match by IP transport\n+\t\t\t\t\t\t * protocol */\n+\tEFX_FILTER_MATCH_LOC_MAC_IG = 0x0400,\t/* Match by local MAC address\n+\t\t\t\t\t\t * I/G bit. Used for RX default\n+\t\t\t\t\t\t * unicast and multicast/\n+\t\t\t\t\t\t * broadcast filters. */\n+} efx_filter_match_flags_t;\n+\n+typedef enum efx_filter_priority_s {\n+\tEFX_FILTER_PRI_HINT = 0,\t/* Performance hint */\n+\tEFX_FILTER_PRI_AUTO,\t\t/* Automatic filter based on device\n+\t\t\t\t\t * address list or hardware\n+\t\t\t\t\t * requirements. This may only be used\n+\t\t\t\t\t * by the filter implementation for\n+\t\t\t\t\t * each NIC type. */\n+\tEFX_FILTER_PRI_MANUAL,\t\t/* Manually configured filter */\n+\tEFX_FILTER_PRI_REQUIRED,\t/* Required for correct behaviour of the\n+\t\t\t\t\t * client (e.g. SR-IOV, HyperV VMQ etc.)\n+\t\t\t\t\t */\n+} efx_filter_priority_t;\n+\n+/*\n+ * FIXME: All these fields are assumed to be in little-endian byte order.\n+ * It may be better for some to be big-endian. See bug42804.\n+ */\n+\n+typedef struct efx_filter_spec_s {\n+\tuint32_t\tefs_match_flags:12;\n+\tuint32_t\tefs_priority:2;\n+\tuint32_t\tefs_flags:6;\n+\tuint32_t\tefs_dmaq_id:12;\n+\tuint32_t\tefs_rss_context;\n+\tuint16_t\tefs_outer_vid;\n+\tuint16_t\tefs_inner_vid;\n+\tuint8_t\t\tefs_loc_mac[EFX_MAC_ADDR_LEN];\n+\tuint8_t\t\tefs_rem_mac[EFX_MAC_ADDR_LEN];\n+\tuint16_t\tefs_ether_type;\n+\tuint8_t\t\tefs_ip_proto;\n+\tuint16_t\tefs_loc_port;\n+\tuint16_t\tefs_rem_port;\n+\tefx_oword_t\tefs_rem_host;\n+\tefx_oword_t\tefs_loc_host;\n+} efx_filter_spec_t;\n+\n+\n+/* Default values for use in filter specifications */\n+#define\tEFX_FILTER_SPEC_RSS_CONTEXT_DEFAULT\t0xffffffff\n+#define\tEFX_FILTER_SPEC_RX_DMAQ_ID_DROP\t\t0xfff\n+#define\tEFX_FILTER_SPEC_VID_UNSPEC\t\t0xffff\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_init(\n+\t__in\t\tefx_nic_t *enp);\n+\n+extern\t\t\tvoid\n+efx_filter_fini(\n+\t__in\t\tefx_nic_t *enp);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_insert(\n+\t__in\t\tefx_nic_t *enp,\n+\t__inout\t\tefx_filter_spec_t *spec);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_remove(\n+\t__in\t\tefx_nic_t *enp,\n+\t__inout\t\tefx_filter_spec_t *spec);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_restore(\n+\t__in\t\tefx_nic_t *enp);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_supported_filters(\n+\t__in\t\tefx_nic_t *enp,\n+\t__out\t\tuint32_t *list,\n+\t__out\t\tsize_t *length);\n+\n+extern\t\t\tvoid\n+efx_filter_spec_init_rx(\n+\t__out\t\tefx_filter_spec_t *spec,\n+\t__in\t\tefx_filter_priority_t priority,\n+\t__in\t\tefx_filter_flag_t flags,\n+\t__in\t\tefx_rxq_t *erp);\n+\n+extern\t\t\tvoid\n+efx_filter_spec_init_tx(\n+\t__out\t\tefx_filter_spec_t *spec,\n+\t__in\t\tefx_txq_t *etp);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_spec_set_ipv4_local(\n+\t__inout\t\tefx_filter_spec_t *spec,\n+\t__in\t\tuint8_t proto,\n+\t__in\t\tuint32_t host,\n+\t__in\t\tuint16_t port);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_spec_set_ipv4_full(\n+\t__inout\t\tefx_filter_spec_t *spec,\n+\t__in\t\tuint8_t proto,\n+\t__in\t\tuint32_t lhost,\n+\t__in\t\tuint16_t lport,\n+\t__in\t\tuint32_t rhost,\n+\t__in\t\tuint16_t rport);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_spec_set_eth_local(\n+\t__inout\t\tefx_filter_spec_t *spec,\n+\t__in\t\tuint16_t vid,\n+\t__in\t\tconst uint8_t *addr);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_spec_set_uc_def(\n+\t__inout\t\tefx_filter_spec_t *spec);\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_spec_set_mc_def(\n+\t__inout\t\tefx_filter_spec_t *spec);\n+\n+#endif\t/* EFSYS_OPT_FILTER */\n+\n /* HASH */\n \n extern\t__checkReturn\t\tuint32_t\ndiff --git a/drivers/net/sfc/efx/base/efx_check.h b/drivers/net/sfc/efx/base/efx_check.h\nindex 78cfd8e..555c184 100644\n--- a/drivers/net/sfc/efx/base/efx_check.h\n+++ b/drivers/net/sfc/efx/base/efx_check.h\n@@ -59,6 +59,11 @@\n # error \"FALCON_NIC_CFG_OVERRIDE is obsolete and is not supported.\"\n #endif\n \n+#if EFSYS_OPT_FILTER\n+/* Support hardware packet filters */\n+# error \"FILTER requires SIENA or HUNTINGTON or MEDFORD\"\n+#endif /* EFSYS_OPT_FILTER */\n+\n #ifdef EFSYS_OPT_MAC_FALCON_GMAC\n # error \"MAC_FALCON_GMAC is obsolete and is not supported.\"\n #endif\ndiff --git a/drivers/net/sfc/efx/base/efx_filter.c b/drivers/net/sfc/efx/base/efx_filter.c\nnew file mode 100644\nindex 0000000..8ae865f\n--- /dev/null\n+++ b/drivers/net/sfc/efx/base/efx_filter.c\n@@ -0,0 +1,332 @@\n+/*\n+ * Copyright (c) 2007-2016 Solarflare Communications Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright notice,\n+ * this list of conditions and the following disclaimer.\n+ * 2. Redistributions in binary form must reproduce the above copyright notice,\n+ * this list of conditions and the following disclaimer in the documentation\n+ * and/or other materials provided with the distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,\n+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\n+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR\n+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\n+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\n+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\n+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\n+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\n+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ * The views and conclusions contained in the software and documentation are\n+ * those of the authors and should not be interpreted as representing official\n+ * policies, either expressed or implied, of the FreeBSD Project.\n+ */\n+\n+#include \"efx.h\"\n+#include \"efx_impl.h\"\n+\n+\n+#if EFSYS_OPT_FILTER\n+\n+\t__checkReturn\tefx_rc_t\n+efx_filter_insert(\n+\t__in\t\tefx_nic_t *enp,\n+\t__inout\t\tefx_filter_spec_t *spec)\n+{\n+\tconst efx_filter_ops_t *efop = enp->en_efop;\n+\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\tEFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX);\n+\n+\treturn (efop->efo_add(enp, spec, B_FALSE));\n+}\n+\n+\t__checkReturn\tefx_rc_t\n+efx_filter_remove(\n+\t__in\t\tefx_nic_t *enp,\n+\t__inout\t\tefx_filter_spec_t *spec)\n+{\n+\tconst efx_filter_ops_t *efop = enp->en_efop;\n+\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\tEFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX);\n+\n+\treturn (efop->efo_delete(enp, spec));\n+}\n+\n+\t__checkReturn\tefx_rc_t\n+efx_filter_restore(\n+\t__in\t\tefx_nic_t *enp)\n+{\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);\n+\n+\tif ((rc = enp->en_efop->efo_restore(enp)) != 0)\n+\t\tgoto fail1;\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t__checkReturn\tefx_rc_t\n+efx_filter_init(\n+\t__in\t\tefx_nic_t *enp)\n+{\n+\tconst efx_filter_ops_t *efop;\n+\tefx_rc_t rc;\n+\n+\t/* Check that efx_filter_spec_t is 64 bytes. */\n+\tEFX_STATIC_ASSERT(sizeof (efx_filter_spec_t) == 64);\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);\n+\tEFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_FILTER));\n+\n+\tswitch (enp->en_family) {\n+\n+\tdefault:\n+\t\tEFSYS_ASSERT(0);\n+\t\trc = ENOTSUP;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif ((rc = efop->efo_init(enp)) != 0)\n+\t\tgoto fail2;\n+\n+\tenp->en_efop = efop;\n+\tenp->en_mod_flags |= EFX_MOD_FILTER;\n+\treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\tenp->en_efop = NULL;\n+\tenp->en_mod_flags &= ~EFX_MOD_FILTER;\n+\treturn (rc);\n+}\n+\n+\t\t\tvoid\n+efx_filter_fini(\n+\t__in\t\tefx_nic_t *enp)\n+{\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);\n+\n+\tenp->en_efop->efo_fini(enp);\n+\n+\tenp->en_efop = NULL;\n+\tenp->en_mod_flags &= ~EFX_MOD_FILTER;\n+}\n+\n+\t__checkReturn\tefx_rc_t\n+efx_filter_supported_filters(\n+\t__in\t\tefx_nic_t *enp,\n+\t__out\t\tuint32_t *list,\n+\t__out\t\tsize_t *length)\n+{\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);\n+\tEFSYS_ASSERT(enp->en_efop->efo_supported_filters != NULL);\n+\n+\tif ((rc = enp->en_efop->efo_supported_filters(enp, list, length)) != 0)\n+\t\tgoto fail1;\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t__checkReturn\tefx_rc_t\n+efx_filter_reconfigure(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__in_ecount(6)\t\t\tuint8_t const *mac_addr,\n+\t__in\t\t\t\tboolean_t all_unicst,\n+\t__in\t\t\t\tboolean_t mulcst,\n+\t__in\t\t\t\tboolean_t all_mulcst,\n+\t__in\t\t\t\tboolean_t brdcst,\n+\t__in_ecount(6*count)\t\tuint8_t const *addrs,\n+\t__in\t\t\t\tuint32_t count)\n+{\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);\n+\tEFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);\n+\n+\tif (enp->en_efop->efo_reconfigure != NULL) {\n+\t\tif ((rc = enp->en_efop->efo_reconfigure(enp, mac_addr,\n+\t\t\t\t\t\t\tall_unicst, mulcst,\n+\t\t\t\t\t\t\tall_mulcst, brdcst,\n+\t\t\t\t\t\t\taddrs, count)) != 0)\n+\t\t\tgoto fail1;\n+\t}\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t\tvoid\n+efx_filter_spec_init_rx(\n+\t__out\t\tefx_filter_spec_t *spec,\n+\t__in\t\tefx_filter_priority_t priority,\n+\t__in\t\tefx_filter_flag_t flags,\n+\t__in\t\tefx_rxq_t *erp)\n+{\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\tEFSYS_ASSERT3P(erp, !=, NULL);\n+\tEFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS |\n+\t\t\t\tEFX_FILTER_FLAG_RX_SCATTER)) == 0);\n+\n+\tmemset(spec, 0, sizeof (*spec));\n+\tspec->efs_priority = priority;\n+\tspec->efs_flags = EFX_FILTER_FLAG_RX | flags;\n+\tspec->efs_rss_context = EFX_FILTER_SPEC_RSS_CONTEXT_DEFAULT;\n+\tspec->efs_dmaq_id = (uint16_t)erp->er_index;\n+}\n+\n+\t\tvoid\n+efx_filter_spec_init_tx(\n+\t__out\t\tefx_filter_spec_t *spec,\n+\t__in\t\tefx_txq_t *etp)\n+{\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\tEFSYS_ASSERT3P(etp, !=, NULL);\n+\n+\tmemset(spec, 0, sizeof (*spec));\n+\tspec->efs_priority = EFX_FILTER_PRI_REQUIRED;\n+\tspec->efs_flags = EFX_FILTER_FLAG_TX;\n+\tspec->efs_dmaq_id = (uint16_t)etp->et_index;\n+}\n+\n+\n+/*\n+ * Specify IPv4 host, transport protocol and port in a filter specification\n+ */\n+__checkReturn\t\tefx_rc_t\n+efx_filter_spec_set_ipv4_local(\n+\t__inout\t\tefx_filter_spec_t *spec,\n+\t__in\t\tuint8_t proto,\n+\t__in\t\tuint32_t host,\n+\t__in\t\tuint16_t port)\n+{\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\n+\tspec->efs_match_flags |=\n+\t\tEFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |\n+\t\tEFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT;\n+\tspec->efs_ether_type = EFX_ETHER_TYPE_IPV4;\n+\tspec->efs_ip_proto = proto;\n+\tspec->efs_loc_host.eo_u32[0] = host;\n+\tspec->efs_loc_port = port;\n+\treturn (0);\n+}\n+\n+/*\n+ * Specify IPv4 hosts, transport protocol and ports in a filter specification\n+ */\n+__checkReturn\t\tefx_rc_t\n+efx_filter_spec_set_ipv4_full(\n+\t__inout\t\tefx_filter_spec_t *spec,\n+\t__in\t\tuint8_t proto,\n+\t__in\t\tuint32_t lhost,\n+\t__in\t\tuint16_t lport,\n+\t__in\t\tuint32_t rhost,\n+\t__in\t\tuint16_t rport)\n+{\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\n+\tspec->efs_match_flags |=\n+\t\tEFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |\n+\t\tEFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |\n+\t\tEFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;\n+\tspec->efs_ether_type = EFX_ETHER_TYPE_IPV4;\n+\tspec->efs_ip_proto = proto;\n+\tspec->efs_loc_host.eo_u32[0] = lhost;\n+\tspec->efs_loc_port = lport;\n+\tspec->efs_rem_host.eo_u32[0] = rhost;\n+\tspec->efs_rem_port = rport;\n+\treturn (0);\n+}\n+\n+/*\n+ * Specify local Ethernet address and/or VID in filter specification\n+ */\n+__checkReturn\t\tefx_rc_t\n+efx_filter_spec_set_eth_local(\n+\t__inout\t\tefx_filter_spec_t *spec,\n+\t__in\t\tuint16_t vid,\n+\t__in\t\tconst uint8_t *addr)\n+{\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\tEFSYS_ASSERT3P(addr, !=, NULL);\n+\n+\tif (vid == EFX_FILTER_SPEC_VID_UNSPEC && addr == NULL)\n+\t\treturn (EINVAL);\n+\n+\tif (vid != EFX_FILTER_SPEC_VID_UNSPEC) {\n+\t\tspec->efs_match_flags |= EFX_FILTER_MATCH_OUTER_VID;\n+\t\tspec->efs_outer_vid = vid;\n+\t}\n+\tif (addr != NULL) {\n+\t\tspec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC;\n+\t\tmemcpy(spec->efs_loc_mac, addr, EFX_MAC_ADDR_LEN);\n+\t}\n+\treturn (0);\n+}\n+\n+/*\n+ * Specify matching otherwise-unmatched unicast in a filter specification\n+ */\n+__checkReturn\t\tefx_rc_t\n+efx_filter_spec_set_uc_def(\n+\t__inout\t\tefx_filter_spec_t *spec)\n+{\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\n+\tspec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC_IG;\n+\treturn (0);\n+}\n+\n+/*\n+ * Specify matching otherwise-unmatched multicast in a filter specification\n+ */\n+__checkReturn\t\tefx_rc_t\n+efx_filter_spec_set_mc_def(\n+\t__inout\t\tefx_filter_spec_t *spec)\n+{\n+\tEFSYS_ASSERT3P(spec, !=, NULL);\n+\n+\tspec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC_IG;\n+\tspec->efs_loc_mac[0] = 1;\n+\treturn (0);\n+}\n+\n+\n+\n+#endif /* EFSYS_OPT_FILTER */\ndiff --git a/drivers/net/sfc/efx/base/efx_impl.h b/drivers/net/sfc/efx/base/efx_impl.h\nindex 15bca37..47d4819 100644\n--- a/drivers/net/sfc/efx/base/efx_impl.h\n+++ b/drivers/net/sfc/efx/base/efx_impl.h\n@@ -161,6 +161,33 @@ typedef struct efx_phy_ops_s {\n \tefx_rc_t\t(*epo_oui_get)(efx_nic_t *, uint32_t *);\n } efx_phy_ops_t;\n \n+#if EFSYS_OPT_FILTER\n+typedef struct efx_filter_ops_s {\n+\tefx_rc_t\t(*efo_init)(efx_nic_t *);\n+\tvoid\t\t(*efo_fini)(efx_nic_t *);\n+\tefx_rc_t\t(*efo_restore)(efx_nic_t *);\n+\tefx_rc_t\t(*efo_add)(efx_nic_t *, efx_filter_spec_t *,\n+\t\t\t\t boolean_t may_replace);\n+\tefx_rc_t\t(*efo_delete)(efx_nic_t *, efx_filter_spec_t *);\n+\tefx_rc_t\t(*efo_supported_filters)(efx_nic_t *, uint32_t *, size_t *);\n+\tefx_rc_t\t(*efo_reconfigure)(efx_nic_t *, uint8_t const *, boolean_t,\n+\t\t\t\t boolean_t, boolean_t, boolean_t,\n+\t\t\t\t uint8_t const *, uint32_t);\n+} efx_filter_ops_t;\n+\n+extern\t__checkReturn\tefx_rc_t\n+efx_filter_reconfigure(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__in_ecount(6)\t\t\tuint8_t const *mac_addr,\n+\t__in\t\t\t\tboolean_t all_unicst,\n+\t__in\t\t\t\tboolean_t mulcst,\n+\t__in\t\t\t\tboolean_t all_mulcst,\n+\t__in\t\t\t\tboolean_t brdcst,\n+\t__in_ecount(6*count)\t\tuint8_t const *addrs,\n+\t__in\t\t\t\tuint32_t count);\n+\n+#endif /* EFSYS_OPT_FILTER */\n+\n \n typedef struct efx_port_s {\n \tefx_mac_type_t\t\tep_mac_type;\n@@ -245,6 +272,13 @@ typedef struct efx_nic_ops_s {\n #define\tEFX_RXQ_DC_SIZE 3 /* 64 descriptors */\n #endif\n \n+#if EFSYS_OPT_FILTER\n+\n+typedef struct efx_filter_s {\n+} efx_filter_t;\n+\n+#endif\t/* EFSYS_OPT_FILTER */\n+\n typedef struct efx_drv_cfg_s {\n \tuint32_t\t\tedc_min_vi_count;\n \tuint32_t\t\tedc_max_vi_count;\n@@ -274,6 +308,10 @@ struct efx_nic_s {\n \tconst efx_ev_ops_t\t*en_eevop;\n \tconst efx_tx_ops_t\t*en_etxop;\n \tconst efx_rx_ops_t\t*en_erxop;\n+#if EFSYS_OPT_FILTER\n+\tefx_filter_t\t\ten_filter;\n+\tconst efx_filter_ops_t\t*en_efop;\n+#endif\t/* EFSYS_OPT_FILTER */\n \tuint32_t\t\ten_vport_id;\n \tunion {\n \t\tint\tenu_unused;\n", "prefixes": [ "dpdk-dev", "04/56" ] }