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GET /api/patches/15059/?format=api
{ "id": 15059, "url": "https://patches.dpdk.org/api/patches/15059/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1470023815-23108-3-git-send-email-jianfeng.tan@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1470023815-23108-3-git-send-email-jianfeng.tan@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1470023815-23108-3-git-send-email-jianfeng.tan@intel.com", "date": "2016-08-01T03:56:54", "name": "[dpdk-dev,v4,2/3] net/i40e: add TSO support on tunneling packet", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7357f3736fd6f78e2d62f761b8eb67703700a290", "submitter": { "id": 313, "url": "https://patches.dpdk.org/api/people/313/?format=api", "name": "Jianfeng Tan", "email": "jianfeng.tan@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1470023815-23108-3-git-send-email-jianfeng.tan@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/15059/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/15059/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id CD91C58D8;\n\tMon, 1 Aug 2016 05:57:10 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id BE4ED58D6\n\tfor <dev@dpdk.org>; Mon, 1 Aug 2016 05:57:09 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga104.fm.intel.com with ESMTP; 31 Jul 2016 20:57:09 -0700", "from dpdk06.sh.intel.com ([10.239.129.195])\n\tby fmsmga002.fm.intel.com with ESMTP; 31 Jul 2016 20:57:06 -0700" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos; i=\"5.28,453,1464678000\"; d=\"scan'208\";\n\ta=\"1032663371\"", "From": "Jianfeng Tan <jianfeng.tan@intel.com>", "To": "dev@dpdk.org", "Cc": "thomas.monjalon@6wind.com, pablo.de.lara.guarch@intel.com,\n\tkonstantin.ananyev@intel.com, jingjing.wu@intel.com,\n\thelin.zhang@intel.com, \n\tJianfeng Tan <jianfeng.tan@intel.com>, Zhe Tao <zhe.tao@intel.com>", "Date": "Mon, 1 Aug 2016 03:56:54 +0000", "Message-Id": "<1470023815-23108-3-git-send-email-jianfeng.tan@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1470023815-23108-1-git-send-email-jianfeng.tan@intel.com>", "References": "<1467752375-25984-1-git-send-email-zhe.tao@intel.com>\n\t<1470023815-23108-1-git-send-email-jianfeng.tan@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 2/3] net/i40e: add TSO support on tunneling\n\tpacket", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "To enable Tx side offload on tunneling packet, driver should set\ncorrect tunneling parameters: (1) EIPT, External IP header type;\n(2) EIPLEN, External IP; (3) L4TUNT; (4) L4TUNLEN. This parsing\nbehavior is based on (ol_flag & PKT_TX_TUNNEL_MASK). And when\nit's a tunneling packet, MACLEN defines the outer L2 header.\n\nAlso, we define TSO on each kind of tunneling type as a capabilities.\nNow only i40e declares to support them.\n\nSigned-off-by: Zhe Tao <zhe.tao@intel.com>\nSigned-off-by: Jianfeng Tan <jianfeng.tan@intel.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 6 ++-\n drivers/net/i40e/i40e_rxtx.c | 90 +++++++++++++++++++++++++++++-------------\n lib/librte_ether/rte_ethdev.h | 4 ++\n 3 files changed, 72 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex d0aeb70..64ba570 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -2576,7 +2576,11 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \t\tDEV_TX_OFFLOAD_TCP_CKSUM |\n \t\tDEV_TX_OFFLOAD_SCTP_CKSUM |\n \t\tDEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |\n-\t\tDEV_TX_OFFLOAD_TCP_TSO;\n+\t\tDEV_TX_OFFLOAD_TCP_TSO |\n+\t\tDEV_TX_OFFLOAD_VXLAN_TNL_TSO |\n+\t\tDEV_TX_OFFLOAD_GRE_TNL_TSO |\n+\t\tDEV_TX_OFFLOAD_IPIP_TNL_TSO |\n+\t\tDEV_TX_OFFLOAD_GENEVE_TNL_TSO;\n \tdev_info->hash_key_size = (I40E_PFQF_HKEY_MAX_INDEX + 1) *\n \t\t\t\t\t\tsizeof(uint32_t);\n \tdev_info->reta_size = pf->hash_lut_size;\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 554d167..4eac713 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -779,33 +779,65 @@ i40e_rxd_build_fdir(volatile union i40e_rx_desc *rxdp, struct rte_mbuf *mb)\n #endif\n \treturn flags;\n }\n+\n+static inline void\n+i40e_parse_tunneling_params(uint64_t ol_flags,\n+\t\t\t union i40e_tx_offload tx_offload,\n+\t\t\t uint32_t *cd_tunneling)\n+{\n+\t/* EIPT: External (outer) IP header type */\n+\tif (ol_flags & PKT_TX_OUTER_IP_CKSUM)\n+\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV4;\n+\telse if (ol_flags & PKT_TX_OUTER_IPV4)\n+\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV4_NO_CSUM;\n+\telse if (ol_flags & PKT_TX_OUTER_IPV6)\n+\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6;\n+\n+\t/* EIPLEN: External (outer) IP header length, in DWords */\n+\t*cd_tunneling |= (tx_offload.outer_l3_len >> 2) <<\n+\t\tI40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT;\n+\n+\t/* L4TUNT: L4 Tunneling Type */\n+\tswitch (ol_flags & PKT_TX_TUNNEL_MASK) {\n+\tcase PKT_TX_TUNNEL_IPIP:\n+\t\t/* for non UDP / GRE tunneling, set to 00b */\n+\t\tbreak;\n+\tcase PKT_TX_TUNNEL_VXLAN:\n+\tcase PKT_TX_TUNNEL_GENEVE:\n+\t\t*cd_tunneling |= I40E_TXD_CTX_UDP_TUNNELING;\n+\t\tbreak;\n+\tcase PKT_TX_TUNNEL_GRE:\n+\t\t*cd_tunneling |= I40E_TXD_CTX_GRE_TUNNELING;\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_TX_LOG(ERR, \"Tunnel type not supported\\n\");\n+\t\treturn;\n+\t}\n+\n+\t/* L4TUNLEN: L4 Tunneling Length, in Words\n+\t *\n+\t * We depend on app to set rte_mbuf.l2_len correctly.\n+\t * For IP in GRE it should be set to the length of the GRE\n+\t * header;\n+\t * for MAC in GRE or MAC in UDP it should be set to the length\n+\t * of the GRE or UDP headers plus the inner MAC up to including\n+\t * its last Ethertype.\n+\t */\n+\t*cd_tunneling |= (tx_offload.l2_len >> 1) <<\n+\t\tI40E_TXD_CTX_QW0_NATLEN_SHIFT;\n+}\n+\n static inline void\n i40e_txd_enable_checksum(uint64_t ol_flags,\n \t\t\tuint32_t *td_cmd,\n \t\t\tuint32_t *td_offset,\n-\t\t\tunion i40e_tx_offload tx_offload,\n-\t\t\tuint32_t *cd_tunneling)\n+\t\t\tunion i40e_tx_offload tx_offload)\n {\n-\t/* UDP tunneling packet TX checksum offload */\n-\tif (ol_flags & PKT_TX_OUTER_IP_CKSUM) {\n-\n+\t/* Set MACLEN */\n+\tif (ol_flags & PKT_TX_TUNNEL_MASK)\n \t\t*td_offset |= (tx_offload.outer_l2_len >> 1)\n \t\t\t\t<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;\n-\n-\t\tif (ol_flags & PKT_TX_OUTER_IP_CKSUM)\n-\t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV4;\n-\t\telse if (ol_flags & PKT_TX_OUTER_IPV4)\n-\t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV4_NO_CSUM;\n-\t\telse if (ol_flags & PKT_TX_OUTER_IPV6)\n-\t\t\t*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6;\n-\n-\t\t/* Now set the ctx descriptor fields */\n-\t\t*cd_tunneling |= (tx_offload.outer_l3_len >> 2) <<\n-\t\t\t\tI40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |\n-\t\t\t\t(tx_offload.l2_len >> 1) <<\n-\t\t\t\tI40E_TXD_CTX_QW0_NATLEN_SHIFT;\n-\n-\t} else\n+\telse\n \t\t*td_offset |= (tx_offload.l2_len >> 1)\n \t\t\t<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;\n \n@@ -1484,7 +1516,8 @@ i40e_calc_context_desc(uint64_t flags)\n {\n \tstatic uint64_t mask = PKT_TX_OUTER_IP_CKSUM |\n \t\tPKT_TX_TCP_SEG |\n-\t\tPKT_TX_QINQ_PKT;\n+\t\tPKT_TX_QINQ_PKT |\n+\t\tPKT_TX_TUNNEL_MASK;\n \n #ifdef RTE_LIBRTE_IEEE1588\n \tmask |= PKT_TX_IEEE1588_TMST;\n@@ -1506,7 +1539,7 @@ i40e_set_tso_ctx(struct rte_mbuf *mbuf, union i40e_tx_offload tx_offload)\n \t}\n \n \t/**\n-\t * in case of tunneling packet, the outer_l2_len and\n+\t * in case of non tunneling packet, the outer_l2_len and\n \t * outer_l3_len must be 0.\n \t */\n \thdr_len = tx_offload.outer_l2_len +\n@@ -1623,12 +1656,15 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\t/* Always enable CRC offload insertion */\n \t\ttd_cmd |= I40E_TX_DESC_CMD_ICRC;\n \n-\t\t/* Enable checksum offloading */\n+\t\t/* Fill in tunneling parameters if necessary */\n \t\tcd_tunneling_params = 0;\n-\t\tif (ol_flags & I40E_TX_CKSUM_OFFLOAD_MASK) {\n-\t\t\ti40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset,\n-\t\t\t\ttx_offload, &cd_tunneling_params);\n-\t\t}\n+\t\tif (ol_flags & PKT_TX_TUNNEL_MASK)\n+\t\t\ti40e_parse_tunneling_params(ol_flags, tx_offload,\n+\t\t\t\t\t\t &cd_tunneling_params);\n+\t\t/* Enable checksum offloading */\n+\t\tif (ol_flags & I40E_TX_CKSUM_OFFLOAD_MASK)\n+\t\t\ti40e_txd_enable_checksum(ol_flags, &td_cmd,\n+\t\t\t\t\t\t &td_offset, tx_offload);\n \n \t\tif (nb_ctx) {\n \t\t\t/* Setup TX context descriptor if required */\ndiff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h\nindex b0fe033..7bf0cc4 100644\n--- a/lib/librte_ether/rte_ethdev.h\n+++ b/lib/librte_ether/rte_ethdev.h\n@@ -864,6 +864,10 @@ struct rte_eth_conf {\n #define DEV_TX_OFFLOAD_UDP_TSO 0x00000040\n #define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000080 /**< Used for tunneling packet. */\n #define DEV_TX_OFFLOAD_QINQ_INSERT 0x00000100\n+#define DEV_TX_OFFLOAD_VXLAN_TNL_TSO 0x00000200 /**< Used for tunneling packet. */\n+#define DEV_TX_OFFLOAD_GRE_TNL_TSO 0x00000400 /**< Used for tunneling packet. */\n+#define DEV_TX_OFFLOAD_IPIP_TNL_TSO 0x00000800 /**< Used for tunneling packet. */\n+#define DEV_TX_OFFLOAD_GENEVE_TNL_TSO 0x00001000 /**< Used for tunneling packet. */\n \n /**\n * Ethernet device information\n", "prefixes": [ "dpdk-dev", "v4", "2/3" ] }