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GET /api/patches/139883/?format=api
{ "id": 139883, "url": "https://patches.dpdk.org/api/patches/139883/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20240506114419.966498-4-igozlan@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240506114419.966498-4-igozlan@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240506114419.966498-4-igozlan@nvidia.com", "date": "2024-05-06T11:44:07", "name": "[v2,04/16] net/mlx5/hws: remove unused capabilities and fields", "commit_ref": null, "pull_url": null, "state": "awaiting-upstream", "archived": false, "hash": "0c86926129790fb591e49800ad302a813dba8f02", "submitter": { "id": 3118, "url": "https://patches.dpdk.org/api/people/3118/?format=api", "name": "Itamar Gozlan", "email": "igozlan@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20240506114419.966498-4-igozlan@nvidia.com/mbox/", "series": [ { "id": 31885, "url": "https://patches.dpdk.org/api/series/31885/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=31885", "date": "2024-05-06T11:44:04", "name": "[v2,01/16] net/mlx5/hws: move warn into debug level when needed", "version": 2, "mbox": "https://patches.dpdk.org/series/31885/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/139883/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/139883/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7C0CA43FB4;\n\tMon, 6 May 2024 13:45:07 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A4CF6402EE;\n\tMon, 6 May 2024 13:44:54 +0200 (CEST)", "from NAM10-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam10on2065.outbound.protection.outlook.com [40.107.93.65])\n by mails.dpdk.org (Postfix) with ESMTP id 0E73B402EE\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Itamar Gozlan <igozlan@nvidia.com>", "To": "<igozlan@nvidia.com>, <erezsh@nvidia.com>, <hamdani@nvidia.com>,\n <kliteyn@nvidia.com>, <viacheslavo@nvidia.com>, <thomas@monjalon.net>,\n <suanmingm@nvidia.com>, Dariusz Sosnowski <dsosnowski@nvidia.com>, Ori Kam\n <orika@nvidia.com>, Matan Azrad <matan@nvidia.com>", "CC": "<dev@dpdk.org>", "Subject": "[v2 04/16] net/mlx5/hws: remove unused capabilities and fields", "Date": "Mon, 6 May 2024 14:44:07 +0300", "Message-ID": "<20240506114419.966498-4-igozlan@nvidia.com>", "X-Mailer": "git-send-email 2.39.3", "In-Reply-To": "<20240506114419.966498-1-igozlan@nvidia.com>", "References": "<20240314114220.203241-1-igozlan@nvidia.com>\n <20240506114419.966498-1-igozlan@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000E9D7:EE_|PH7PR12MB5856:EE_", "X-MS-Office365-Filtering-Correlation-Id": "027e55ba-9a20-4a24-663e-08dc6dc1ef7e", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230031|36860700004|376005|1800799015|82310400017|921011;", "X-Microsoft-Antispam-Message-Info": "\n byB+tcmQJ2nTPK2rWDQxn8F5VgYNZqmfvo388bCgcZDV1XLDuDpPvBdnCLeFTsUe+GqHCC9l0cum+k7FyrUtCQRg4fIYzO2b9iuamzvw/td5hD0HN5sdj2J8pnf+60mmYjKHZl/p9nsfXMhCj4Df02yX6xVHAsgUckhbLe+DbCvt6c0vkZ7Upi6JDQTwuVPuBY0bJIF5w+IZp/aZUtNvri98YUw4v1AmrHpWLrhwRApLt7uKl0OdU1b7n0IAVL+NwKmRsaZywy47/i5TUdDxkI0NyMfc8oQLenhzPuSz553tP70wtnLYo52S7UX9g+dMiZfVz15LTvtF40J6ECx2mFq24f4Ve4BNGPKkLstQC8Ngdv2HSQBJidxfN4atrdMXZOlRde2zi6ZQY1xqj4Ke9DUObwNT+L2UY3042SXc5k5izPE153kSd3d5AgHKdErilcmNgRVEGb997eywgq4DrtEZ4wPLi2CMxseLHtDBBpihhcSnZX1/kwLCTVvyY4vKgK6E+ODbPknzgyneNST2hpg44bC2zM+JUzvwIVxvksVxCU6ozGs+HTcVE81b89ArPi93L3XYRXnB1hM4irngyXPIaY7Y0V9TsiFrtJic7jAOsHnZ9Yd8q2p3DFR1WpB+8DsixjqMhsI0q9+jB8c7j9z6ApELXXibbfcadbAt7mecJIcFVuHHfBytEn0qJPA6QXLMZMn2h/ItXzGi+jquwSnfW3KplCFlwK9JJ9hA/r2mnJN+4k23aViheBhazcfmHNLtJXkCRYMswLkvPQ8g6jWlUlRWX+VZbhnh43nA2IaN7OIfHm036VYqvCseHdklGjXMrDzOgiGYymI4y2TGXkC+DR7x+2+kMxbXjZAgcEKF4fMXpoRrTh0OKKt/U3RSvFL+xwxacQHogjpFecThBewJYBrjNFGCo2Xx3vQ3dfRaTolBBmn0UPZ+6k4raXw2TcE6zqE/PXtaV6plAjSgJci73sNQjNsvtb6mqZcp0rAvInpiWPSLAuyDiImY3Xo6dY14pczFSylD8hAM7cjK0mPiZziI6BElXfLYWhQ2D415exw0I0OWyGclZ7qC1rtY0XPgygQrJvM6dxpY8JH+rN249sqRzMhoLPxST2N7tNroMx5aFLEh6TmEYZ3vGENCWFwUpgjs7ZQ4CVSGjMa/1sd14TOSdaPvWuIlGEnhWFFF5iHG0U307RrCHLmtlNDUi0f/PW9ILZj9mbcMiOp7msrx/Y+0RL8eDSZ++kr7xKBa0JCa8aFAw1DQ7Jq6i6qyUecbUfi2yFSCm4qrtcMfLV9Nvpb4uPfkxPL4Rav2/3Xpe0q96yYJJ53D0ntRuQwLdtxqT6GFY4YKSTX7W3sg0/JVm5+7Jr4HZmpgX4FHHLM2tkc4RYkoHWR5QXTxwmLE", "X-Forefront-Antispam-Report": "CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(36860700004)(376005)(1800799015)(82310400017)(921011);\n DIR:OUT;\n SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "06 May 2024 11:44:49.2828 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 027e55ba-9a20-4a24-663e-08dc6dc1ef7e", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000E9D7.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "PH7PR12MB5856", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Yevgeny Kliteynik <kliteyn@nvidia.com>\n\nThe following caps were never in use:\n - wire_regc\n - metadata_c\n - metadata_c_mask\nAlso send ring's reg_addr field wasn't in use.\n\nRemoving these caps and fields from structs and removing\nthe code that queried them.\n\nSigned-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/hws/mlx5dr_cmd.c | 11 ++---------\n drivers/net/mlx5/hws/mlx5dr_cmd.h | 3 ---\n drivers/net/mlx5/hws/mlx5dr_send.c | 1 -\n drivers/net/mlx5/hws/mlx5dr_send.h | 1 -\n 4 files changed, 2 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c\nindex 0e0cc479a6..666d678b42 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c\n@@ -1344,12 +1344,10 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,\n \tstrlcpy(caps->fw_ver, attr_ex.orig_attr.fw_ver, sizeof(caps->fw_ver));\n \n \tport_info = flow_hw_get_wire_port(ctx);\n-\tif (port_info) {\n-\t\tcaps->wire_regc = port_info->regc_value;\n+\tif (port_info)\n \t\tcaps->wire_regc_mask = port_info->regc_mask;\n-\t} else {\n+\telse\n \t\tDR_LOG(INFO, \"Failed to query wire port regc value\");\n-\t}\n \n \treturn ret;\n }\n@@ -1374,10 +1372,5 @@ int mlx5dr_cmd_query_ib_port(struct ibv_context *ctx,\n \tvport_caps->vport_num = port_info.vport_id;\n \tvport_caps->esw_owner_vhca_id = port_info.esw_owner_vhca_id;\n \n-\tif (port_info.query_flags & MLX5_PORT_QUERY_REG_C0) {\n-\t\tvport_caps->metadata_c = port_info.vport_meta_tag;\n-\t\tvport_caps->metadata_c_mask = port_info.vport_meta_mask;\n-\t}\n-\n \treturn 0;\n }\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h\nindex 9d385fc57f..ea5d346d8e 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h\n@@ -194,8 +194,6 @@ struct mlx5dr_cmd_query_ft_caps {\n struct mlx5dr_cmd_query_vport_caps {\n \tuint16_t vport_num;\n \tuint16_t esw_owner_vhca_id;\n-\tuint32_t metadata_c;\n-\tuint32_t metadata_c_mask;\n };\n \n struct mlx5dr_cmd_generate_wqe_attr {\n@@ -207,7 +205,6 @@ struct mlx5dr_cmd_generate_wqe_attr {\n };\n \n struct mlx5dr_cmd_query_caps {\n-\tuint32_t wire_regc;\n \tuint32_t wire_regc_mask;\n \tuint32_t flex_protocols;\n \tuint8_t wqe_based_update;\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_send.c b/drivers/net/mlx5/hws/mlx5dr_send.c\nindex f749401c6f..d58fdb108f 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_send.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_send.c\n@@ -729,7 +729,6 @@ static int mlx5dr_send_ring_open_sq(struct mlx5dr_context *ctx,\n \tbuf_sz = queue->num_entries * MAX_WQES_PER_RULE;\n \tsq_log_buf_sz = log2above(buf_sz);\n \tsq_buf_sz = 1 << (sq_log_buf_sz + log2above(MLX5_SEND_WQE_BB));\n-\tsq->reg_addr = queue->uar->reg_addr;\n \n \tpage_size = sysconf(_SC_PAGESIZE);\n \tbuf_aligned = align(sq_buf_sz, page_size);\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_send.h b/drivers/net/mlx5/hws/mlx5dr_send.h\nindex 0c89faa8a7..48593adbed 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_send.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_send.h\n@@ -114,7 +114,6 @@ struct mlx5dr_send_ring_sq {\n \tchar *buf;\n \tuint32_t sqn;\n \t__be32 *db;\n-\tvoid *reg_addr;\n \tuint16_t cur_post;\n \tuint16_t buf_mask;\n \tstruct mlx5dr_send_ring_priv *wr_priv;\n", "prefixes": [ "v2", "04/16" ] }