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GET /api/patches/139269/?format=api
{ "id": 139269, "url": "https://patches.dpdk.org/api/patches/139269/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20240412125249.10625-19-VenkatKumar.Ande@amd.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240412125249.10625-19-VenkatKumar.Ande@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240412125249.10625-19-VenkatKumar.Ande@amd.com", "date": "2024-04-12T12:52:44", "name": "[19/24] net/axgbe: separate C22 and C45 transactions", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "a7472328563a3c2f8d64703368ac394b298ec26c", "submitter": { "id": 3256, "url": "https://patches.dpdk.org/api/people/3256/?format=api", "name": "Venkat Kumar Ande", "email": "venkatkumar.ande@amd.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20240412125249.10625-19-VenkatKumar.Ande@amd.com/mbox/", "series": [ { "id": 31734, "url": "https://patches.dpdk.org/api/series/31734/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=31734", "date": "2024-04-12T12:52:26", "name": "[01/24] net/axgbe: remove use of comm_owned field", "version": 1, "mbox": "https://patches.dpdk.org/series/31734/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/139269/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/139269/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 264D143E52;\n\tFri, 12 Apr 2024 14:55:42 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E307F42D95;\n\tFri, 12 Apr 2024 14:54:36 +0200 (CEST)", "from NAM10-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam10on2066.outbound.protection.outlook.com [40.107.93.66])\n by mails.dpdk.org (Postfix) with ESMTP id 81DA141148\n for <dev@dpdk.org>; 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helo=SATLEXMB04.amd.com; pr=C", "From": "Venkat Kumar Ande <VenkatKumar.Ande@amd.com>", "To": "<dev@dpdk.org>", "CC": "<Selwin.Sebastian@amd.com>, Venkat Kumar Ande <VenkatKumar.Ande@amd.com>", "Subject": "[PATCH 19/24] net/axgbe: separate C22 and C45 transactions", "Date": "Fri, 12 Apr 2024 08:52:44 -0400", "Message-ID": "<20240412125249.10625-19-VenkatKumar.Ande@amd.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20240412125249.10625-1-VenkatKumar.Ande@amd.com>", "References": "<20240412125249.10625-1-VenkatKumar.Ande@amd.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.180.168.240]", "X-ClientProxiedBy": "SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com\n (10.181.40.145)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL6PEPF00020E5F:EE_|SA1PR12MB7199:EE_", "X-MS-Office365-Filtering-Correlation-Id": "a6916e94-916f-44ae-7e33-08dc5aefaf77", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n M7GIq0ky1jNPihI1fmwUBbYMylDJa1NT/xPdCR1srFefbrCSv/UENtT+wiSCG53BTyWcjbkJ3mzEWJowHBnPF+ecH111nUZpc56tk2UdYGjEhpYFbJVxjcjzpTCx0yRb7BHz927hvRwaB7qIb/mxy1wMVi2b4y9wIyrJuq9tIQ9PQlVWax3Y9U2VoVaKTp1rhL1l8r3p55X4Qv7G5QLN9ccXdkRL0NlnvFyBcZABkFD3IaQbRs7x4dq9KVX6UAgvKFB4EKX/xgsk4LsNCXMPWa0q8abk+e1CvjCY9LB104g+TiSA+JdC3Rl18K+o7vVqHQnn+65xmON8exgFDLC6xxrP1WwDFQCweEjnT1X1SldyMspAr1iDX8lgmbplvWBeMfGpP75rjoDrBt880+8JnvvjeDXNUavb4VVdtXaDg6yEYSiFoJxeaPnIixNF9NrlnHTcSHSbeDOaoA0xhYeg2uGpupux6R6vjyWkby9k962l99HDZY8MgCtOPqAPY0GxBqyM3zOgsl0H+BYMQ2+mcB2CyPf44Agf4+zXDH2JwWu4g94kDBPTHirw3LLlj3PMj8N53HIf7Hb8wD24er7Ch8gQ9/GGLaqDGQtoCU4yrZz1ybIKkOO5l4Hb2S+3V7CYPlG+wUHgXW5MVI6D/Y4Vrp/KxciznszqEONeuqoo+VTlwenx+qhlv/tsECMO3EjtFTerjAMgeEES6IP0qHKdOOJELu1uLNw6iPzvKzaHUUF7CTxj0fTrarRIB+BkY/LC", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230031)(376005)(1800799015)(82310400014)(36860700004); DIR:OUT;\n SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "12 Apr 2024 12:54:26.6982 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n a6916e94-916f-44ae-7e33-08dc5aefaf77", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL6PEPF00020E5F.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA1PR12MB7199", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The xgbe MDIO bus driver can perform both C22 and C45 transfers, when\nusing its MDIO bus hardware. The SFP I2C mdio bus driver only supports\nC22. Create separate functions for each and register the C45 versions\nusing the new API calls where appropriate.\n\nSigned-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>\n---\n drivers/net/axgbe/axgbe_dev.c | 77 +++++++++++++++++++++++++-----\n drivers/net/axgbe/axgbe_ethdev.h | 7 ++-\n drivers/net/axgbe/axgbe_phy_impl.c | 4 +-\n 3 files changed, 71 insertions(+), 17 deletions(-)", "diff": "diff --git a/drivers/net/axgbe/axgbe_dev.c b/drivers/net/axgbe/axgbe_dev.c\nindex 6b413160c2..fa7324efa7 100644\n--- a/drivers/net/axgbe/axgbe_dev.c\n+++ b/drivers/net/axgbe/axgbe_dev.c\n@@ -63,11 +63,20 @@ static int mdio_complete(struct axgbe_port *pdata)\n \treturn 0;\n }\n \n-static unsigned int axgbe_create_mdio_sca(int port, int reg)\n+static unsigned int axgbe_create_mdio_sca_c22(int port, int reg)\n {\n-\tunsigned int mdio_sca, da;\n+\tunsigned int mdio_sca;\n \n-\tda = (reg & MII_ADDR_C45) ? reg >> 16 : 0;\n+\tmdio_sca = 0;\n+\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg);\n+\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, PA, port);\n+\n+\treturn mdio_sca;\n+}\n+\n+static unsigned int axgbe_create_mdio_sca_c45(int port, unsigned int da, int reg)\n+{\n+\tunsigned int mdio_sca;\n \n \tmdio_sca = 0;\n \tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg);\n@@ -77,13 +86,12 @@ static unsigned int axgbe_create_mdio_sca(int port, int reg)\n \treturn mdio_sca;\n }\n \n-static int axgbe_write_ext_mii_regs(struct axgbe_port *pdata, int addr,\n-\t\t\t\t int reg, u16 val)\n+static int axgbe_write_ext_mii_regs(struct axgbe_port *pdata,\n+\t\t\t\t\t\tunsigned int mdio_sca, u16 val)\n {\n-\tunsigned int mdio_sca, mdio_sccd;\n+\tunsigned int mdio_sccd;\n \tuint64_t timeout;\n \n-\tmdio_sca = axgbe_create_mdio_sca(addr, reg);\n \tAXGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);\n \n \tmdio_sccd = 0;\n@@ -103,13 +111,34 @@ static int axgbe_write_ext_mii_regs(struct axgbe_port *pdata, int addr,\n \treturn -ETIMEDOUT;\n }\n \n-static int axgbe_read_ext_mii_regs(struct axgbe_port *pdata, int addr,\n-\t\t\t\t int reg)\n+\n+static int axgbe_write_ext_mii_regs_c22(struct axgbe_port *pdata,\n+\t\t\t\t\t\t\tint addr, int reg, u16 val)\n+{\n+\tunsigned int mdio_sca;\n+\n+\tmdio_sca = axgbe_create_mdio_sca_c22(addr, reg);\n+\n+\treturn axgbe_write_ext_mii_regs(pdata, mdio_sca, val);\n+}\n+\n+static int axgbe_write_ext_mii_regs_c45(struct axgbe_port *pdata,\n+\t\t\t\t\tint addr, int devad, int reg, u16 val)\n {\n-\tunsigned int mdio_sca, mdio_sccd;\n+\tunsigned int mdio_sca;\n+\n+\tmdio_sca = axgbe_create_mdio_sca_c45(addr, devad, reg);\n+\n+\treturn axgbe_write_ext_mii_regs(pdata, mdio_sca, val);\n+}\n+\n+\n+static int axgbe_read_ext_mii_regs(struct axgbe_port *pdata,\n+\t\t\t\t\t\t\tunsigned int mdio_sca)\n+{\n+\tunsigned int mdio_sccd;\n \tuint64_t timeout;\n \n-\tmdio_sca = axgbe_create_mdio_sca(addr, reg);\n \tAXGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);\n \n \tmdio_sccd = 0;\n@@ -132,6 +161,25 @@ static int axgbe_read_ext_mii_regs(struct axgbe_port *pdata, int addr,\n \treturn AXGMAC_IOREAD_BITS(pdata, MAC_MDIOSCCDR, DATA);\n }\n \n+static int axgbe_read_ext_mii_regs_c22(struct axgbe_port *pdata, int addr, int reg)\n+{\n+\tunsigned int mdio_sca;\n+\n+\tmdio_sca = axgbe_create_mdio_sca_c22(addr, reg);\n+\n+\treturn axgbe_read_ext_mii_regs(pdata, mdio_sca);\n+}\n+\n+static int axgbe_read_ext_mii_regs_c45(struct axgbe_port *pdata, int addr,\n+\t\t\t\t\t\t\t\tint devad, int reg)\n+{\n+\tunsigned int mdio_sca;\n+\n+\tmdio_sca = axgbe_create_mdio_sca_c45(addr, devad, reg);\n+\n+\treturn axgbe_read_ext_mii_regs(pdata, mdio_sca);\n+}\n+\n static int axgbe_set_ext_mii_mode(struct axgbe_port *pdata, unsigned int port,\n \t\t\t\t enum axgbe_mdio_mode mode)\n {\n@@ -1373,8 +1421,11 @@ void axgbe_init_function_ptrs_dev(struct axgbe_hw_if *hw_if)\n \thw_if->set_speed = axgbe_set_speed;\n \n \thw_if->set_ext_mii_mode = axgbe_set_ext_mii_mode;\n-\thw_if->read_ext_mii_regs = axgbe_read_ext_mii_regs;\n-\thw_if->write_ext_mii_regs = axgbe_write_ext_mii_regs;\n+\thw_if->read_ext_mii_regs_c22 = axgbe_read_ext_mii_regs_c22;\n+\thw_if->write_ext_mii_regs_c22 = axgbe_write_ext_mii_regs_c22;\n+\thw_if->read_ext_mii_regs_c45 = axgbe_read_ext_mii_regs_c45;\n+\thw_if->write_ext_mii_regs_c45 = axgbe_write_ext_mii_regs_c45;\n+\n \t/* For FLOW ctrl */\n \thw_if->config_tx_flow_control = axgbe_config_tx_flow_control;\n \thw_if->config_rx_flow_control = axgbe_config_rx_flow_control;\ndiff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h\nindex 4dcbf6d9a2..cb3df47a63 100644\n--- a/drivers/net/axgbe/axgbe_ethdev.h\n+++ b/drivers/net/axgbe/axgbe_ethdev.h\n@@ -325,8 +325,11 @@ struct axgbe_hw_if {\n \n \tint (*set_ext_mii_mode)(struct axgbe_port *, unsigned int,\n \t\t\t\tenum axgbe_mdio_mode);\n-\tint (*read_ext_mii_regs)(struct axgbe_port *, int, int);\n-\tint (*write_ext_mii_regs)(struct axgbe_port *, int, int, uint16_t);\n+\tint (*read_ext_mii_regs_c22)(struct axgbe_port *pdata, int addr, int reg);\n+\tint (*write_ext_mii_regs_c22)(struct axgbe_port *pdata, int addr, int reg, uint16_t val);\n+\tint (*read_ext_mii_regs_c45)(struct axgbe_port *pdata, int addr, int devad, int reg);\n+\tint (*write_ext_mii_regs_c45)(struct axgbe_port *pdata, int addr, int devad,\n+\t\t\t\t\t\t\t\t\tint reg, uint16_t val);\n \n \t/* For FLOW ctrl */\n \tint (*config_tx_flow_control)(struct axgbe_port *);\ndiff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c\nindex 9c2c411b4f..d173545e83 100644\n--- a/drivers/net/axgbe/axgbe_phy_impl.c\n+++ b/drivers/net/axgbe/axgbe_phy_impl.c\n@@ -1148,8 +1148,8 @@ static int axgbe_phy_set_redrv_mode_mdio(struct axgbe_port *pdata,\n \tredrv_reg = AXGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000);\n \tredrv_val = (u16)mode;\n \n-\treturn pdata->hw_if.write_ext_mii_regs(pdata, phy_data->redrv_addr,\n-\t\t\t\t\t redrv_reg, redrv_val);\n+\treturn pdata->hw_if.write_ext_mii_regs_c22(pdata,\n+\t\tphy_data->redrv_addr, redrv_reg, redrv_val);\n }\n \n static int axgbe_phy_set_redrv_mode_i2c(struct axgbe_port *pdata,\n", "prefixes": [ "19/24" ] }