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GET /api/patches/139254/?format=api
{ "id": 139254, "url": "https://patches.dpdk.org/api/patches/139254/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20240412125249.10625-4-VenkatKumar.Ande@amd.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240412125249.10625-4-VenkatKumar.Ande@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240412125249.10625-4-VenkatKumar.Ande@amd.com", "date": "2024-04-12T12:52:29", "name": "[04/24] net/axgbe: check mdio for non-zero ports and CL45 PHYs", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "7287ffbb83beb4aa367b03b81e639ca848356e2f", "submitter": { "id": 3256, "url": "https://patches.dpdk.org/api/people/3256/?format=api", "name": "Venkat Kumar Ande", "email": "venkatkumar.ande@amd.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20240412125249.10625-4-VenkatKumar.Ande@amd.com/mbox/", "series": [ { "id": 31734, "url": "https://patches.dpdk.org/api/series/31734/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=31734", "date": "2024-04-12T12:52:26", "name": "[01/24] net/axgbe: remove use of comm_owned field", "version": 1, "mbox": "https://patches.dpdk.org/series/31734/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/139254/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/139254/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BA9E443E52;\n\tFri, 12 Apr 2024 14:53:45 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A9DE64111B;\n\tFri, 12 Apr 2024 14:53:45 +0200 (CEST)", "from NAM10-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam10on2068.outbound.protection.outlook.com [40.107.94.68])\n by mails.dpdk.org (Postfix) with ESMTP id B5ADA410F1\n for <dev@dpdk.org>; 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helo=SATLEXMB04.amd.com; pr=C", "From": "Venkat Kumar Ande <VenkatKumar.Ande@amd.com>", "To": "<dev@dpdk.org>", "CC": "<Selwin.Sebastian@amd.com>, Venkat Kumar Ande <VenkatKumar.Ande@amd.com>", "Subject": "[PATCH 04/24] net/axgbe: check mdio for non-zero ports and CL45 PHYs", "Date": "Fri, 12 Apr 2024 08:52:29 -0400", "Message-ID": "<20240412125249.10625-4-VenkatKumar.Ande@amd.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20240412125249.10625-1-VenkatKumar.Ande@amd.com>", "References": "<20240412125249.10625-1-VenkatKumar.Ande@amd.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.180.168.240]", "X-ClientProxiedBy": "SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com\n (10.181.40.145)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL6PEPF00020E64:EE_|IA1PR12MB6436:EE_", "X-MS-Office365-Filtering-Correlation-Id": "3a8a8428-961f-4138-4242-08dc5aef92d0", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n yB/2SthnB/pShxTbnRYMDqgT9+f6pDQDnIBUx6ohNw+264kUtleYJnfilv7x+CJ11+qNVaEZ61Ipe5admOcDMf17+tJOzNZLoJvZWFH0mUTDsXzYiedN/RfQOl8f5Bxufpw5rT+shK3vXcPRC28zfmP4oOTu5O9xtMUiNU8I+CehuMF52FSwLsmvFdWpQnFiHrJQQr7TECUbvNOOdZOVEng0ig4buCzpcGFUHCvL9yS1+oiQmkR/flxS7MS3OcIuTssvegzGxadnHTnMlhs1nME7L6TkNrf7lG+9ArJ3eCRk4EWHVFVzWnpX4DYrf2Z9lR61cZ+SzG4xuk43hggodZuTK6a/q5u4r5AM/8z+r1sI9bamhdTFuU7tis/sTW7UT/HkF6wl4GACDrHSm4L44oflOcFv7Mnwjb15zyACs4k985PIenznBMCS6avGIGSpzf56lqrb4pyCISUwy549HX/3auPQHT44hD/Aw7xFYElrpEtQIGqtoXYDkEYmR6sJbhJCp516gzHQU58Ax9akFua7+fneIOJiM9NwRI2KCpBzzZ1fPuHEeA5FOYOWD823Pt4FZQvy6UufazgJTC372J5wNr66hyIFr6nlwSPugutlW/+fIv/mMStBmAMyjLZdz1KQNtzVjOqHK2RM9LaZpF7NtypeK6iShgQKsZ1dYbRcHNLfMDZl3zUvVAn0t7UxwhwmeWG/aoJYxpdCsDbwoZV9JHG/WZ4F5CathGHC0nJ+sG/iG9J4NWikIFStq4Ps", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230031)(376005)(1800799015)(82310400014)(36860700004); DIR:OUT;\n SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "12 Apr 2024 12:53:38.6104 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 3a8a8428-961f-4138-4242-08dc5aef92d0", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL6PEPF00020E64.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "IA1PR12MB6436", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The XGBE hardware has support for performing MDIO operations using an\nMDIO command request. The driver mistakenly uses the mdio port address\nas the MDIO command request device address instead of the MDIO command\nrequest port address. Additionally, the driver does not properly check\nfor and create a clause 45 MDIO command.\n\nCheck the supplied MDIO register to determine if the request is a clause\n45 operation (MII_ADDR_C45). For a clause 45 operation, extract device\naddress and register number from the supplied MDIO register and use them\nto set the MDIO command request device address and register number fields.\nFor a clause 22 operation, the MDIO request device address is set to zero\nand the MDIO command request register number is set to the supplied MDIO\nregister. In either case, the supplied MDIO port address is used as the\nMDIO command request port address.\n\nSigned-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>\n---\n drivers/net/axgbe/axgbe_common.h | 2 --\n drivers/net/axgbe/axgbe_dev.c | 22 ++++++++++++++++------\n 2 files changed, 16 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h\nindex a5d11c5832..51532fb34a 100644\n--- a/drivers/net/axgbe/axgbe_common.h\n+++ b/drivers/net/axgbe/axgbe_common.h\n@@ -407,8 +407,6 @@\n #define MAC_MDIOSCAR_PA_WIDTH\t\t5\n #define MAC_MDIOSCAR_RA_INDEX\t\t0\n #define MAC_MDIOSCAR_RA_WIDTH\t\t16\n-#define MAC_MDIOSCAR_REG_INDEX\t\t0\n-#define MAC_MDIOSCAR_REG_WIDTH\t\t21\n #define MAC_MDIOSCCDR_BUSY_INDEX\t22\n #define MAC_MDIOSCCDR_BUSY_WIDTH\t1\n #define MAC_MDIOSCCDR_CMD_INDEX\t\t16\ndiff --git a/drivers/net/axgbe/axgbe_dev.c b/drivers/net/axgbe/axgbe_dev.c\nindex 6a7fddffca..3389954aa6 100644\n--- a/drivers/net/axgbe/axgbe_dev.c\n+++ b/drivers/net/axgbe/axgbe_dev.c\n@@ -63,15 +63,27 @@ static int mdio_complete(struct axgbe_port *pdata)\n \treturn 0;\n }\n \n+static unsigned int axgbe_create_mdio_sca(int port, int reg)\n+{\n+\tunsigned int mdio_sca, da;\n+\n+\tda = (reg & MII_ADDR_C45) ? reg >> 16 : 0;\n+\n+\tmdio_sca = 0;\n+\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, RA, reg);\n+\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, PA, port);\n+\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, da);\n+\n+\treturn mdio_sca;\n+}\n+\n static int axgbe_write_ext_mii_regs(struct axgbe_port *pdata, int addr,\n \t\t\t\t int reg, u16 val)\n {\n \tunsigned int mdio_sca, mdio_sccd;\n \tuint64_t timeout;\n \n-\tmdio_sca = 0;\n-\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, REG, reg);\n-\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, addr);\n+\tmdio_sca = axgbe_create_mdio_sca(addr, reg);\n \tAXGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);\n \n \tmdio_sccd = 0;\n@@ -97,9 +109,7 @@ static int axgbe_read_ext_mii_regs(struct axgbe_port *pdata, int addr,\n \tunsigned int mdio_sca, mdio_sccd;\n \tuint64_t timeout;\n \n-\tmdio_sca = 0;\n-\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, REG, reg);\n-\tAXGMAC_SET_BITS(mdio_sca, MAC_MDIOSCAR, DA, addr);\n+\tmdio_sca = axgbe_create_mdio_sca(addr, reg);\n \tAXGMAC_IOWRITE(pdata, MAC_MDIOSCAR, mdio_sca);\n \n \tmdio_sccd = 0;\n", "prefixes": [ "04/24" ] }