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GET /api/patches/137819/?format=api
{ "id": 137819, "url": "https://patches.dpdk.org/api/patches/137819/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20240303173833.100039-6-hkalra@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240303173833.100039-6-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240303173833.100039-6-hkalra@marvell.com", "date": "2024-03-03T17:38:15", "name": "[v6,05/23] net/cnxk: probing representor ports", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "79347ca07bfbc3091977a227965d69531697eb3d", "submitter": { "id": 1182, "url": "https://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20240303173833.100039-6-hkalra@marvell.com/mbox/", "series": [ { "id": 31353, "url": "https://patches.dpdk.org/api/series/31353/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=31353", "date": "2024-03-03T17:38:10", "name": "net/cnxk: support for port representors", "version": 6, "mbox": "https://patches.dpdk.org/series/31353/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/137819/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/137819/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3573743C3E;\n\tSun, 3 Mar 2024 18:39:22 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5C22943653;\n\tSun, 3 Mar 2024 18:38:58 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id A00364364A\n for <dev@dpdk.org>; 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a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-type; s=pfpt0220; bh=IrWX6rFnhK8+rieoumGBj\n RJ4U0+T4A4SczmsfU/qveM=; b=H6jXsMBDHtvK6BKnAOuisjG3ixcoA98QeAO+9\n hIDMr8C96XQ8SQTKgv2ZmTk4VcJ/VOUC51ojx9mL40NWZtm7cCNxBwy82fCj/6EU\n w+iN67tI3sM7oYlhgmSSJ9eQnMtGHA6cHE33bTroJO0xMSDQ2eQqAbVsFRsInHgc\n cYdl522dnPgE2x8AG/UiWR9l79K2SEfnCWigQOotycfVP76aC/webSt6sJWehU7i\n BHoEv+ImYVPd/kKrFyGvNdiW0YE+axtkw0fWXZmsy6i11VXUqvnZIcnvGUfcljbq\n E14SvXFfILpsl9A54Ih/Gsp9ZwcAmFPgOcsrhusrNC+W2Sc2g==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "Thomas Monjalon <thomas@monjalon.net>, Nithin Dabilpuram\n <ndabilpuram@marvell.com>, Kiran Kumar K <kirankumark@marvell.com>, \"Sunil\n Kumar Kori\" <skori@marvell.com>, Satha Rao <skoteshwar@marvell.com>,\n \"Harman Kalra\" <hkalra@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v6 05/23] net/cnxk: probing representor ports", "Date": "Sun, 3 Mar 2024 23:08:15 +0530", "Message-ID": "<20240303173833.100039-6-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20240303173833.100039-1-hkalra@marvell.com>", "References": "<20230811163419.165790-1-hkalra@marvell.com>\n <20240303173833.100039-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "TG5sZQIzkkcTJuM13PmSREkQImiBfpgl", "X-Proofpoint-ORIG-GUID": "TG5sZQIzkkcTJuM13PmSREkQImiBfpgl", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-03-03_08,2024-03-01_03,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Basic skeleton for probing representor devices. If PF device is\npassed with \"representor\" devargs, representor ports gets probed\nas a separate ethdev device.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n MAINTAINERS | 1 +\n doc/guides/nics/cnxk.rst | 35 +++++\n drivers/net/cnxk/cnxk_eswitch.c | 12 ++\n drivers/net/cnxk/cnxk_eswitch.h | 8 +-\n drivers/net/cnxk/cnxk_rep.c | 256 ++++++++++++++++++++++++++++++++\n drivers/net/cnxk/cnxk_rep.h | 50 +++++++\n drivers/net/cnxk/cnxk_rep_ops.c | 129 ++++++++++++++++\n drivers/net/cnxk/meson.build | 2 +\n 8 files changed, 492 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/cnxk/cnxk_rep.c\n create mode 100644 drivers/net/cnxk/cnxk_rep.h\n create mode 100644 drivers/net/cnxk/cnxk_rep_ops.c", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 962c359cdd..062812e7c3 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -818,6 +818,7 @@ M: Nithin Dabilpuram <ndabilpuram@marvell.com>\n M: Kiran Kumar K <kirankumark@marvell.com>\n M: Sunil Kumar Kori <skori@marvell.com>\n M: Satha Rao <skoteshwar@marvell.com>\n+M: Harman Kalra <hkalra@marvell.com>\n T: git://dpdk.org/next/dpdk-next-net-mrvl\n F: drivers/common/cnxk/\n F: drivers/net/cnxk/\ndiff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex 1ab8a0ca74..93d6db5cb0 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -37,6 +37,7 @@ Features of the CNXK Ethdev PMD are:\n - Inline IPsec processing support\n - Ingress meter support\n - Queue based priority flow control support\n+- Port representors\n \n Prerequisites\n -------------\n@@ -640,6 +641,40 @@ Runtime Config Options for inline device\n With the above configuration, driver would enable packet inject from ARM cores\n to crypto to process and send back in Rx path.\n \n+Port Representors\n+-----------------\n+\n+The CNXK driver supports port representor model by adding virtual ethernet\n+ports providing a logical representation in DPDK for physical function(PF) or\n+SR-IOV virtual function (VF) devices for control and monitoring.\n+\n+Base device or parent device underneath the representor ports is a eswitch\n+device which is not a cnxk ethernet device but has NIC RX and TX capabilities.\n+Each representor port is represented by a RQ and SQ pair of this eswitch\n+device.\n+\n+Implementation supports representors for both physical function and virtual\n+function.\n+\n+Port representor ethdev instances can be spawned on an as needed basis\n+through configuration parameters passed to the driver of the underlying\n+base device using devargs ``-a <base PCI BDF>,representor=pf*vf*``\n+\n+.. note::\n+\n+ Representor ports to be created for respective representees should be\n+ defined via standard representor devargs patterns\n+ Eg. To create a representor for representee PF1VF0, devargs to be passed\n+ is ``-a <base PCI BDF>,representor=pf01vf0``\n+\n+ Implementation supports creation of multiple port representors with pattern:\n+ ``-a <base PCI BDF>,representor=[pf0vf[1,2],pf1vf[2-5]]``\n+\n+Port representor PMD supports following operations:\n+\n+- Get PF/VF statistics\n+- Flow operations - create, validate, destroy, query, flush, dump\n+\n Debugging Options\n -----------------\n \ndiff --git a/drivers/net/cnxk/cnxk_eswitch.c b/drivers/net/cnxk/cnxk_eswitch.c\nindex 687bb7d146..599ed149ae 100644\n--- a/drivers/net/cnxk/cnxk_eswitch.c\n+++ b/drivers/net/cnxk/cnxk_eswitch.c\n@@ -3,6 +3,7 @@\n */\n \n #include <cnxk_eswitch.h>\n+#include <cnxk_rep.h>\n \n #define CNXK_NIX_DEF_SQ_COUNT 512\n \n@@ -62,6 +63,10 @@ cnxk_eswitch_dev_remove(struct rte_pci_device *pci_dev)\n \t\tgoto exit;\n \t}\n \n+\t/* Remove representor devices associated with PF */\n+\tif (eswitch_dev->repr_cnt.nb_repr_created)\n+\t\tcnxk_rep_dev_remove(eswitch_dev);\n+\n \t/* Cleanup HW resources */\n \teswitch_hw_rsrc_cleanup(eswitch_dev, pci_dev);\n \n@@ -648,6 +653,13 @@ cnxk_eswitch_dev_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pc\n \t\t eswitch_dev->repr_cnt.max_repr, eswitch_dev->repr_cnt.nb_repr_created,\n \t\t roc_nix_get_pf_func(&eswitch_dev->nix));\n \n+\t/* Probe representor ports */\n+\trc = cnxk_rep_dev_probe(pci_dev, eswitch_dev);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to probe representor ports\");\n+\t\tgoto rsrc_cleanup;\n+\t}\n+\n \t/* Spinlock for synchronization between representors traffic and control\n \t * messages\n \t */\ndiff --git a/drivers/net/cnxk/cnxk_eswitch.h b/drivers/net/cnxk/cnxk_eswitch.h\nindex 6ff296399e..dcd5add6d0 100644\n--- a/drivers/net/cnxk/cnxk_eswitch.h\n+++ b/drivers/net/cnxk/cnxk_eswitch.h\n@@ -66,6 +66,11 @@ struct cnxk_eswitch_repr_cnt {\n \tuint16_t nb_repr_started;\n };\n \n+struct cnxk_eswitch_switch_domain {\n+\tuint16_t switch_domain_id;\n+\tuint16_t pf;\n+};\n+\n struct cnxk_rep_info {\n \tstruct rte_eth_dev *rep_eth_dev;\n };\n@@ -121,7 +126,8 @@ struct cnxk_eswitch_dev {\n \n \t/* Port representor fields */\n \trte_spinlock_t rep_lock;\n-\tuint16_t switch_domain_id;\n+\tuint16_t nb_switch_domain;\n+\tstruct cnxk_eswitch_switch_domain sw_dom[RTE_MAX_ETHPORTS];\n \tuint16_t eswitch_vdev;\n \tstruct cnxk_rep_info *rep_info;\n };\ndiff --git a/drivers/net/cnxk/cnxk_rep.c b/drivers/net/cnxk/cnxk_rep.c\nnew file mode 100644\nindex 0000000000..55156f5b56\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_rep.c\n@@ -0,0 +1,256 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+#include <cnxk_rep.h>\n+\n+#define PF_SHIFT 10\n+#define PF_MASK\t 0x3F\n+\n+static uint16_t\n+get_pf(uint16_t hw_func)\n+{\n+\treturn (hw_func >> PF_SHIFT) & PF_MASK;\n+}\n+\n+static uint16_t\n+switch_domain_id_allocate(struct cnxk_eswitch_dev *eswitch_dev, uint16_t pf)\n+{\n+\tint i = 0;\n+\n+\tfor (i = 0; i < eswitch_dev->nb_switch_domain; i++) {\n+\t\tif (eswitch_dev->sw_dom[i].pf == pf)\n+\t\t\treturn eswitch_dev->sw_dom[i].switch_domain_id;\n+\t}\n+\n+\treturn RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;\n+}\n+\n+int\n+cnxk_rep_dev_uninit(struct rte_eth_dev *ethdev)\n+{\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\tplt_rep_dbg(\"Representor port:%d uninit\", ethdev->data->port_id);\n+\trte_free(ethdev->data->mac_addrs);\n+\tethdev->data->mac_addrs = NULL;\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_dev_remove(struct cnxk_eswitch_dev *eswitch_dev)\n+{\n+\tint i, rc = 0;\n+\n+\tfor (i = 0; i < eswitch_dev->nb_switch_domain; i++) {\n+\t\trc = rte_eth_switch_domain_free(eswitch_dev->sw_dom[i].switch_domain_id);\n+\t\tif (rc)\n+\t\t\tplt_err(\"Failed to alloc switch domain: %d\", rc);\n+\t}\n+\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_rep_parent_setup(struct cnxk_eswitch_dev *eswitch_dev)\n+{\n+\tuint16_t pf, prev_pf = 0, switch_domain_id;\n+\tint rc, i, j = 0;\n+\n+\tif (eswitch_dev->rep_info)\n+\t\treturn 0;\n+\n+\teswitch_dev->rep_info =\n+\t\tplt_zmalloc(sizeof(eswitch_dev->rep_info[0]) * eswitch_dev->repr_cnt.max_repr, 0);\n+\tif (!eswitch_dev->rep_info) {\n+\t\tplt_err(\"Failed to alloc memory for rep info\");\n+\t\trc = -ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Allocate switch domain for all PFs (VFs will be under same domain as PF) */\n+\tfor (i = 0; i < eswitch_dev->repr_cnt.max_repr; i++) {\n+\t\tpf = get_pf(eswitch_dev->nix.rep_pfvf_map[i]);\n+\t\tif (pf == prev_pf)\n+\t\t\tcontinue;\n+\n+\t\trc = rte_eth_switch_domain_alloc(&switch_domain_id);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to alloc switch domain: %d\", rc);\n+\t\t\tgoto fail;\n+\t\t}\n+\t\tplt_rep_dbg(\"Allocated switch domain id %d for pf %d\\n\", switch_domain_id, pf);\n+\t\teswitch_dev->sw_dom[j].switch_domain_id = switch_domain_id;\n+\t\teswitch_dev->sw_dom[j].pf = pf;\n+\t\tprev_pf = pf;\n+\t\tj++;\n+\t}\n+\teswitch_dev->nb_switch_domain = j;\n+\n+\treturn 0;\n+fail:\n+\treturn rc;\n+}\n+\n+static uint16_t\n+cnxk_rep_tx_burst(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n+{\n+\tPLT_SET_USED(tx_queue);\n+\tPLT_SET_USED(tx_pkts);\n+\tPLT_SET_USED(nb_pkts);\n+\n+\treturn 0;\n+}\n+\n+static uint16_t\n+cnxk_rep_rx_burst(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n+{\n+\tPLT_SET_USED(rx_queue);\n+\tPLT_SET_USED(rx_pkts);\n+\tPLT_SET_USED(nb_pkts);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_rep_dev_init(struct rte_eth_dev *eth_dev, void *params)\n+{\n+\tstruct cnxk_rep_dev *rep_params = (struct cnxk_rep_dev *)params;\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(eth_dev);\n+\n+\trep_dev->port_id = rep_params->port_id;\n+\trep_dev->switch_domain_id = rep_params->switch_domain_id;\n+\trep_dev->parent_dev = rep_params->parent_dev;\n+\trep_dev->hw_func = rep_params->hw_func;\n+\trep_dev->rep_id = rep_params->rep_id;\n+\n+\teth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;\n+\teth_dev->data->representor_id = rep_params->port_id;\n+\teth_dev->data->backer_port_id = eth_dev->data->port_id;\n+\n+\teth_dev->data->mac_addrs = plt_zmalloc(RTE_ETHER_ADDR_LEN, 0);\n+\tif (!eth_dev->data->mac_addrs) {\n+\t\tplt_err(\"Failed to allocate memory for mac addr\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\trte_eth_random_addr(rep_dev->mac_addr);\n+\tmemcpy(eth_dev->data->mac_addrs, rep_dev->mac_addr, RTE_ETHER_ADDR_LEN);\n+\n+\t/* Set the device operations */\n+\teth_dev->dev_ops = &cnxk_rep_dev_ops;\n+\n+\t/* Rx/Tx functions stubs to avoid crashing */\n+\teth_dev->rx_pkt_burst = cnxk_rep_rx_burst;\n+\teth_dev->tx_pkt_burst = cnxk_rep_tx_burst;\n+\n+\t/* Only single queues for representor devices */\n+\teth_dev->data->nb_rx_queues = 1;\n+\teth_dev->data->nb_tx_queues = 1;\n+\n+\teth_dev->data->dev_link.link_speed = RTE_ETH_SPEED_NUM_NONE;\n+\teth_dev->data->dev_link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;\n+\teth_dev->data->dev_link.link_status = RTE_ETH_LINK_UP;\n+\teth_dev->data->dev_link.link_autoneg = RTE_ETH_LINK_FIXED;\n+\n+\treturn 0;\n+}\n+\n+static int\n+create_representor_ethdev(struct rte_pci_device *pci_dev, struct cnxk_eswitch_dev *eswitch_dev,\n+\t\t\t struct cnxk_eswitch_devargs *esw_da, int idx)\n+{\n+\tchar name[RTE_ETH_NAME_MAX_LEN];\n+\tstruct rte_eth_dev *rep_eth_dev;\n+\tuint16_t hw_func;\n+\tint rc = 0;\n+\n+\tstruct cnxk_rep_dev rep = {.port_id = eswitch_dev->repr_cnt.nb_repr_probed,\n+\t\t\t\t .parent_dev = eswitch_dev};\n+\n+\tif (esw_da->type == CNXK_ESW_DA_TYPE_PFVF) {\n+\t\thw_func = esw_da->repr_hw_info[idx].hw_func;\n+\t\trep.switch_domain_id = switch_domain_id_allocate(eswitch_dev, get_pf(hw_func));\n+\t\tif (rep.switch_domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {\n+\t\t\tplt_err(\"Failed to get a valid switch domain id\");\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\tesw_da->repr_hw_info[idx].port_id = rep.port_id;\n+\t\t/* Representor port net_bdf_port */\n+\t\tsnprintf(name, sizeof(name), \"net_%s_hw_%x_representor_%d\", pci_dev->device.name,\n+\t\t\t hw_func, rep.port_id);\n+\n+\t\trep.hw_func = hw_func;\n+\t\trep.rep_id = esw_da->repr_hw_info[idx].rep_id;\n+\n+\t} else {\n+\t\tsnprintf(name, sizeof(name), \"net_%s_representor_%d\", pci_dev->device.name,\n+\t\t\t rep.port_id);\n+\t\trep.switch_domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;\n+\t}\n+\n+\trc = rte_eth_dev_create(&pci_dev->device, name, sizeof(struct cnxk_rep_dev), NULL, NULL,\n+\t\t\t\tcnxk_rep_dev_init, &rep);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to create cnxk vf representor %s\", name);\n+\t\trc = -EINVAL;\n+\t\tgoto fail;\n+\t}\n+\n+\trep_eth_dev = rte_eth_dev_allocated(name);\n+\tif (!rep_eth_dev) {\n+\t\tplt_err(\"Failed to find the eth_dev for VF-Rep: %s.\", name);\n+\t\trc = -ENODEV;\n+\t\tgoto fail;\n+\t}\n+\n+\tplt_rep_dbg(\"Representor portid %d (%s) type %d probe done\", rep_eth_dev->data->port_id,\n+\t\t name, esw_da->da.type);\n+\teswitch_dev->rep_info[rep.port_id].rep_eth_dev = rep_eth_dev;\n+\teswitch_dev->repr_cnt.nb_repr_probed++;\n+\n+\treturn 0;\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_rep_dev_probe(struct rte_pci_device *pci_dev, struct cnxk_eswitch_dev *eswitch_dev)\n+{\n+\tstruct cnxk_eswitch_devargs *esw_da;\n+\tuint16_t num_rep;\n+\tint i, j, rc;\n+\n+\tif (eswitch_dev->repr_cnt.nb_repr_created > RTE_MAX_ETHPORTS) {\n+\t\tplt_err(\"nb_representor_ports %d > %d MAX ETHPORTS\\n\",\n+\t\t\teswitch_dev->repr_cnt.nb_repr_created, RTE_MAX_ETHPORTS);\n+\t\trc = -EINVAL;\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Initialize the internals of representor ports */\n+\trc = cnxk_rep_parent_setup(eswitch_dev);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to setup the parent device, err %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\tfor (i = eswitch_dev->last_probed; i < eswitch_dev->nb_esw_da; i++) {\n+\t\tesw_da = &eswitch_dev->esw_da[i];\n+\t\t/* Check the representor devargs */\n+\t\tnum_rep = esw_da->nb_repr_ports;\n+\t\tfor (j = 0; j < num_rep; j++) {\n+\t\t\trc = create_representor_ethdev(pci_dev, eswitch_dev, esw_da, j);\n+\t\t\tif (rc)\n+\t\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\teswitch_dev->last_probed = i;\n+\n+\treturn 0;\n+fail:\n+\treturn rc;\n+}\ndiff --git a/drivers/net/cnxk/cnxk_rep.h b/drivers/net/cnxk/cnxk_rep.h\nnew file mode 100644\nindex 0000000000..b802c44b33\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_rep.h\n@@ -0,0 +1,50 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+#include <cnxk_eswitch.h>\n+#include <cnxk_ethdev.h>\n+\n+#ifndef __CNXK_REP_H__\n+#define __CNXK_REP_H__\n+\n+/* Common ethdev ops */\n+extern struct eth_dev_ops cnxk_rep_dev_ops;\n+\n+struct cnxk_rep_dev {\n+\tuint16_t port_id;\n+\tuint16_t rep_id;\n+\tuint16_t switch_domain_id;\n+\tstruct cnxk_eswitch_dev *parent_dev;\n+\tuint16_t hw_func;\n+\tuint8_t mac_addr[RTE_ETHER_ADDR_LEN];\n+};\n+\n+static inline struct cnxk_rep_dev *\n+cnxk_rep_pmd_priv(const struct rte_eth_dev *eth_dev)\n+{\n+\treturn eth_dev->data->dev_private;\n+}\n+\n+int cnxk_rep_dev_probe(struct rte_pci_device *pci_dev, struct cnxk_eswitch_dev *eswitch_dev);\n+int cnxk_rep_dev_remove(struct cnxk_eswitch_dev *eswitch_dev);\n+int cnxk_rep_dev_uninit(struct rte_eth_dev *ethdev);\n+int cnxk_rep_dev_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *dev_info);\n+int cnxk_rep_representor_info_get(struct rte_eth_dev *dev, struct rte_eth_representor_info *info);\n+int cnxk_rep_dev_configure(struct rte_eth_dev *eth_dev);\n+\n+int cnxk_rep_link_update(struct rte_eth_dev *eth_dev, int wait_to_compl);\n+int cnxk_rep_dev_start(struct rte_eth_dev *eth_dev);\n+int cnxk_rep_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t queue_idx, uint16_t nb_desc,\n+\t\t\t unsigned int socket_id, const struct rte_eth_rxconf *rx_conf,\n+\t\t\t struct rte_mempool *mp);\n+int cnxk_rep_tx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t queue_idx, uint16_t nb_desc,\n+\t\t\t unsigned int socket_id, const struct rte_eth_txconf *tx_conf);\n+void cnxk_rep_rx_queue_release(struct rte_eth_dev *dev, uint16_t queue_idx);\n+void cnxk_rep_tx_queue_release(struct rte_eth_dev *dev, uint16_t queue_idx);\n+int cnxk_rep_dev_stop(struct rte_eth_dev *eth_dev);\n+int cnxk_rep_dev_close(struct rte_eth_dev *eth_dev);\n+int cnxk_rep_stats_get(struct rte_eth_dev *eth_dev, struct rte_eth_stats *stats);\n+int cnxk_rep_stats_reset(struct rte_eth_dev *eth_dev);\n+int cnxk_rep_flow_ops_get(struct rte_eth_dev *ethdev, const struct rte_flow_ops **ops);\n+\n+#endif /* __CNXK_REP_H__ */\ndiff --git a/drivers/net/cnxk/cnxk_rep_ops.c b/drivers/net/cnxk/cnxk_rep_ops.c\nnew file mode 100644\nindex 0000000000..15448688ce\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_rep_ops.c\n@@ -0,0 +1,129 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#include <cnxk_rep.h>\n+\n+int\n+cnxk_rep_link_update(struct rte_eth_dev *ethdev, int wait_to_complete)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(wait_to_complete);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_dev_info_get(struct rte_eth_dev *ethdev, struct rte_eth_dev_info *devinfo)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(devinfo);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_dev_configure(struct rte_eth_dev *ethdev)\n+{\n+\tPLT_SET_USED(ethdev);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_dev_start(struct rte_eth_dev *ethdev)\n+{\n+\tPLT_SET_USED(ethdev);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_dev_close(struct rte_eth_dev *ethdev)\n+{\n+\tPLT_SET_USED(ethdev);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_dev_stop(struct rte_eth_dev *ethdev)\n+{\n+\tPLT_SET_USED(ethdev);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_rx_queue_setup(struct rte_eth_dev *ethdev, uint16_t rx_queue_id, uint16_t nb_rx_desc,\n+\t\t\tunsigned int socket_id, const struct rte_eth_rxconf *rx_conf,\n+\t\t\tstruct rte_mempool *mb_pool)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(rx_queue_id);\n+\tPLT_SET_USED(nb_rx_desc);\n+\tPLT_SET_USED(socket_id);\n+\tPLT_SET_USED(rx_conf);\n+\tPLT_SET_USED(mb_pool);\n+\treturn 0;\n+}\n+\n+void\n+cnxk_rep_rx_queue_release(struct rte_eth_dev *ethdev, uint16_t queue_id)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(queue_id);\n+}\n+\n+int\n+cnxk_rep_tx_queue_setup(struct rte_eth_dev *ethdev, uint16_t tx_queue_id, uint16_t nb_tx_desc,\n+\t\t\tunsigned int socket_id, const struct rte_eth_txconf *tx_conf)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(tx_queue_id);\n+\tPLT_SET_USED(nb_tx_desc);\n+\tPLT_SET_USED(socket_id);\n+\tPLT_SET_USED(tx_conf);\n+\treturn 0;\n+}\n+\n+void\n+cnxk_rep_tx_queue_release(struct rte_eth_dev *ethdev, uint16_t queue_id)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(queue_id);\n+}\n+\n+int\n+cnxk_rep_stats_get(struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(stats);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_stats_reset(struct rte_eth_dev *ethdev)\n+{\n+\tPLT_SET_USED(ethdev);\n+\treturn 0;\n+}\n+\n+int\n+cnxk_rep_flow_ops_get(struct rte_eth_dev *ethdev, const struct rte_flow_ops **ops)\n+{\n+\tPLT_SET_USED(ethdev);\n+\tPLT_SET_USED(ops);\n+\treturn 0;\n+}\n+\n+/* CNXK platform representor dev ops */\n+struct eth_dev_ops cnxk_rep_dev_ops = {\n+\t.dev_infos_get = cnxk_rep_dev_info_get,\n+\t.dev_configure = cnxk_rep_dev_configure,\n+\t.dev_start = cnxk_rep_dev_start,\n+\t.rx_queue_setup = cnxk_rep_rx_queue_setup,\n+\t.rx_queue_release = cnxk_rep_rx_queue_release,\n+\t.tx_queue_setup = cnxk_rep_tx_queue_setup,\n+\t.tx_queue_release = cnxk_rep_tx_queue_release,\n+\t.link_update = cnxk_rep_link_update,\n+\t.dev_close = cnxk_rep_dev_close,\n+\t.dev_stop = cnxk_rep_dev_stop,\n+\t.stats_get = cnxk_rep_stats_get,\n+\t.stats_reset = cnxk_rep_stats_reset,\n+\t.flow_ops_get = cnxk_rep_flow_ops_get\n+};\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex ea7e363e89..fcd5d3d569 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -34,6 +34,8 @@ sources = files(\n 'cnxk_lookup.c',\n 'cnxk_ptp.c',\n 'cnxk_flow.c',\n+ 'cnxk_rep.c',\n+ 'cnxk_rep_ops.c',\n 'cnxk_stats.c',\n 'cnxk_tm.c',\n )\n", "prefixes": [ "v6", "05/23" ] }