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GET /api/patches/13774/?format=api
{ "id": 13774, "url": "https://patches.dpdk.org/api/patches/13774/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1465977220-3970-16-git-send-email-beilei.xing@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1465977220-3970-16-git-send-email-beilei.xing@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1465977220-3970-16-git-send-email-beilei.xing@intel.com", "date": "2016-06-15T07:53:25", "name": "[dpdk-dev,v3,15/30] ixgbe/base: refactor NW management interface ops", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1df3939c91ca1715c1eb5d0127d630f21dfb56e8", "submitter": { "id": 410, "url": "https://patches.dpdk.org/api/people/410/?format=api", "name": "Xing, Beilei", "email": "beilei.xing@intel.com" }, "delegate": { "id": 10, "url": "https://patches.dpdk.org/api/users/10/?format=api", "username": "bruce", "first_name": "Bruce", "last_name": "Richardson", "email": "bruce.richardson@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1465977220-3970-16-git-send-email-beilei.xing@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/13774/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/13774/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id D8FBAC2FE;\n\tWed, 15 Jun 2016 09:54:25 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n\tby dpdk.org (Postfix) with ESMTP id 26E02C138\n\tfor <dev@dpdk.org>; Wed, 15 Jun 2016 09:54:21 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga102.fm.intel.com with ESMTP; 15 Jun 2016 00:54:20 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga002.fm.intel.com with ESMTP; 15 Jun 2016 00:54:19 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id u5F7sIZm014852;\n\tWed, 15 Jun 2016 15:54:18 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid u5F7sEXi004112; Wed, 15 Jun 2016 15:54:16 +0800", "(from beileixi@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id u5F7sEU7004108; \n\tWed, 15 Jun 2016 15:54:14 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos; i=\"5.26,475,1459839600\"; d=\"scan'208\";\n\ta=\"1002276245\"", "From": "Beilei Xing <beilei.xing@intel.com>", "To": "wenzhuo.lu@intel.com", "Cc": "dev@dpdk.org, Beilei Xing <beilei.xing@intel.com>", "Date": "Wed, 15 Jun 2016 15:53:25 +0800", "Message-Id": "<1465977220-3970-16-git-send-email-beilei.xing@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1465977220-3970-1-git-send-email-beilei.xing@intel.com>", "References": "<1465887596-10346-1-git-send-email-beilei.xing@intel.com>\n\t<1465977220-3970-1-git-send-email-beilei.xing@intel.com>", "Subject": "[dpdk-dev] [PATCH v3 15/30] ixgbe/base: refactor NW management\n\tinterface ops", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds ixgbe_read_mng_if_sel_x550em to read NW_MNG_IF_SEL\nregister and save fields such as PHY MDIO_ADD.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/net/ixgbe/base/ixgbe_type.h | 2 ++\n drivers/net/ixgbe/base/ixgbe_x550.c | 48 +++++++++++++++++++++++--------------\n 2 files changed, 32 insertions(+), 18 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h\nindex de295e1..da1fe16 100644\n--- a/drivers/net/ixgbe/base/ixgbe_type.h\n+++ b/drivers/net/ixgbe/base/ixgbe_type.h\n@@ -4134,6 +4134,8 @@ struct ixgbe_hw {\n #define IXGBE_SB_IOSF_TARGET_KR_PHY\t0\n \n #define IXGBE_NW_MNG_IF_SEL\t\t0x00011178\n+#define IXGBE_NW_MNG_IF_SEL_MDIO_ACT\t(1 << 1)\n+#define IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M (1 << 23)\n #define IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE (1 << 24)\n #define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT 3\n #define IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD\t\\\ndiff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c\nindex aaf6572..993ef16 100644\n--- a/drivers/net/ixgbe/base/ixgbe_x550.c\n+++ b/drivers/net/ixgbe/base/ixgbe_x550.c\n@@ -338,9 +338,8 @@ static s32 ixgbe_identify_phy_1g(struct ixgbe_hw *hw)\n {\n \tu16 phy_id_high;\n \tu16 phy_id_low;\n-\tu32 val = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);\n+\tu32 val;\n \n-\thw->phy.addr = (val >> 3) & 0x1F;\n \tval = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,\n \t\t\t\t hw->phy.addr, &phy_id_high);\n \tif (val || phy_id_high == 0xFFFF) {\n@@ -1843,6 +1842,33 @@ STATIC s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,\n }\n \n /**\n+ * ixgbe_read_mng_if_sel_x550em - Read NW_MNG_IF_SEL register\n+ * @hw: pointer to hardware structure\n+ *\n+ * Read NW_MNG_IF_SEL register and save field values, and check for valid field\n+ * values.\n+ **/\n+STATIC s32 ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw)\n+{\n+\t/* Save NW management interface connected on board. This is used\n+\t * to determine internal PHY mode.\n+\t */\n+\thw->phy.nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);\n+\n+\t/* If X552 (X550EM_a) and MDIO is connected to external PHY, then set\n+\t * PHY address. This register field was has only been used for X552.\n+\t */\n+\tif (hw->mac.type == ixgbe_mac_X550EM_a &&\n+\t hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_MDIO_ACT) {\n+\t\thw->phy.addr = (hw->phy.nw_mng_if_sel &\n+\t\t\t\tIXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD) >>\n+\t\t\t\tIXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT;\n+\t}\n+\n+\treturn IXGBE_SUCCESS;\n+}\n+\n+/**\n * ixgbe_init_phy_ops_X550em - PHY/SFP specific init\n * @hw: pointer to hardware structure\n *\n@@ -1859,14 +1885,11 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)\n \n \thw->mac.ops.set_lan_id(hw);\n \n+\tixgbe_read_mng_if_sel_x550em(hw);\n+\n \tif (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) {\n \t\tphy->phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;\n \t\tixgbe_setup_mux_ctl(hw);\n-\n-\t\t/* Save NW management interface connected on board. This is used\n-\t\t * to determine internal PHY mode.\n-\t\t */\n-\t\tphy->nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);\n \t\tphy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;\n \t}\n \n@@ -1893,11 +1916,6 @@ s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)\n \t\tphy->ops.write_reg = ixgbe_write_phy_reg_x550em;\n \t\tbreak;\n \tcase ixgbe_phy_x550em_ext_t:\n-\t\t/* Save NW management interface connected on board. This is used\n-\t\t * to determine internal PHY mode\n-\t\t */\n-\t\tphy->nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);\n-\n \t\t/* If internal link mode is XFI, then setup iXFI internal link,\n \t\t * else setup KR now.\n \t\t */\n@@ -2256,12 +2274,6 @@ s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,\n \t\t/* Configure internal PHY for KR/KX. */\n \t\tixgbe_setup_kr_speed_x550em(hw, speed);\n \n-\t\t/* Get CS4227 MDIO address */\n-\t\thw->phy.addr =\n-\t\t\t(hw->phy.nw_mng_if_sel &\n-\t\t\t IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD)\n-\t\t\t>> IXGBE_NW_MNG_IF_SEL_MDIO_PHY_ADD_SHIFT;\n-\n \t\tif (hw->phy.addr == 0x0 || hw->phy.addr == 0xFFFF) {\n \t\t\t/* Find Address */\n \t\t\tDEBUGOUT(\"Invalid NW_MNG_IF_SEL.MDIO_PHY_ADD value\\n\");\n", "prefixes": [ "dpdk-dev", "v3", "15/30" ] }