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GET /api/patches/136423/?format=api
{ "id": 136423, "url": "https://patches.dpdk.org/api/patches/136423/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20240206121736.27391-6-viacheslavo@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240206121736.27391-6-viacheslavo@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240206121736.27391-6-viacheslavo@nvidia.com", "date": "2024-02-06T12:17:36", "name": "[6/6] net/mlx5: add modify field action IPsec support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "01a3017dec3e2f78a79f5865052319743420f765", "submitter": { "id": 1926, "url": "https://patches.dpdk.org/api/people/1926/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@nvidia.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20240206121736.27391-6-viacheslavo@nvidia.com/mbox/", "series": [ { "id": 31008, "url": "https://patches.dpdk.org/api/series/31008/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=31008", "date": "2024-02-06T12:17:31", "name": "[1/6] ethdev: add modify IPv4 next protocol field", "version": 1, "mbox": "https://patches.dpdk.org/series/31008/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/136423/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/136423/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E05A643A2D;\n\tTue, 6 Feb 2024 13:18:45 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0101C410F6;\n\tTue, 6 Feb 2024 13:18:28 +0100 (CET)", "from NAM04-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam04on2071.outbound.protection.outlook.com [40.107.102.71])\n by mails.dpdk.org (Postfix) with ESMTP id 2D33E410F6\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<matan@nvidia.com>, <rasland@nvidia.com>, <orika@nvidia.com>,\n <dsosnowski@nvidia.com>", "Subject": "[PATCH 6/6] net/mlx5: add modify field action IPsec support", "Date": "Tue, 6 Feb 2024 14:17:36 +0200", "Message-ID": "<20240206121736.27391-6-viacheslavo@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20240206121736.27391-1-viacheslavo@nvidia.com>", "References": "<20240206121736.27391-1-viacheslavo@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1PEPF000044EE:EE_|SN7PR12MB7977:EE_", "X-MS-Office365-Filtering-Correlation-Id": "7a96f4cd-a4f7-476c-d44a-08dc270db621", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n Wpapb4k1yVlf6BCQ81pCh6WpnEUeb4CWijQEUx5wS+E4Ab9L5aknzEF8WKbM1mCCJt/Cva1qcb2U3g7Eq8iJQDrLMNPqaoz5O4V8CJDjHqmARau4QZ/0xzpqGBFaFHHAkQuNNaxGZerchnMJ8St9alkMlelZjxF9J1pa7dg/AiCpmL1C7siUlVOHHb4we2Z6dZt8jPTkSeqHcY7SKhLG7HyXK1bTYDwjqGsuKg5TZVPpijS4EFDiCM3txW6GISDeZAu2s3Jby66C2K8vU2mOIqAmwsEFukrEy7euMep6reYWXTgKi5sRcQwbiJCTVzfrXqGghjLKfZrkaS0Aa9EJbTO6/DPwWHvpkQI0S9s12JamiEOE6WM7Tks/BODbINY5nnzMlihLFzQvGKgYL7kW20POZRJd8TXXkRjY86G2qbgUdU4e8FnMbomHsKNkxFtIXUtLCNuAldYMeVd/cldP0cfAej6/9elOHXzksiwkTbunifJn+7jAs5FssEj73ehXXn4hWCfk0VFDLJZ9JrX3fBQfETjKdZbEqZbVgFQ5dYwk9dTNZsCopWsIbN/LEYVce8/2OFrdGOkhVvMXI52AnwRwuqMSCKVN70b9yt/jNS5T6/V4kOhD50RbcEtU78Ey31tyCMvNaY3JTuM2duyr8TMcfd44G5BoNlexbIQLIq+9xLMU7EjzrreYpuNalnziBIrero9vJyQtVf6/d9jtJOSoqcfn2YykfeO20JHXlBIHJLLdQ6sTyd7YIf0f1xjr", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(376002)(396003)(136003)(346002)(39860400002)(230922051799003)(1800799012)(64100799003)(82310400011)(451199024)(186009)(40470700004)(46966006)(36840700001)(55016003)(36756003)(40480700001)(40460700003)(478600001)(2906002)(107886003)(426003)(1076003)(47076005)(82740400003)(26005)(41300700001)(16526019)(336012)(6286002)(6916009)(2616005)(5660300002)(54906003)(7636003)(356005)(316002)(70206006)(4326008)(8936002)(6666004)(36860700001)(7696005)(8676002)(86362001)(70586007);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "06 Feb 2024 12:18:22.2558 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 7a96f4cd-a4f7-476c-d44a-08dc270db621", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1PEPF000044EE.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SN7PR12MB7977", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add mlx5 PMD support for the IPsec fields:\n\n - RTE_FLOW_FIELD_ESP_SPI - SPI value in IPsec header\n - RTE_FLOW_FIELD_ESP_SEQ_NUM - sequence number in header\n - RTE_FLOW_FIELD_ESP_PROTO - next protocol value in trailer\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n doc/guides/rel_notes/release_24_03.rst | 3 +++\n drivers/common/mlx5/mlx5_prm.h | 3 +++\n drivers/net/mlx5/mlx5_flow_dv.c | 31 ++++++++++++++++++++++++++\n 3 files changed, 37 insertions(+)", "diff": "diff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst\nindex 2f78009dd8..50e8476e59 100644\n--- a/doc/guides/rel_notes/release_24_03.rst\n+++ b/doc/guides/rel_notes/release_24_03.rst\n@@ -96,6 +96,9 @@ New Features\n * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_OPT_CLASS`` flow action.\n * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_OPT_DATA`` flow action.\n * Added HW steering support for modify field ``RTE_FLOW_FIELD_IPV4_PROTO`` flow action.\n+ * Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_SPI`` flow action.\n+ * Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_SEQ_NUM`` flow action.\n+\t* Added HW steering support for modify field ``RTE_FLOW_FIELD_ESP_PROTO`` flow action.\n \n \n Removed Items\ndiff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex 44413517d0..3150412580 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -854,6 +854,9 @@ enum mlx5_modification_field {\n \tMLX5_MODI_OUT_IPV6_PAYLOAD_LEN = 0x11E,\n \tMLX5_MODI_OUT_IPV4_IHL = 0x11F,\n \tMLX5_MODI_OUT_TCP_DATA_OFFSET = 0x120,\n+\tMLX5_MODI_OUT_ESP_SPI = 0x5E,\n+\tMLX5_MODI_OUT_ESP_SEQ_NUM = 0x82,\n+\tMLX5_MODI_OUT_IPSEC_NEXT_HDR = 0x126,\n \tMLX5_MODI_INVALID = INT_MAX,\n };\n \ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 764940b700..90413f4a38 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1414,7 +1414,11 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev,\n \tcase RTE_FLOW_FIELD_GTP_TEID:\n \tcase RTE_FLOW_FIELD_MPLS:\n \tcase RTE_FLOW_FIELD_TAG:\n+\tcase RTE_FLOW_FIELD_ESP_SPI:\n+\tcase RTE_FLOW_FIELD_ESP_SEQ_NUM:\n \t\treturn 32;\n+\tcase RTE_FLOW_FIELD_ESP_PROTO:\n+\t\treturn 8;\n \tcase RTE_FLOW_FIELD_MARK:\n \t\treturn rte_popcount32(priv->sh->dv_mark_mask);\n \tcase RTE_FLOW_FIELD_META:\n@@ -2205,6 +2209,33 @@ mlx5_flow_field_id_to_modify_info\n \t\telse\n \t\t\tinfo[idx].offset = off_be;\n \t\tbreak;\n+\tcase RTE_FLOW_FIELD_ESP_PROTO:\n+\t\tMLX5_ASSERT(data->offset + width <= 8);\n+\t\toff_be = 8 - (data->offset + width);\n+\t\tinfo[idx] = (struct field_modify_info){1, 0, MLX5_MODI_OUT_IPSEC_NEXT_HDR};\n+\t\tif (mask)\n+\t\t\tmask[idx] = flow_modify_info_mask_8(width, off_be);\n+\t\telse\n+\t\t\tinfo[idx].offset = off_be;\n+\t\tbreak;\n+\tcase RTE_FLOW_FIELD_ESP_SPI:\n+\t\tMLX5_ASSERT(data->offset + width <= 32);\n+\t\toff_be = 32 - (data->offset + width);\n+\t\tinfo[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_ESP_SPI};\n+\t\tif (mask)\n+\t\t\tmask[idx] = flow_modify_info_mask_32(width, off_be);\n+\t\telse\n+\t\t\tinfo[idx].offset = off_be;\n+\t\tbreak;\n+\tcase RTE_FLOW_FIELD_ESP_SEQ_NUM:\n+\t\tMLX5_ASSERT(data->offset + width <= 32);\n+\t\toff_be = 32 - (data->offset + width);\n+\t\tinfo[idx] = (struct field_modify_info){4, 0, MLX5_MODI_OUT_ESP_SEQ_NUM};\n+\t\tif (mask)\n+\t\t\tmask[idx] = flow_modify_info_mask_32(width, off_be);\n+\t\telse\n+\t\t\tinfo[idx].offset = off_be;\n+\t\tbreak;\n \tcase RTE_FLOW_FIELD_FLEX_ITEM:\n \t\tMLX5_ASSERT(data->flex_handle != NULL && !(data->offset & 0x7));\n \t\tmlx5_modify_flex_item(dev, (const struct mlx5_flex_item *)data->flex_handle,\n", "prefixes": [ "6/6" ] }