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GET /api/patches/134959/?format=api
{ "id": 134959, "url": "https://patches.dpdk.org/api/patches/134959/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20231208082835.2817601-3-amitprakashs@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231208082835.2817601-3-amitprakashs@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231208082835.2817601-3-amitprakashs@marvell.com", "date": "2023-12-08T08:28:35", "name": "[3/3] event/cnxk: support DMA event functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "2fad3572c4eb95ef5279c3186d514459e1d5b063", "submitter": { "id": 2699, "url": "https://patches.dpdk.org/api/people/2699/?format=api", "name": "Amit Prakash Shukla", "email": "amitprakashs@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20231208082835.2817601-3-amitprakashs@marvell.com/mbox/", "series": [ { "id": 30491, "url": "https://patches.dpdk.org/api/series/30491/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=30491", "date": "2023-12-08T08:28:33", "name": "[1/3] common/cnxk: dma result to an offset of the event", "version": 1, "mbox": "https://patches.dpdk.org/series/30491/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/134959/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/134959/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7E300436A6;\n\tFri, 8 Dec 2023 09:29:32 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CAB9C42FE7;\n\tFri, 8 Dec 2023 09:29:31 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 44F9642FE7\n for <dev@dpdk.org>; Fri, 8 Dec 2023 09:29:30 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 3B81KRCl028755 for <dev@dpdk.org>; Fri, 8 Dec 2023 00:29:29 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3uubddc94q-4\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 08 Dec 2023 00:29:29 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Fri, 8 Dec 2023 00:29:26 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Fri, 8 Dec 2023 00:29:26 -0800", "from localhost.localdomain (unknown [10.28.36.157])\n by maili.marvell.com (Postfix) with ESMTP id B799C3F7089;\n Fri, 8 Dec 2023 00:29:23 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=Ger90ubExn/LvWUfTHTgINaDfgjcktxLH9ANzvBpvEU=;\n b=bp9Oos8DueN9I5SFiIgwc86fuL5/GMze20oasakM8A/uSB6d4kRscUjT3wcYjy4GdZAZ\n AAVvJtdMihAZ6HroOd1OUPuMr1GZzBWuUrdTpW/qfQ/MB8O+WN4kGDaeUyCrnp431lmI\n fuARsX9EGRqEf024/qKR9mobrFMrQYV+ZXzDuwHsx8fdOd91JOfO3X2cKYrhD+CAQQco\n 8DKJEgVSjYrjONYPeBs+BMDmHsQjJeTiW1s8XJvlq32A1AzLJ67mYIAO91RgLpzdzzco\n yKWixlntMvTgw42hKrWzXqbMWo6S9WXsxIM6Tp1K80LNxwhOeoBcsKW6wVrpZnZxZs0b Zg==", "From": "Amit Prakash Shukla <amitprakashs@marvell.com>", "To": "Pavan Nikhilesh <pbhagavatula@marvell.com>, Shijith Thotton\n <sthotton@marvell.com>", "CC": "<dev@dpdk.org>, <jerinj@marvell.com>, <vattunuru@marvell.com>,\n <ndabilpuram@marvell.com>, Amit Prakash Shukla <amitprakashs@marvell.com>", "Subject": "[PATCH 3/3] event/cnxk: support DMA event functions", "Date": "Fri, 8 Dec 2023 13:58:35 +0530", "Message-ID": "<20231208082835.2817601-3-amitprakashs@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20231208082835.2817601-1-amitprakashs@marvell.com>", "References": "<20231208082835.2817601-1-amitprakashs@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "mjKPk6EjuK3xYYxZ91Ge3gx6ocR40_I7", "X-Proofpoint-GUID": "mjKPk6EjuK3xYYxZ91Ge3gx6ocR40_I7", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2023-12-08_04,2023-12-07_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added support of dma driver callback assignment to eventdev\nenqueue and dequeue. The change also defines dma adapter\ncapabilities function.\n\nDepends-on: patch-134955 (\"lib/dmadev: get DMA device using device ID\")\n\nSigned-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 70 +++++++++++++++++\n drivers/event/cnxk/cn10k_worker.h | 3 +\n drivers/event/cnxk/cn9k_eventdev.c | 67 ++++++++++++++++\n drivers/event/cnxk/cn9k_worker.h | 3 +\n drivers/event/cnxk/cnxk_eventdev.h | 3 +\n drivers/event/cnxk/cnxk_eventdev_adptr.c | 97 ++++++++++++++++++++++++\n drivers/event/cnxk/meson.build | 3 +-\n 7 files changed, 244 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex bb0c910553..498f97ff2e 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -8,6 +8,9 @@\n #include \"cn10k_cryptodev_ops.h\"\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n+#include \"cnxk_dma_event_dp.h\"\n+\n+#include <rte_dmadev_pmd.h>\n \n #define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \\\n \tdeq_op = deq_ops[dev->rx_offloads & (NIX_RX_OFFLOAD_MAX - 1)]\n@@ -477,6 +480,8 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \telse\n \t\tevent_dev->ca_enqueue = cn10k_cpt_sg_ver1_crypto_adapter_enqueue;\n \n+\tevent_dev->dma_enqueue = cn10k_dma_adapter_enqueue;\n+\n \tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F)\n \t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, sso_hws_tx_adptr_enq_seg);\n \telse\n@@ -1020,6 +1025,67 @@ cn10k_crypto_adapter_vec_limits(const struct rte_eventdev *event_dev,\n \treturn 0;\n }\n \n+static int\n+cn10k_dma_adapter_caps_get(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint32_t *caps)\n+{\n+\tstruct rte_dma_dev *dma_dev;\n+\n+\tRTE_SET_USED(event_dev);\n+\n+\tdma_dev = rte_dma_pmd_get_dev_by_id(dma_dev_id);\n+\tif (dma_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(dma_dev->device, \"cnxk_dmadev_pci_driver\", EINVAL);\n+\n+\t*caps = RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_dma_adapter_vchan_add(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint16_t vchan_id,\n+\t\t\t const struct rte_event *event)\n+{\n+\tstruct rte_dma_dev *dma_dev;\n+\tint ret;\n+\n+\tRTE_SET_USED(event);\n+\tdma_dev = rte_dma_pmd_get_dev_by_id(dma_dev_id);\n+\tif (dma_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(dma_dev->device, \"cnxk_dmadev_pci_driver\", EINVAL);\n+\n+\tcn10k_sso_fp_fns_set((struct rte_eventdev *)(uintptr_t)event_dev);\n+\n+\tret = cnxk_dma_adapter_vchan_add(event_dev, dma_dev_id, vchan_id);\n+\tcn10k_sso_set_priv_mem(event_dev, NULL);\n+\n+\treturn ret;\n+}\n+\n+static int\n+cn10k_dma_adapter_vchan_del(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint16_t vchan_id)\n+{\n+\tstruct rte_dma_dev *dma_dev;\n+\n+\tRTE_SET_USED(event_dev);\n+\n+\tdma_dev = rte_dma_pmd_get_dev_by_id(dma_dev_id);\n+\tif (dma_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(dma_dev->device, \"cnxk_dmadev_pci_driver\", EINVAL);\n+\n+\treturn cnxk_dma_adapter_vchan_del(dma_dev_id, vchan_id);\n+}\n+\n+\n+\n static struct eventdev_ops cn10k_sso_dev_ops = {\n \t.dev_infos_get = cn10k_sso_info_get,\n \t.dev_configure = cn10k_sso_dev_configure,\n@@ -1061,6 +1127,10 @@ static struct eventdev_ops cn10k_sso_dev_ops = {\n \t.crypto_adapter_queue_pair_del = cn10k_crypto_adapter_qp_del,\n \t.crypto_adapter_vector_limits_get = cn10k_crypto_adapter_vec_limits,\n \n+\t.dma_adapter_caps_get = cn10k_dma_adapter_caps_get,\n+\t.dma_adapter_vchan_add = cn10k_dma_adapter_vchan_add,\n+\t.dma_adapter_vchan_del = cn10k_dma_adapter_vchan_del,\n+\n \t.xstats_get = cnxk_sso_xstats_get,\n \t.xstats_reset = cnxk_sso_xstats_reset,\n \t.xstats_get_names = cnxk_sso_xstats_get_names,\ndiff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h\nindex 8aa916fa12..0036495d98 100644\n--- a/drivers/event/cnxk/cn10k_worker.h\n+++ b/drivers/event/cnxk/cn10k_worker.h\n@@ -7,6 +7,7 @@\n \n #include <rte_eventdev.h>\n #include \"cn10k_cryptodev_event_dp.h\"\n+#include \"cnxk_dma_event_dp.h\"\n #include \"cn10k_rx.h\"\n #include \"cnxk_worker.h\"\n #include \"cn10k_eventdev.h\"\n@@ -236,6 +237,8 @@ cn10k_sso_hws_post_process(struct cn10k_sso_hws *ws, uint64_t *u64,\n \t\t/* Mark vector mempool object as get */\n \t\tRTE_MEMPOOL_CHECK_COOKIES(rte_mempool_from_obj((void *)u64[1]),\n \t\t\t\t\t (void **)&u64[1], 1, 1);\n+\t} else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_DMADEV) {\n+\t\tu64[1] = cnxk_dma_adapter_dequeue(u64[1]);\n \t}\n }\n \ndiff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex 9fb9ca0d63..5365a38f52 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -6,6 +6,8 @@\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n \n+#include <rte_dmadev_pmd.h>\n+\n #define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id)\n \n #define CN9K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \\\n@@ -511,6 +513,8 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \t\t\t\t\t sso_hws_dual_tx_adptr_enq);\n \t}\n \n+\tevent_dev->dma_enqueue = cn9k_dma_adapter_enqueue;\n+\n \tevent_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;\n \trte_mb();\n #else\n@@ -1018,6 +1022,65 @@ cn9k_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n \t\t\t\t cn9k_sso_set_priv_mem);\n }\n \n+static int\n+cn9k_dma_adapter_caps_get(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint32_t *caps)\n+{\n+\tstruct rte_dma_dev *dma_dev;\n+\tRTE_SET_USED(event_dev);\n+\n+\tdma_dev = rte_dma_pmd_get_dev_by_id(dma_dev_id);\n+\tif (dma_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(dma_dev->device, \"cnxk_dmadev_pci_driver\", EINVAL);\n+\n+\t*caps = RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn9k_dma_adapter_vchan_add(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint16_t vchan_id,\n+\t\t\t const struct rte_event *event)\n+{\n+\tstruct rte_dma_dev *dma_dev;\n+\tint ret;\n+\n+\tRTE_SET_USED(event);\n+\n+\tdma_dev = rte_dma_pmd_get_dev_by_id(dma_dev_id);\n+\tif (dma_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(dma_dev->device, \"cnxk_dmadev_pci_driver\", EINVAL);\n+\n+\tcn9k_sso_fp_fns_set((struct rte_eventdev *)(uintptr_t)event_dev);\n+\n+\tret = cnxk_dma_adapter_vchan_add(event_dev, dma_dev_id, vchan_id);\n+\tcn9k_sso_set_priv_mem(event_dev, NULL);\n+\n+\treturn ret;\n+}\n+\n+static int\n+cn9k_dma_adapter_vchan_del(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint16_t vchan_id)\n+{\n+\tstruct rte_dma_dev *dma_dev;\n+\n+\tRTE_SET_USED(event_dev);\n+\n+\tdma_dev = rte_dma_pmd_get_dev_by_id(dma_dev_id);\n+\tif (dma_dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(dma_dev->device, \"cnxk_dmadev_pci_driver\", EINVAL);\n+\n+\treturn cnxk_dma_adapter_vchan_del(dma_dev_id, vchan_id);\n+}\n+\n static struct eventdev_ops cn9k_sso_dev_ops = {\n \t.dev_infos_get = cn9k_sso_info_get,\n \t.dev_configure = cn9k_sso_dev_configure,\n@@ -1056,6 +1119,10 @@ static struct eventdev_ops cn9k_sso_dev_ops = {\n \t.crypto_adapter_queue_pair_add = cn9k_crypto_adapter_qp_add,\n \t.crypto_adapter_queue_pair_del = cn9k_crypto_adapter_qp_del,\n \n+\t.dma_adapter_caps_get = cn9k_dma_adapter_caps_get,\n+\t.dma_adapter_vchan_add = cn9k_dma_adapter_vchan_add,\n+\t.dma_adapter_vchan_del = cn9k_dma_adapter_vchan_del,\n+\n \t.xstats_get = cnxk_sso_xstats_get,\n \t.xstats_reset = cnxk_sso_xstats_reset,\n \t.xstats_get_names = cnxk_sso_xstats_get_names,\ndiff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h\nindex 0451157812..e8863e42fc 100644\n--- a/drivers/event/cnxk/cn9k_worker.h\n+++ b/drivers/event/cnxk/cn9k_worker.h\n@@ -11,6 +11,7 @@\n #include \"cnxk_ethdev.h\"\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n+#include \"cnxk_dma_event_dp.h\"\n #include \"cn9k_cryptodev_ops.h\"\n \n #include \"cn9k_ethdev.h\"\n@@ -205,6 +206,8 @@ cn9k_sso_hws_post_process(uint64_t *u64, uint64_t mbuf, const uint32_t flags,\n \t\tif (flags & NIX_RX_OFFLOAD_TSTAMP_F)\n \t\t\tcn9k_sso_process_tstamp(u64[1], mbuf, tstamp[port]);\n \t\tu64[1] = mbuf;\n+\t} else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_DMADEV) {\n+\t\tu64[1] = cnxk_dma_adapter_dequeue(u64[1]);\n \t}\n }\n \ndiff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h\nindex d42d1afa1a..fa99dede85 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.h\n+++ b/drivers/event/cnxk/cnxk_eventdev.h\n@@ -284,4 +284,7 @@ int cnxk_crypto_adapter_qp_add(const struct rte_eventdev *event_dev,\n \t\t\t const struct rte_event_crypto_adapter_queue_conf *conf);\n int cnxk_crypto_adapter_qp_del(const struct rte_cryptodev *cdev, int32_t queue_pair_id);\n \n+int cnxk_dma_adapter_vchan_add(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint16_t vchan_id);\n+int cnxk_dma_adapter_vchan_del(const int16_t dma_dev_id, uint16_t vchan_id);\n #endif /* __CNXK_EVENTDEV_H__ */\ndiff --git a/drivers/event/cnxk/cnxk_eventdev_adptr.c b/drivers/event/cnxk/cnxk_eventdev_adptr.c\nindex 92aea92389..a2a59b16c9 100644\n--- a/drivers/event/cnxk/cnxk_eventdev_adptr.c\n+++ b/drivers/event/cnxk/cnxk_eventdev_adptr.c\n@@ -5,6 +5,7 @@\n #include \"cnxk_cryptodev_ops.h\"\n #include \"cnxk_ethdev.h\"\n #include \"cnxk_eventdev.h\"\n+#include \"cnxk_dmadev.h\"\n \n void\n cnxk_sso_updt_xae_cnt(struct cnxk_sso_evdev *dev, void *data,\n@@ -737,3 +738,99 @@ cnxk_crypto_adapter_qp_del(const struct rte_cryptodev *cdev,\n \n \treturn 0;\n }\n+\n+static int\n+dma_adapter_vchan_setup(const int16_t dma_dev_id, struct cnxk_dpi_conf *vchan,\n+\t\t\tuint16_t vchan_id)\n+{\n+\tchar name[RTE_MEMPOOL_NAMESIZE];\n+\tuint32_t cache_size, nb_req;\n+\tunsigned int req_size;\n+\n+\tsnprintf(name, RTE_MEMPOOL_NAMESIZE, \"cnxk_dma_req_%u:%u\", dma_dev_id, vchan_id);\n+\treq_size = sizeof(struct cnxk_dpi_compl_s);\n+\n+\tnb_req = vchan->c_desc.max_cnt;\n+\tcache_size = 16;\n+\tnb_req += (cache_size * rte_lcore_count());\n+\n+\tvchan->adapter_info.req_mp = rte_mempool_create(name, nb_req, req_size, cache_size, 0,\n+\t\t\t\t\t\t\tNULL, NULL, NULL, NULL, rte_socket_id(), 0);\n+\tif (vchan->adapter_info.req_mp == NULL)\n+\t\treturn -ENOMEM;\n+\n+\tvchan->adapter_info.enabled = true;\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_dma_adapter_vchan_add(const struct rte_eventdev *event_dev,\n+\t\t\t const int16_t dma_dev_id, uint16_t vchan_id)\n+{\n+\tstruct cnxk_sso_evdev *sso_evdev = cnxk_sso_pmd_priv(event_dev);\n+\tuint32_t adptr_xae_cnt = 0;\n+\tstruct cnxk_dpi_vf_s *dpivf;\n+\tstruct cnxk_dpi_conf *vchan;\n+\tint ret;\n+\n+\tdpivf = rte_dma_fp_objs[dma_dev_id].dev_private;\n+\tif ((int16_t)vchan_id == -1) {\n+\t\tuint16_t vchan_id;\n+\n+\t\tfor (vchan_id = 0; vchan_id < dpivf->num_vchans; vchan_id++) {\n+\t\t\tvchan = &dpivf->conf[vchan_id];\n+\t\t\tret = dma_adapter_vchan_setup(dma_dev_id, vchan, vchan_id);\n+\t\t\tif (ret) {\n+\t\t\t\tcnxk_dma_adapter_vchan_del(dma_dev_id, -1);\n+\t\t\t\treturn ret;\n+\t\t\t}\n+\t\t\tadptr_xae_cnt += vchan->adapter_info.req_mp->size;\n+\t\t}\n+\t} else {\n+\t\tvchan = &dpivf->conf[vchan_id];\n+\t\tret = dma_adapter_vchan_setup(dma_dev_id, vchan, vchan_id);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t\tadptr_xae_cnt = vchan->adapter_info.req_mp->size;\n+\t}\n+\n+\t/* Update dma adapter XAE count */\n+\tsso_evdev->adptr_xae_cnt += adptr_xae_cnt;\n+\tcnxk_sso_xae_reconfigure((struct rte_eventdev *)(uintptr_t)event_dev);\n+\n+\treturn 0;\n+}\n+\n+static int\n+dma_adapter_vchan_free(struct cnxk_dpi_conf *vchan)\n+{\n+\trte_mempool_free(vchan->adapter_info.req_mp);\n+\tvchan->adapter_info.enabled = false;\n+\n+\treturn 0;\n+}\n+\n+int\n+cnxk_dma_adapter_vchan_del(const int16_t dma_dev_id, uint16_t vchan_id)\n+{\n+\tstruct cnxk_dpi_vf_s *dpivf;\n+\tstruct cnxk_dpi_conf *vchan;\n+\n+\tdpivf = rte_dma_fp_objs[dma_dev_id].dev_private;\n+\tif ((int16_t)vchan_id == -1) {\n+\t\tuint16_t vchan_id;\n+\n+\t\tfor (vchan_id = 0; vchan_id < dpivf->num_vchans; vchan_id++) {\n+\t\t\tvchan = &dpivf->conf[vchan_id];\n+\t\t\tif (vchan->adapter_info.enabled)\n+\t\t\t\tdma_adapter_vchan_free(vchan);\n+\t\t}\n+\t} else {\n+\t\tvchan = &dpivf->conf[vchan_id];\n+\t\tif (vchan->adapter_info.enabled)\n+\t\t\tdma_adapter_vchan_free(vchan);\n+\t}\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build\nindex 13281d687f..f2e07b8665 100644\n--- a/drivers/event/cnxk/meson.build\n+++ b/drivers/event/cnxk/meson.build\n@@ -316,8 +316,7 @@ foreach flag: extra_flags\n endforeach\n \n headers = files('rte_pmd_cnxk_eventdev.h')\n-deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk']\n-\n+deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk', 'dma_cnxk']\n require_iova_in_mbuf = false\n \n annotate_locks = false\n", "prefixes": [ "3/3" ] }