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GET /api/patches/132635/?format=api
{ "id": 132635, "url": "https://patches.dpdk.org/api/patches/132635/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20231016151055.2436-1-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231016151055.2436-1-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231016151055.2436-1-pbhagavatula@marvell.com", "date": "2023-10-16T15:10:55", "name": "event/cnxk: update fc check to use SQEs", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0bf196d44eafbc16e1f5ba1a9cc78d2314927d64", "submitter": { "id": 1183, "url": "https://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20231016151055.2436-1-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 29853, "url": "https://patches.dpdk.org/api/series/29853/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=29853", "date": "2023-10-16T15:10:55", "name": "event/cnxk: update fc check to use SQEs", "version": 1, "mbox": "https://patches.dpdk.org/series/29853/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/132635/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/132635/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4F5A64317F;\n\tMon, 16 Oct 2023 17:11:16 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CA4FC402CB;\n\tMon, 16 Oct 2023 17:11:15 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id A142140269\n for <dev@dpdk.org>; Mon, 16 Oct 2023 17:11:14 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 39G9guE5013098 for <dev@dpdk.org>; Mon, 16 Oct 2023 08:11:13 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3ts2skh2mt-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Mon, 16 Oct 2023 08:11:12 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Mon, 16 Oct 2023 08:10:59 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Mon, 16 Oct 2023 08:10:59 -0700", "from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com\n [10.28.164.106])\n by maili.marvell.com (Postfix) with ESMTP id CC9983F70A8;\n Mon, 16 Oct 2023 08:10:57 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=G4afx2XEKTFuLcO63lVyiY4IEiirAuJC9OgcbKB4MDw=;\n b=JLk9MyGDe9bs7ut1AAFMr3c0U43I1f2Op+Z/4eM9zmmckbCVPzaMvgJ11QZQXTIdsZ66\n amyhhD/i2R0dkPgxmRT3Fkdl9v+V3cnE2ccudJdkxKOc76/M0MJtDRDrbG4EoRMojXyc\n tPUGtLxLvMOE2ZGwSYrar/4EnRAddESO3Ka4jEZBhwU3N7JBJIbg/Bkyg7RYYDNTpgey\n oGqwzNJm28ZUesRdfav6Nz8M9nP7FELqZt8kMRIXRrKf3EfmLtRotBRi26s3nOcEEDJ7\n JavUxoSjVjspFH4dOE/GDLP6bJi1BlswqdVZ+O2UdOBWbHnolTUFjy5mP/3498Uq6fb0 5w==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH] event/cnxk: update fc check to use SQEs", "Date": "Mon, 16 Oct 2023 20:40:55 +0530", "Message-ID": "<20231016151055.2436-1-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "P4Px-QzdL9UWUqjp-1lMDhVPLOc3E44s", "X-Proofpoint-ORIG-GUID": "P4Px-QzdL9UWUqjp-1lMDhVPLOc3E44s", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2023-10-16_09,2023-10-12_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nUpdate fc check to count SQEs instead of SQBs while waiting for\nspace.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/cnxk/cn10k_tx_worker.h | 33 ++++++++++++++++++----------\n drivers/event/cnxk/cn9k_worker.h | 33 +++++++++++++++++++++++++---\n 2 files changed, 51 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn10k_tx_worker.h b/drivers/event/cnxk/cn10k_tx_worker.h\nindex dea6cdcde2..53e0dde20c 100644\n--- a/drivers/event/cnxk/cn10k_tx_worker.h\n+++ b/drivers/event/cnxk/cn10k_tx_worker.h\n@@ -24,26 +24,35 @@ cn10k_sso_hws_xtract_meta(struct rte_mbuf *m, const uint64_t *txq_data)\n static __rte_always_inline void\n cn10k_sso_txq_fc_wait(const struct cn10k_eth_txq *txq)\n {\n+\tint64_t avail;\n+\n #ifdef RTE_ARCH_ARM64\n-\tuint64_t space;\n+\tint64_t val;\n \n \tasm volatile(PLT_CPU_FEATURE_PREAMBLE\n-\t\t \"\t\tldxr %[space], [%[addr]]\t\t\\n\"\n-\t\t \"\t\tcmp %[adj], %[space] \t\t\t\\n\"\n-\t\t \"\t\tb.hi .Ldne%=\t\t\t\t\\n\"\n+\t\t \"\t\tldxr %[val], [%[addr]]\t\t\t\\n\"\n+\t\t \"\t\tsub %[val], %[adj], %[val]\t\t\\n\"\n+\t\t \"\t\tlsl %[refill], %[val], %[shft]\t\t\\n\"\n+\t\t \"\t\tsub %[refill], %[refill], %[val]\t\\n\"\n+\t\t \"\t\tcmp %[refill], #0x0\t\t\t\\n\"\n+\t\t \"\t\tb.gt .Ldne%=\t\t\t\t\\n\"\n \t\t \"\t\tsevl\t\t\t\t\t\\n\"\n \t\t \".Lrty%=:\twfe\t\t\t\t\t\\n\"\n-\t\t \"\t\tldxr %[space], [%[addr]]\t\t\\n\"\n-\t\t \"\t\tcmp %[adj], %[space]\t\t\t\\n\"\n-\t\t \"\t\tb.ls .Lrty%=\t\t\t\t\\n\"\n+\t\t \"\t\tldxr %[val], [%[addr]]\t\t\t\\n\"\n+\t\t \"\t\tsub %[val], %[adj], %[val]\t\t\\n\"\n+\t\t \"\t\tlsl %[refill], %[val], %[shft]\t\t\\n\"\n+\t\t \"\t\tsub %[refill], %[refill], %[val]\t\\n\"\n+\t\t \"\t\tcmp %[refill], #0x0\t\t\t\\n\"\n+\t\t \"\t\tb.le .Lrty%=\t\t\t\t\\n\"\n \t\t \".Ldne%=:\t\t\t\t\t\t\\n\"\n-\t\t : [space] \"=&r\"(space)\n-\t\t : [adj] \"r\"(txq->nb_sqb_bufs_adj), [addr] \"r\"(txq->fc_mem)\n+\t\t : [refill] \"=&r\"(avail), [val] \"=&r\" (val)\n+\t\t : [addr] \"r\"(txq->fc_mem), [adj] \"r\"(txq->nb_sqb_bufs_adj),\n+\t\t [shft] \"r\"(txq->sqes_per_sqb_log2)\n \t\t : \"memory\");\n #else\n-\twhile ((uint64_t)txq->nb_sqb_bufs_adj <=\n-\t __atomic_load_n(txq->fc_mem, __ATOMIC_RELAXED))\n-\t\t;\n+\tdo {\n+\t\tavail = txq->nb_sqb_bufs_adj - __atomic_load_n(txq->fc_mem, __ATOMIC_RELAXED);\n+\t} while (((avail << txq->sqes_per_sqb_log2) - avail) <= 0);\n #endif\n }\n \ndiff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h\nindex 6936b7ad04..0451157812 100644\n--- a/drivers/event/cnxk/cn9k_worker.h\n+++ b/drivers/event/cnxk/cn9k_worker.h\n@@ -542,9 +542,36 @@ NIX_RX_FASTPATH_MODES\n static __rte_always_inline void\n cn9k_sso_txq_fc_wait(const struct cn9k_eth_txq *txq)\n {\n-\twhile ((uint64_t)txq->nb_sqb_bufs_adj <=\n-\t __atomic_load_n(txq->fc_mem, __ATOMIC_RELAXED))\n-\t\t;\n+\tint64_t avail;\n+\n+#ifdef RTE_ARCH_ARM64\n+\tint64_t val;\n+\n+\tasm volatile(PLT_CPU_FEATURE_PREAMBLE\n+\t\t \"\t\tldxr %[val], [%[addr]]\t\t\t\\n\"\n+\t\t \"\t\tsub %[val], %[adj], %[val]\t\t\\n\"\n+\t\t \"\t\tlsl %[refill], %[val], %[shft]\t\t\\n\"\n+\t\t \"\t\tsub %[refill], %[refill], %[val]\t\\n\"\n+\t\t \"\t\tcmp %[refill], #0x0\t\t\t\\n\"\n+\t\t \"\t\tb.gt .Ldne%=\t\t\t\t\\n\"\n+\t\t \"\t\tsevl\t\t\t\t\t\\n\"\n+\t\t \".Lrty%=:\twfe\t\t\t\t\t\\n\"\n+\t\t \"\t\tldxr %[val], [%[addr]]\t\t\t\\n\"\n+\t\t \"\t\tsub %[val], %[adj], %[val]\t\t\\n\"\n+\t\t \"\t\tlsl %[refill], %[val], %[shft]\t\t\\n\"\n+\t\t \"\t\tsub %[refill], %[refill], %[val]\t\\n\"\n+\t\t \"\t\tcmp %[refill], #0x0\t\t\t\\n\"\n+\t\t \"\t\tb.le .Lrty%=\t\t\t\t\\n\"\n+\t\t \".Ldne%=:\t\t\t\t\t\t\\n\"\n+\t\t : [refill] \"=&r\"(avail), [val] \"=&r\" (val)\n+\t\t : [addr] \"r\"(txq->fc_mem), [adj] \"r\"(txq->nb_sqb_bufs_adj),\n+\t\t [shft] \"r\"(txq->sqes_per_sqb_log2)\n+\t\t : \"memory\");\n+#else\n+\tdo {\n+\t\tavail = txq->nb_sqb_bufs_adj - __atomic_load_n(txq->fc_mem, __ATOMIC_RELAXED);\n+\t} while (((avail << txq->sqes_per_sqb_log2) - avail) <= 0);\n+#endif\n }\n \n static __rte_always_inline struct cn9k_eth_txq *\n", "prefixes": [] }