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GET /api/patches/1324/?format=api
{ "id": 1324, "url": "https://patches.dpdk.org/api/patches/1324/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/faece334ae2ae58553c0a19c5f8830993ae543f3.1416280649.git.e_zhumabekov@sts.kz/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<faece334ae2ae58553c0a19c5f8830993ae543f3.1416280649.git.e_zhumabekov@sts.kz>", "list_archive_url": "https://inbox.dpdk.org/dev/faece334ae2ae58553c0a19c5f8830993ae543f3.1416280649.git.e_zhumabekov@sts.kz", "date": "2014-11-18T03:21:56", "name": "[dpdk-dev,v3,3/5] hash: add fallback to software CRC32 implementation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b53f7a0447c76409948a526a86ab5b2b439fadb3", "submitter": { "id": 36, "url": "https://patches.dpdk.org/api/people/36/?format=api", "name": "Yerden Zhumabekov", "email": "e_zhumabekov@sts.kz" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/faece334ae2ae58553c0a19c5f8830993ae543f3.1416280649.git.e_zhumabekov@sts.kz/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/1324/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/1324/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 9DFDE7F58;\n\tTue, 18 Nov 2014 04:11:18 +0100 (CET)", "from mgw.gov.kz (mgw.gov.kz [89.218.88.242])\n\tby dpdk.org (Postfix) with ESMTP id D73657E70\n\tfor <dev@dpdk.org>; Tue, 18 Nov 2014 04:11:11 +0100 (CET)", "from mgw.gov.kz (mx.ctsat.kz [178.89.4.95])\n\tby mgw.gov.kz with ESMTP id sAI3LSFj028020-sAI3LSFl028020\n\t(version=TLSv1.0 cipher=AES128-SHA bits=128 verify=NO);\n\tTue, 18 Nov 2014 09:21:29 +0600", "from EXCASHUB2.rgp.local (192.168.40.53) by EdgeForefront.rgp.local\n\t(192.168.40.59) with Microsoft SMTP Server (TLS) id 14.2.247.3;\n\tTue, 18 Nov 2014 09:21:17 +0600", "from r220.rgp.local (192.168.59.10) by excashub2.rgp.local\n\t(192.168.40.48) with Microsoft SMTP Server (TLS) id 14.2.247.3;\n\tTue, 18 Nov 2014 09:21:38 +0600" ], "From": "Yerden Zhumabekov <e_zhumabekov@sts.kz>", "To": "<dev@dpdk.org>", "Date": "Tue, 18 Nov 2014 09:21:56 +0600", "Message-ID": "<faece334ae2ae58553c0a19c5f8830993ae543f3.1416280649.git.e_zhumabekov@sts.kz>", "X-Mailer": "git-send-email 1.7.9.5", "In-Reply-To": "<cover.1416280649.git.e_zhumabekov@sts.kz>", "References": "<1416160760-16087-1-git-send-email-e_zhumabekov@sts.kz>\n\t<cover.1416280649.git.e_zhumabekov@sts.kz>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[192.168.59.10]", "X-FEAS-SYSTEM-WL": "e_zhumabekov@sts.kz", "Subject": "[dpdk-dev] [PATCH v3 3/5] hash: add fallback to software CRC32\n\timplementation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Initially, SSE4.2 support is detected via CPUID instruction.\n\nAdded rte_hash_crc_set_alg() function to detect and set CRC32\nimplementation if necessary. SSE4.2 is allowed by default. If it's\nnot available, fall back to sw implementation.\n\nDepending on compiler attributes support, best available algorithm\nmay be detected upon application startup.\n\nSigned-off-by: Yerden Zhumabekov <e_zhumabekov@sts.kz>\n---\n lib/librte_hash/rte_hash_crc.h | 64 ++++++++++++++++++++++++++++++++++++++--\n 1 file changed, 62 insertions(+), 2 deletions(-)", "diff": "diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h\nindex 15f687a..c1b75e8 100644\n--- a/lib/librte_hash/rte_hash_crc.h\n+++ b/lib/librte_hash/rte_hash_crc.h\n@@ -45,7 +45,11 @@ extern \"C\" {\n #endif\n \n #include <stdint.h>\n+#ifdef RTE_MACHINE_CPUFLAG_SSE4_2\n #include <nmmintrin.h>\n+#endif\n+#include <rte_cpuflags.h>\n+#include <rte_branch_prediction.h>\n \n /* Lookup tables for software implementation of CRC32C */\n static uint32_t crc32c_tables[8][256] = {{\n@@ -363,8 +367,44 @@ crc32c_2words(uint64_t data, uint32_t init_val)\n \treturn crc;\n }\n \n+enum crc32_alg_t {\n+\tCRC32_SW = 0,\n+\tCRC32_SSE42,\n+\tCRC32_AUTODETECT\n+};\n+\n+static enum crc32_alg_t crc32_alg = CRC32_AUTODETECT;\n+\n+/**\n+ * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash\n+ * calculation.\n+ *\n+ * @param flag\n+ * unsigned integer flag\n+ * - (CRC32_SW) Don't use SSE4.2 intrinsics\n+ * - (CRC32_SSE42) Use SSE4.2 intrinsics if available, set by default\n+ */\n+static inline void\n+rte_hash_crc_set_alg(enum crc32_alg_t alg)\n+{\n+\tint sse42_supp = rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2);\n+\tenum crc32_alg_t alg_supp = sse42_supp ? CRC32_SSE42 : CRC32_SW;\n+\tcrc32_alg = (alg == CRC32_SSE42) ? alg_supp : CRC32_SW;\n+}\n+\n+/* Best available algorithm is detected via CPUID instruction */\n+#ifndef __INTEL_COMPILER\n+static inline void __attribute__((constructor))\n+rte_hash_crc_try_sse42(void)\n+{\n+\trte_hash_crc_set_alg(CRC32_SSE42);\n+}\n+#endif\n+\n /**\n * Use single crc32 instruction to perform a hash on a 4 byte value.\n+ * Fall back to software crc32 implementation in case SSE4.2 is\n+ * not supported\n *\n * @param data\n * Data to perform hash on.\n@@ -376,11 +416,22 @@ crc32c_2words(uint64_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_4byte(uint32_t data, uint32_t init_val)\n {\n-\treturn _mm_crc32_u32(init_val, data);\n+#ifdef __INTEL_COMPILER\n+\tif (unlikely(crc32_alg == CRC32_AUTODETECT))\n+\t\trte_hash_crc_set_alg(CRC32_SSE42);\n+#endif\n+#ifdef RTE_MACHINE_CPUFLAG_SSE4_2\n+\tif (likely(crc32_alg == CRC32_SSE42))\n+\t\treturn _mm_crc32_u32(init_val, data);\n+#endif\n+\n+\treturn crc32c_1word(data, init_val);\n }\n \n /**\n * Use single crc32 instruction to perform a hash on a 8 byte value.\n+ * Fall back to software crc32 implementation in case SSE4.2 is\n+ * not supported\n *\n * @param data\n * Data to perform hash on.\n@@ -392,7 +443,16 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_8byte(uint64_t data, uint32_t init_val)\n {\n-\treturn _mm_crc32_u64(init_val, data);\n+#ifdef __INTEL_COMPILER\n+\tif (unlikely(crc32_alg == CRC32_AUTODETECT))\n+\t\trte_hash_crc_set_alg(CRC32_SSE42);\n+#endif\n+#ifdef RTE_MACHINE_CPUFLAG_SSE4_2\n+\tif (likely(crc32_alg == CRC32_SSE42))\n+\t\treturn _mm_crc32_u64(init_val, data);\n+#endif\n+\n+\treturn crc32c_2words(data, init_val);\n }\n \n /**\n", "prefixes": [ "dpdk-dev", "v3", "3/5" ] }