Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/131704/?format=api
{ "id": 131704, "url": "https://patches.dpdk.org/api/patches/131704/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230920072528.14185-31-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230920072528.14185-31-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230920072528.14185-31-syalavarthi@marvell.com", "date": "2023-09-20T07:25:21", "name": "[v2,30/34] ml/cnxk: implement I/O alloc and free callbacks", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "b6c82d92e3235963bf81bb468fb349737f0e5e68", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230920072528.14185-31-syalavarthi@marvell.com/mbox/", "series": [ { "id": 29567, "url": "https://patches.dpdk.org/api/series/29567/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=29567", "date": "2023-09-20T07:24:51", "name": "Implemenation of revised ml/cnxk driver", "version": 2, "mbox": "https://patches.dpdk.org/series/29567/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/131704/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/131704/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 040C2425E4;\n\tWed, 20 Sep 2023 09:28:57 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2725942DC9;\n\tWed, 20 Sep 2023 09:26:12 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 970F540ED1\n for <dev@dpdk.org>; Wed, 20 Sep 2023 09:25:44 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 38K7JW16008355 for <dev@dpdk.org>; Wed, 20 Sep 2023 00:25:44 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3t7htasykw-14\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 20 Sep 2023 00:25:43 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Wed, 20 Sep 2023 00:25:41 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Wed, 20 Sep 2023 00:25:41 -0700", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id CBB915B692A;\n Wed, 20 Sep 2023 00:25:41 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=8Fcrp6IZ0ztVf+u1E100cf37+8zyOS8XTWw8vSeee8k=;\n b=M8GI1OHC0G6HSFhhUwIsoH4odqLZJybPbOrwOyutdep1HshWtAwuQ6nbbhMDLkqcqBgh\n CNXMSXpHsbdUEkLYuBwVz/qq2Z3o73V4myQ44YcCjGcHig6sjkdI9filU4mM61nBnmx9\n YtBgT83v3EpuXjmhVMCm0yQj3RWtIIDCj/MVPE+Z46FfG7OsY0aZIm46eSZ38f6GpgYK\n gQYUiX3+bLbdZHHPxKJQ5LH+7QmB3XgQB8bY9kMvzmd5L4aug2gN3hZNzbianTiec6Fb\n tfGbXjXl4WwPdmagoig44tM9JuMnXjGyDkvbakrwcmrjVK9ZpzVn6xEVBOB9o1fYoSpv fQ==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <aprabhu@marvell.com>,\n <ptakkar@marvell.com>", "Subject": "[PATCH v2 30/34] ml/cnxk: implement I/O alloc and free callbacks", "Date": "Wed, 20 Sep 2023 00:25:21 -0700", "Message-ID": "<20230920072528.14185-31-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.41.0", "In-Reply-To": "<20230920072528.14185-1-syalavarthi@marvell.com>", "References": "<20230830155927.3566-1-syalavarthi@marvell.com>\n <20230920072528.14185-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "XSH2iaBiQ4hAJIzzdvSoVUmNDEreQkjc", "X-Proofpoint-GUID": "XSH2iaBiQ4hAJIzzdvSoVUmNDEreQkjc", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26\n definitions=2023-09-20_02,2023-09-19_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implemented callback functions for IO allocation and free\nfor Glow layers.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ops.c | 123 +++++++++++++++++++++++++++++++++\n drivers/ml/cnxk/cn10k_ml_ops.h | 3 +\n drivers/ml/cnxk/mvtvm_ml_ops.c | 2 +\n 3 files changed, 128 insertions(+)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex f70383b128..23e98b96c5 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -1399,3 +1399,126 @@ cn10k_ml_inference_sync(void *device, uint16_t index, void *input, void *output,\n error_enqueue:\n \treturn ret;\n }\n+\n+int\n+cn10k_ml_io_alloc(void *device, uint16_t model_id, const char *layer_name, uint64_t **input_qbuffer,\n+\t\t uint64_t **output_qbuffer)\n+{\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\tstruct cnxk_ml_model *model;\n+\tstruct cnxk_ml_layer *layer;\n+\n+\tchar str[RTE_MEMZONE_NAMESIZE];\n+\tconst struct plt_memzone *mz;\n+\tuint16_t layer_id = 0;\n+\tuint64_t output_size;\n+\tuint64_t input_size;\n+\n+#ifndef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+\tPLT_SET_USED(layer_name);\n+#endif\n+\n+\tcnxk_mldev = (struct cnxk_ml_dev *)device;\n+\tif (cnxk_mldev == NULL) {\n+\t\tplt_err(\"Invalid device = %p\", cnxk_mldev);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tmodel = cnxk_mldev->mldev->data->models[model_id];\n+\tif (model == NULL) {\n+\t\tplt_err(\"Invalid model_id = %u\", model_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+#ifdef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+\tif (model->type == ML_CNXK_MODEL_TYPE_TVM) {\n+\t\tfor (layer_id = 0; layer_id < model->mvtvm.metadata.model.nb_layers; layer_id++) {\n+\t\t\tif (strcmp(model->layer[layer_id].name, layer_name) == 0)\n+\t\t\t\tbreak;\n+\t\t}\n+\n+\t\tif (layer_id == model->mvtvm.metadata.model.nb_layers) {\n+\t\t\tplt_err(\"Invalid layer name: %s\", layer_name);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (model->layer[layer_id].type != ML_CNXK_LAYER_TYPE_MRVL) {\n+\t\t\tplt_err(\"Invalid layer name / type: %s\", layer_name);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+#endif\n+\n+\tlayer = &model->layer[layer_id];\n+\tinput_size = PLT_ALIGN_CEIL(layer->info.total_input_sz_q, ML_CN10K_ALIGN_SIZE);\n+\toutput_size = PLT_ALIGN_CEIL(layer->info.total_output_sz_q, ML_CN10K_ALIGN_SIZE);\n+\n+\tsprintf(str, \"cn10k_ml_io_mz_%u_%u\", model_id, layer_id);\n+\tmz = plt_memzone_reserve_aligned(str, input_size + output_size, 0, ML_CN10K_ALIGN_SIZE);\n+\tif (mz == NULL) {\n+\t\tplt_err(\"io_alloc failed: Unable to allocate memory: model_id = %u, layer_name = %s\",\n+\t\t\tmodel_id, layer_name);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\t*input_qbuffer = mz->addr;\n+\t*output_qbuffer = PLT_PTR_ADD(mz->addr, input_size);\n+\n+\treturn 0;\n+}\n+\n+int\n+cn10k_ml_io_free(void *device, uint16_t model_id, const char *layer_name)\n+{\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\tstruct cnxk_ml_model *model;\n+\n+\tchar str[RTE_MEMZONE_NAMESIZE];\n+\tconst struct plt_memzone *mz;\n+\tuint16_t layer_id = 0;\n+\n+#ifndef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+\tPLT_SET_USED(layer_name);\n+#endif\n+\n+\tcnxk_mldev = (struct cnxk_ml_dev *)device;\n+\tif (cnxk_mldev == NULL) {\n+\t\tplt_err(\"Invalid device = %p\", cnxk_mldev);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tmodel = cnxk_mldev->mldev->data->models[model_id];\n+\tif (model == NULL) {\n+\t\tplt_err(\"Invalid model_id = %u\", model_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+#ifdef RTE_MLDEV_CNXK_ENABLE_MVTVM\n+\tif (model->type == ML_CNXK_MODEL_TYPE_TVM) {\n+\t\tfor (layer_id = 0; layer_id < model->mvtvm.metadata.model.nb_layers; layer_id++) {\n+\t\t\tif (strcmp(model->layer[layer_id].name, layer_name) == 0)\n+\t\t\t\tbreak;\n+\t\t}\n+\n+\t\tif (layer_id == model->mvtvm.metadata.model.nb_layers) {\n+\t\t\tplt_err(\"Invalid layer name: %s\", layer_name);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (model->layer[layer_id].type != ML_CNXK_LAYER_TYPE_MRVL) {\n+\t\t\tplt_err(\"Invalid layer name / type: %s\", layer_name);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+#endif\n+\n+\tsprintf(str, \"cn10k_ml_io_mz_%u_%u\", model_id, layer_id);\n+\tmz = plt_memzone_lookup(str);\n+\tif (mz == NULL) {\n+\t\tplt_err(\"io_free failed: Memzone not found: model_id = %u, layer_name = %s\",\n+\t\t\tmodel_id, layer_name);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn plt_memzone_free(mz);\n+}\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.h b/drivers/ml/cnxk/cn10k_ml_ops.h\nindex 3e75cae65a..055651eaa2 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.h\n@@ -328,5 +328,8 @@ int cn10k_ml_layer_load(void *device, uint16_t model_id, const char *layer_name,\n int cn10k_ml_layer_unload(void *device, uint16_t model_id, const char *layer_name);\n int cn10k_ml_layer_start(void *device, uint16_t model_id, const char *layer_name);\n int cn10k_ml_layer_stop(void *device, uint16_t model_id, const char *layer_name);\n+int cn10k_ml_io_alloc(void *device, uint16_t model_id, const char *layer_name,\n+\t\t uint64_t **input_qbuffer, uint64_t **output_qbuffer);\n+int cn10k_ml_io_free(void *device, uint16_t model_id, const char *layer_name);\n \n #endif /* _CN10K_ML_OPS_H_ */\ndiff --git a/drivers/ml/cnxk/mvtvm_ml_ops.c b/drivers/ml/cnxk/mvtvm_ml_ops.c\nindex d4518412be..a41ba4d343 100644\n--- a/drivers/ml/cnxk/mvtvm_ml_ops.c\n+++ b/drivers/ml/cnxk/mvtvm_ml_ops.c\n@@ -164,6 +164,8 @@ mvtvm_ml_model_load(struct cnxk_ml_dev *cnxk_mldev, struct rte_ml_model_params *\n \t\tcallback = &model->mvtvm.cb;\n \t\tcallback->tvmrt_glow_layer_load = cn10k_ml_layer_load;\n \t\tcallback->tvmrt_glow_layer_unload = cn10k_ml_layer_unload;\n+\t\tcallback->tvmrt_io_alloc = cn10k_ml_io_alloc;\n+\t\tcallback->tvmrt_io_free = cn10k_ml_io_free;\n \t} else {\n \t\tcallback = NULL;\n \t}\n", "prefixes": [ "v2", "30/34" ] }