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GET /api/patches/131567/?format=api
{ "id": 131567, "url": "https://patches.dpdk.org/api/patches/131567/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230918120705.265025-4-igozlan@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230918120705.265025-4-igozlan@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230918120705.265025-4-igozlan@nvidia.com", "date": "2023-09-18T12:07:04", "name": "[4/5] net/mlx5/hws: supporting default miss table in HWS", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f25820a7e76e192bf52d75de4ef3993ad32b7a3f", "submitter": { "id": 3118, "url": "https://patches.dpdk.org/api/people/3118/?format=api", "name": "Itamar Gozlan", "email": "igozlan@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230918120705.265025-4-igozlan@nvidia.com/mbox/", "series": [ { "id": 29534, "url": "https://patches.dpdk.org/api/series/29534/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=29534", "date": "2023-09-18T12:07:02", "name": "[1/5] net/mlx5/hws: add support for matching on bth_a bit", "version": 1, "mbox": "https://patches.dpdk.org/series/29534/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/131567/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/131567/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F134F425D1;\n\tMon, 18 Sep 2023 14:08:00 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id EA619409FA;\n\tMon, 18 Sep 2023 14:07:45 +0200 (CEST)", "from NAM10-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam10on2080.outbound.protection.outlook.com [40.107.93.80])\n by mails.dpdk.org (Postfix) with ESMTP id C94C040689\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Itamar Gozlan <igozlan@nvidia.com>", "To": "<valex@nvidia.com>, <viacheslavo@nvidia.com>, <thomas@monjalon.net>,\n <suanmingm@nvidia.com>, Matan Azrad <matan@nvidia.com>, Ori Kam\n <orika@nvidia.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 4/5] net/mlx5/hws: supporting default miss table in HWS", "Date": "Mon, 18 Sep 2023 15:07:04 +0300", "Message-ID": "<20230918120705.265025-4-igozlan@nvidia.com>", "X-Mailer": "git-send-email 2.38.1", "In-Reply-To": "<20230918120705.265025-1-igozlan@nvidia.com>", "References": "<20230918120705.265025-1-igozlan@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL6PEPF0001AB76:EE_|PH7PR12MB8123:EE_", "X-MS-Office365-Filtering-Correlation-Id": "8eb3266a-17da-40be-38bb-08dbb83fdc59", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 20Ndx6q7VhyvnjfMPmAg3DfXg/2IZ70POJgbWMNEYeZKCSmV9ra1oe5NPP/+vwXiMUb0nlcA6kKLS36O1rJf/WO/qO6Yrk0dg3rkGrjjTbHWFmnLS8p0i8kXZlFwlaSqL5gtuSse8XxauEBAVDvXtLk8qsPBWpGHw1Ep+ahdFCjcwFFEanOdqUeGwT2Uh/nK42rS4thNJkixnAUeRWNJiN8MNJRdQ3qWm+mjgwf43yYQesDsLXO5t1YzQFLuaTxScJ7DZ7HONbhd8UkC4r9KJ6yMX3GLqapI5UjCM7r6Zqk7wQ9F83DACpDZDXHbgstOumI1EoMDDjLEpp67K6HnfVqyUkWF4fDj5391UALNlVC3hiM10h+Yx3sRW1rvtFqoLnPs8PjW3nMfq8x4fbTYWqybTW+/esADjRrIAaLBM0j13klDGiIx5pNDV5xLixBe/q2Ad+ARjLVqyKw9iZgMmDtA6aSlA/8ycvqNA/HWkjTLyYq8MwLoezI/VoZSS2fGBtE9rR8YWXG6rQrdpfyExGUGhAKbIhVC7mBYutnvN+Pef/TI7p1pH/rzeQq19mTUmaZ7G1Mm1+Hcuvsf7Nv5po91zFbmJu4d38BZpALy/uQ72PZVWUOulgpXPJobZ7HMYoNDricSLr3iwMbj4Gta4h+7hzF7wfX2e98MQPsY9vUfG+WqDO/TdBwU2Y7qx64Yr66A+jqwecCuQL7KQxcA3lGN7l9LsxUbTKED6YsB/xSjLVt04l5qsINuuLVG1jOY", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(136003)(396003)(346002)(376002)(39860400002)(82310400011)(451199024)(1800799009)(186009)(36840700001)(40470700004)(46966006)(356005)(82740400003)(7636003)(55016003)(36756003)(40480700001)(40460700003)(86362001)(478600001)(70206006)(6636002)(70586007)(30864003)(110136005)(2906002)(6666004)(7696005)(8676002)(8936002)(4326008)(5660300002)(41300700001)(316002)(47076005)(36860700001)(26005)(2616005)(1076003)(6286002)(426003)(336012)(83380400001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "18 Sep 2023 12:07:42.0311 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 8eb3266a-17da-40be-38bb-08dbb83fdc59", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL6PEPF0001AB76.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "PH7PR12MB8123", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "A default miss table is a way to define what happens to traffic that does\nnot match any rule in a specific table. In hws, this is done by connecting\nthe source table to the target table using the RTC.\nThis ensures that traffic that does not match any rule in the source table\nis forwarded to the target table.\nIssue: 3441251\n\nSigned-off-by: Itamar Gozlan <igozlan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 5 +-\n drivers/net/mlx5/hws/mlx5dr.h | 12 ++\n drivers/net/mlx5/hws/mlx5dr_cmd.c | 7 +-\n drivers/net/mlx5/hws/mlx5dr_cmd.h | 1 +\n drivers/net/mlx5/hws/mlx5dr_debug.c | 5 +-\n drivers/net/mlx5/hws/mlx5dr_matcher.c | 176 ++++++++++++---------\n drivers/net/mlx5/hws/mlx5dr_matcher.h | 5 +\n drivers/net/mlx5/hws/mlx5dr_table.c | 218 +++++++++++++++++++++++++-\n drivers/net/mlx5/hws/mlx5dr_table.h | 23 +++\n 9 files changed, 366 insertions(+), 86 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex 6df7ca20af..d46d4094b1 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -2085,7 +2085,10 @@ struct mlx5_ifc_flow_table_prop_layout_bits {\n \tu8 reparse[0x1];\n \tu8 reserved_at_6b[0x1];\n \tu8 cross_vhca_object[0x1];\n-\tu8 reserved_at_6d[0xb];\n+\tu8 reformat_l2_to_l3_audp_tunnel[0x1];\n+\tu8 reformat_l3_audp_tunnel_to_l2[0x1];\n+\tu8 ignore_flow_level_rtc_valid[0x1];\n+\tu8 reserved_at_70[0x8];\n \tu8 log_max_ft_num[0x8];\n \tu8 reserved_at_80[0x10];\n \tu8 log_max_flow_counter[0x8];\ndiff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h\nindex ec2230d136..54aa9fd6dd 100644\n--- a/drivers/net/mlx5/hws/mlx5dr.h\n+++ b/drivers/net/mlx5/hws/mlx5dr.h\n@@ -237,6 +237,18 @@ mlx5dr_table_create(struct mlx5dr_context *ctx,\n */\n int mlx5dr_table_destroy(struct mlx5dr_table *tbl);\n \n+/* Set default miss table for mlx5dr_table by using another mlx5dr_table\n+ * Traffic which all table matchers miss will be forwarded to miss table.\n+ *\n+ * @param[in] tbl\n+ *\tsource mlx5dr table\n+ * @param[in] miss_tbl\n+ *\ttarget (miss) mlx5dr table, or NULL to remove current miss table\n+ * @return zero on success non zero otherwise.\n+ */\n+int mlx5dr_table_set_default_miss(struct mlx5dr_table *tbl,\n+\t\t\t\t struct mlx5dr_table *miss_tbl);\n+\n /* Create new match template based on items mask, the match template\n * will be used for matcher creation.\n *\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c\nindex 98d4b3bd3b..63b47f4617 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c\n@@ -581,7 +581,6 @@ mlx5dr_cmd_header_modify_pattern_create(struct ibv_context *ctx,\n \t\trte_errno = ENOMEM;\n \t\treturn NULL;\n \t}\n-\n \tattr = MLX5_ADDR_OF(create_header_modify_pattern_in, in, hdr);\n \tMLX5_SET(general_obj_in_cmd_hdr,\n \t\t attr, opcode, MLX5_CMD_OP_CREATE_GENERAL_OBJECT);\n@@ -1032,6 +1031,12 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,\n \t\t\t\t\tcapability.flow_table_nic_cap.\n \t\t\t\t\tflow_table_properties_nic_receive.reparse);\n \n+\tcaps->nic_ft.ignore_flow_level_rtc_valid =\n+\t\tMLX5_GET(query_hca_cap_out,\n+\t\t\t out,\n+\t\t\t capability.flow_table_nic_cap.\n+\t\t\t flow_table_properties_nic_receive.ignore_flow_level_rtc_valid);\n+\n \t/* check cross-VHCA support in flow table properties */\n \tres =\n \tMLX5_GET(query_hca_cap_out, out,\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h\nindex e57013c309..8a495db9b3 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h\n@@ -158,6 +158,7 @@ struct mlx5dr_cmd_allow_other_vhca_access_attr {\n struct mlx5dr_cmd_query_ft_caps {\n \tuint8_t max_level;\n \tuint8_t reparse;\n+\tuint8_t ignore_flow_level_rtc_valid;\n };\n \n struct mlx5dr_cmd_query_vport_caps {\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c\nindex 48810142a0..89529944a3 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_debug.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_debug.c\n@@ -331,11 +331,12 @@ static int mlx5dr_debug_dump_table(FILE *f, struct mlx5dr_table *tbl)\n \t\t}\n \t}\n \n-\tret = fprintf(f, \",0x%\" PRIx64 \",0x%\" PRIx64 \",0x%\" PRIx64 \",0x%\" PRIx64 \"\\n\",\n+\tret = fprintf(f, \",0x%\" PRIx64 \",0x%\" PRIx64 \",0x%\" PRIx64 \",0x%\" PRIx64 \",0x%\" PRIx64 \"\\n\",\n \t\t mlx5dr_debug_icm_to_idx(icm_addr_0),\n \t\t mlx5dr_debug_icm_to_idx(icm_addr_1),\n \t\t mlx5dr_debug_icm_to_idx(local_icm_addr_0),\n-\t\t mlx5dr_debug_icm_to_idx(local_icm_addr_1));\n+\t\t mlx5dr_debug_icm_to_idx(local_icm_addr_1),\n+\t\t (uint64_t)(uintptr_t)tbl->default_miss.miss_tbl);\n \tif (ret < 0)\n \t\tgoto out_err;\n \ndiff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c b/drivers/net/mlx5/hws/mlx5dr_matcher.c\nindex 1fe7ec1bc3..b704f85fba 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_matcher.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c\n@@ -43,29 +43,21 @@ static void mlx5dr_matcher_destroy_end_ft(struct mlx5dr_matcher *matcher)\n \tmlx5dr_table_destroy_default_ft(matcher->tbl, matcher->end_ft);\n }\n \n-static int mlx5dr_matcher_free_rtc_pointing(struct mlx5dr_context *ctx,\n-\t\t\t\t\t uint32_t fw_ft_type,\n-\t\t\t\t\t enum mlx5dr_table_type type,\n-\t\t\t\t\t struct mlx5dr_devx_obj *devx_obj)\n+int mlx5dr_matcher_free_rtc_pointing(struct mlx5dr_context *ctx,\n+\t\t\t\t uint32_t fw_ft_type,\n+\t\t\t\t enum mlx5dr_table_type type,\n+\t\t\t\t struct mlx5dr_devx_obj *devx_obj)\n {\n-\tstruct mlx5dr_cmd_ft_modify_attr ft_attr = {0};\n \tint ret;\n \n \tif (type != MLX5DR_TABLE_TYPE_FDB && !mlx5dr_context_shared_gvmi_used(ctx))\n \t\treturn 0;\n \n-\tft_attr.modify_fs = MLX5_IFC_MODIFY_FLOW_TABLE_RTC_ID;\n-\tft_attr.type = fw_ft_type;\n-\tft_attr.rtc_id_0 = 0;\n-\tft_attr.rtc_id_1 = 0;\n-\n-\tret = mlx5dr_cmd_flow_table_modify(devx_obj, &ft_attr);\n-\tif (ret) {\n+\tret = mlx5dr_table_ft_set_next_rtc(devx_obj, fw_ft_type, NULL, NULL);\n+\tif (ret)\n \t\tDR_LOG(ERR, \"Failed to disconnect previous RTC\");\n-\t\treturn ret;\n-\t}\n \n-\treturn 0;\n+\treturn ret;\n }\n \n static int mlx5dr_matcher_shared_point_end_ft(struct mlx5dr_matcher *matcher)\n@@ -200,12 +192,10 @@ static int mlx5dr_matcher_shared_update_local_ft(struct mlx5dr_table *tbl)\n \n static int mlx5dr_matcher_connect(struct mlx5dr_matcher *matcher)\n {\n-\tstruct mlx5dr_cmd_ft_modify_attr ft_attr = {0};\n \tstruct mlx5dr_table *tbl = matcher->tbl;\n \tstruct mlx5dr_matcher *prev = NULL;\n \tstruct mlx5dr_matcher *next = NULL;\n \tstruct mlx5dr_matcher *tmp_matcher;\n-\tstruct mlx5dr_devx_obj *ft;\n \tint ret;\n \n \t/* Find location in matcher list */\n@@ -228,32 +218,30 @@ static int mlx5dr_matcher_connect(struct mlx5dr_matcher *matcher)\n \t\tLIST_INSERT_AFTER(prev, matcher, next);\n \n connect:\n-\tft_attr.modify_fs = MLX5_IFC_MODIFY_FLOW_TABLE_RTC_ID;\n-\tft_attr.type = tbl->fw_ft_type;\n-\n-\t/* Connect to next */\n \tif (next) {\n-\t\tif (next->match_ste.rtc_0)\n-\t\t\tft_attr.rtc_id_0 = next->match_ste.rtc_0->id;\n-\t\tif (next->match_ste.rtc_1)\n-\t\t\tft_attr.rtc_id_1 = next->match_ste.rtc_1->id;\n-\n-\t\tret = mlx5dr_cmd_flow_table_modify(matcher->end_ft, &ft_attr);\n+\t\t/* Connect to next RTC */\n+\t\tret = mlx5dr_table_ft_set_next_rtc(matcher->end_ft,\n+\t\t\t\t\t\t tbl->fw_ft_type,\n+\t\t\t\t\t\t next->match_ste.rtc_0,\n+\t\t\t\t\t\t next->match_ste.rtc_1);\n \t\tif (ret) {\n \t\t\tDR_LOG(ERR, \"Failed to connect new matcher to next RTC\");\n \t\t\tgoto remove_from_list;\n \t\t}\n+\t} else {\n+\t\t/* Connect last matcher to next miss_tbl if exists */\n+\t\tret = mlx5dr_table_connect_to_miss_table(tbl, tbl->default_miss.miss_tbl);\n+\t\tif (ret) {\n+\t\t\tDR_LOG(ERR, \"Failed connect new matcher to miss_tbl\");\n+\t\t\tgoto remove_from_list;\n+\t\t}\n \t}\n \n-\t/* Connect to previous */\n-\tft = prev ? prev->end_ft : tbl->ft;\n-\n-\tif (matcher->match_ste.rtc_0)\n-\t\tft_attr.rtc_id_0 = matcher->match_ste.rtc_0->id;\n-\tif (matcher->match_ste.rtc_1)\n-\t\tft_attr.rtc_id_1 = matcher->match_ste.rtc_1->id;\n-\n-\tret = mlx5dr_cmd_flow_table_modify(ft, &ft_attr);\n+\t/* Connect to previous FT */\n+\tret = mlx5dr_table_ft_set_next_rtc(prev ? prev->end_ft : tbl->ft,\n+\t\t\t\t\t tbl->fw_ft_type,\n+\t\t\t\t\t matcher->match_ste.rtc_0,\n+\t\t\t\t\t matcher->match_ste.rtc_1);\n \tif (ret) {\n \t\tDR_LOG(ERR, \"Failed to connect new matcher to previous FT\");\n \t\tgoto remove_from_list;\n@@ -265,6 +253,22 @@ static int mlx5dr_matcher_connect(struct mlx5dr_matcher *matcher)\n \t\tgoto remove_from_list;\n \t}\n \n+\tif (prev) {\n+\t\t/* Reset next miss FT to default (drop refcount) */\n+\t\tret = mlx5dr_table_ft_set_default_next_ft(tbl, prev->end_ft);\n+\t\tif (ret) {\n+\t\t\tDR_LOG(ERR, \"Failed to reset matcher ft default miss\");\n+\t\t\tgoto remove_from_list;\n+\t\t}\n+\t} else {\n+\t\t/* Update tables missing to current table */\n+\t\tret = mlx5dr_table_update_connected_miss_tables(tbl);\n+\t\tif (ret) {\n+\t\t\tDR_LOG(ERR, \"Fatal error, failed to update connected miss table\");\n+\t\t\tgoto remove_from_list;\n+\t\t}\n+\t}\n+\n \treturn 0;\n \n remove_from_list:\n@@ -272,81 +276,97 @@ static int mlx5dr_matcher_connect(struct mlx5dr_matcher *matcher)\n \treturn ret;\n }\n \n-static int mlx5dr_matcher_disconnect(struct mlx5dr_matcher *matcher)\n+static int mlx5dr_last_matcher_disconnect(struct mlx5dr_table *tbl,\n+\t\t\t\t\t struct mlx5dr_devx_obj *prev_ft)\n {\n \tstruct mlx5dr_cmd_ft_modify_attr ft_attr = {0};\n+\n+\tif (tbl->default_miss.miss_tbl) {\n+\t\t/* Connect new last matcher to next miss_tbl if exists */\n+\t\treturn mlx5dr_table_connect_to_miss_table(tbl,\n+\t\t\t\t\t\t\t tbl->default_miss.miss_tbl);\n+\t} else {\n+\t\tft_attr.modify_fs = MLX5_IFC_MODIFY_FLOW_TABLE_RTC_ID;\n+\t\tft_attr.type = tbl->fw_ft_type;\n+\t\t/* Matcher is last, point prev end FT to default miss */\n+\t\tmlx5dr_cmd_set_attr_connect_miss_tbl(tbl->ctx,\n+\t\t\t\t\t\t tbl->fw_ft_type,\n+\t\t\t\t\t\t tbl->type,\n+\t\t\t\t\t\t &ft_attr);\n+\t\treturn mlx5dr_cmd_flow_table_modify(prev_ft, &ft_attr);\n+\t}\n+}\n+\n+static int mlx5dr_matcher_disconnect(struct mlx5dr_matcher *matcher)\n+{\n+\tstruct mlx5dr_matcher *tmp_matcher, *prev_matcher;\n \tstruct mlx5dr_table *tbl = matcher->tbl;\n-\tstruct mlx5dr_matcher *tmp_matcher;\n \tstruct mlx5dr_devx_obj *prev_ft;\n \tstruct mlx5dr_matcher *next;\n \tint ret;\n \n-\tprev_ft = matcher->tbl->ft;\n+\tprev_ft = tbl->ft;\n+\tprev_matcher = LIST_FIRST(&tbl->head);\n \tLIST_FOREACH(tmp_matcher, &tbl->head, next) {\n \t\tif (tmp_matcher == matcher)\n \t\t\tbreak;\n \n \t\tprev_ft = tmp_matcher->end_ft;\n+\t\tprev_matcher = tmp_matcher;\n \t}\n \n \tnext = matcher->next.le_next;\n \n-\tft_attr.modify_fs = MLX5_IFC_MODIFY_FLOW_TABLE_RTC_ID;\n-\tft_attr.type = matcher->tbl->fw_ft_type;\n+\tLIST_REMOVE(matcher, next);\n \n \tif (next) {\n-\t\t/* Connect previous end FT to next RTC if exists */\n-\t\tif (next->match_ste.rtc_0)\n-\t\t\tft_attr.rtc_id_0 = next->match_ste.rtc_0->id;\n-\t\tif (next->match_ste.rtc_1)\n-\t\t\tft_attr.rtc_id_1 = next->match_ste.rtc_1->id;\n+\t\t/* Connect previous end FT to next RTC */\n+\t\tret = mlx5dr_table_ft_set_next_rtc(prev_ft,\n+\t\t\t\t\t\t tbl->fw_ft_type,\n+\t\t\t\t\t\t next->match_ste.rtc_0,\n+\t\t\t\t\t\t next->match_ste.rtc_1);\n+\t\tif (ret) {\n+\t\t\tDR_LOG(ERR, \"Failed to disconnect matcher\");\n+\t\t\tgoto matcher_reconnect;\n+\t\t}\n \t} else {\n-\t\t/* Matcher is last, point prev end FT to default miss */\n-\t\tmlx5dr_cmd_set_attr_connect_miss_tbl(tbl->ctx,\n-\t\t\t\t\t\t tbl->fw_ft_type,\n-\t\t\t\t\t\t tbl->type,\n-\t\t\t\t\t\t &ft_attr);\n-\t}\n-\n-\tret = mlx5dr_cmd_flow_table_modify(prev_ft, &ft_attr);\n-\tif (ret) {\n-\t\tDR_LOG(ERR, \"Failed to disconnect matcher\");\n-\t\treturn ret;\n-\t}\n-\n-\tLIST_REMOVE(matcher, next);\n-\n-\tif (!next) {\n-\t\t/* ft no longer points to any RTC, drop refcount */\n-\t\tret = mlx5dr_matcher_free_rtc_pointing(tbl->ctx,\n-\t\t\t\t\t\t tbl->fw_ft_type,\n-\t\t\t\t\t\t tbl->type,\n-\t\t\t\t\t\t prev_ft);\n+\t\tret = mlx5dr_last_matcher_disconnect(tbl, prev_ft);\n \t\tif (ret) {\n-\t\t\tDR_LOG(ERR, \"Failed to reset last RTC refcount\");\n-\t\t\treturn ret;\n+\t\t\tDR_LOG(ERR, \"Failed to disconnect last matcher\");\n+\t\t\tgoto matcher_reconnect;\n \t\t}\n \t}\n \n \tret = mlx5dr_matcher_shared_update_local_ft(tbl);\n \tif (ret) {\n \t\tDR_LOG(ERR, \"Failed to update local_ft in shared table\");\n-\t\treturn ret;\n+\t\tgoto matcher_reconnect;\n \t}\n \n-\tif (!next) {\n-\t\t/* ft no longer points to any RTC, drop refcount */\n-\t\tret = mlx5dr_matcher_free_rtc_pointing(tbl->ctx,\n-\t\t\t\t\t\t tbl->fw_ft_type,\n-\t\t\t\t\t\t tbl->type,\n-\t\t\t\t\t\t prev_ft);\n+\t/* Removing first matcher, update connected miss tables if exists */\n+\tif (prev_ft == tbl->ft) {\n+\t\tret = mlx5dr_table_update_connected_miss_tables(tbl);\n \t\tif (ret) {\n-\t\t\tDR_LOG(ERR, \"Failed to reset last RTC refcount\");\n-\t\t\treturn ret;\n+\t\t\tDR_LOG(ERR, \"Fatal error, failed to update connected miss table\");\n+\t\t\tgoto matcher_reconnect;\n \t\t}\n \t}\n \n+\tret = mlx5dr_table_ft_set_default_next_ft(tbl, prev_ft);\n+\tif (ret) {\n+\t\tDR_LOG(ERR, \"Fatal error, failed to restore matcher ft default miss\");\n+\t\tgoto matcher_reconnect;\n+\t}\n+\n \treturn 0;\n+\n+matcher_reconnect:\n+\tif (LIST_EMPTY(&tbl->head))\n+\t\tLIST_INSERT_HEAD(&matcher->tbl->head, matcher, next);\n+\telse\n+\t\tLIST_INSERT_AFTER(prev_matcher, matcher, next);\n+\n+\treturn ret;\n }\n \n static bool mlx5dr_matcher_supp_fw_wqe(struct mlx5dr_matcher *matcher)\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.h b/drivers/net/mlx5/hws/mlx5dr_matcher.h\nindex 4759068ab4..363a61fd41 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_matcher.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_matcher.h\n@@ -115,4 +115,9 @@ static inline bool mlx5dr_matcher_is_insert_by_idx(struct mlx5dr_matcher *matche\n \treturn matcher->attr.insert_mode == MLX5DR_MATCHER_INSERT_BY_INDEX;\n }\n \n+int mlx5dr_matcher_free_rtc_pointing(struct mlx5dr_context *ctx,\n+\t\t\t\t uint32_t fw_ft_type,\n+\t\t\t\t enum mlx5dr_table_type type,\n+\t\t\t\t struct mlx5dr_devx_obj *devx_obj);\n+\n #endif /* MLX5DR_MATCHER_H_ */\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_table.c b/drivers/net/mlx5/hws/mlx5dr_table.c\nindex f91f04d924..e1150cd75d 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_table.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_table.c\n@@ -90,7 +90,7 @@ mlx5dr_table_connect_to_default_miss_tbl(struct mlx5dr_table *tbl,\n \tret = mlx5dr_cmd_flow_table_modify(ft, &ft_attr);\n \tif (ret) {\n \t\tDR_LOG(ERR, \"Failed to connect FT to default FDB FT\");\n-\t\treturn errno;\n+\t\treturn ret;\n \t}\n \n \treturn 0;\n@@ -396,7 +396,7 @@ struct mlx5dr_table *mlx5dr_table_create(struct mlx5dr_context *ctx,\n \t\treturn NULL;\n \t}\n \n-\ttbl = simple_malloc(sizeof(*tbl));\n+\ttbl = simple_calloc(1, sizeof(*tbl));\n \tif (!tbl) {\n \t\trte_errno = ENOMEM;\n \t\treturn NULL;\n@@ -405,7 +405,6 @@ struct mlx5dr_table *mlx5dr_table_create(struct mlx5dr_context *ctx,\n \ttbl->ctx = ctx;\n \ttbl->type = attr->type;\n \ttbl->level = attr->level;\n-\tLIST_INIT(&tbl->head);\n \n \tret = mlx5dr_table_init(tbl);\n \tif (ret) {\n@@ -427,12 +426,223 @@ struct mlx5dr_table *mlx5dr_table_create(struct mlx5dr_context *ctx,\n int mlx5dr_table_destroy(struct mlx5dr_table *tbl)\n {\n \tstruct mlx5dr_context *ctx = tbl->ctx;\n-\n \tpthread_spin_lock(&ctx->ctrl_lock);\n+\tif (!LIST_EMPTY(&tbl->head)) {\n+\t\tDR_LOG(ERR, \"Cannot destroy table containing matchers\");\n+\t\trte_errno = EBUSY;\n+\t\tgoto unlock_err;\n+\t}\n+\n+\tif (!LIST_EMPTY(&tbl->default_miss.head)) {\n+\t\tDR_LOG(ERR, \"Cannot destroy table pointed by default miss\");\n+\t\trte_errno = EBUSY;\n+\t\tgoto unlock_err;\n+\t}\n+\n \tLIST_REMOVE(tbl, next);\n \tpthread_spin_unlock(&ctx->ctrl_lock);\n \tmlx5dr_table_uninit(tbl);\n \tsimple_free(tbl);\n \n \treturn 0;\n+\n+unlock_err:\n+\tpthread_spin_unlock(&ctx->ctrl_lock);\n+\treturn -rte_errno;\n+}\n+\n+static struct mlx5dr_devx_obj *\n+mlx5dr_table_get_last_ft(struct mlx5dr_table *tbl)\n+{\n+\tstruct mlx5dr_devx_obj *last_ft = tbl->ft;\n+\tstruct mlx5dr_matcher *matcher;\n+\n+\tLIST_FOREACH(matcher, &tbl->head, next)\n+\t\tlast_ft = matcher->end_ft;\n+\n+\treturn last_ft;\n+}\n+\n+int mlx5dr_table_ft_set_default_next_ft(struct mlx5dr_table *tbl,\n+\t\t\t\t\tstruct mlx5dr_devx_obj *ft_obj)\n+{\n+\tstruct mlx5dr_cmd_ft_modify_attr ft_attr = {0};\n+\tint ret;\n+\n+\t/* Due to FW limitation, resetting the flow table to default action will\n+\t * disconnect RTC when ignore_flow_level_rtc_valid is not supported.\n+\t */\n+\tif (!tbl->ctx->caps->nic_ft.ignore_flow_level_rtc_valid)\n+\t\treturn 0;\n+\n+\tif (tbl->type == MLX5DR_TABLE_TYPE_FDB)\n+\t\treturn mlx5dr_table_connect_to_default_miss_tbl(tbl, ft_obj);\n+\n+\tft_attr.type = tbl->fw_ft_type;\n+\tft_attr.modify_fs = MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION;\n+\tft_attr.table_miss_action = MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION_DEFAULT;\n+\n+\tret = mlx5dr_cmd_flow_table_modify(ft_obj, &ft_attr);\n+\tif (ret) {\n+\t\tDR_LOG(ERR, \"Failed to set FT default miss action\");\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int mlx5dr_table_ft_set_next_rtc(struct mlx5dr_devx_obj *ft,\n+\t\t\t\t uint32_t fw_ft_type,\n+\t\t\t\t struct mlx5dr_devx_obj *rtc_0,\n+\t\t\t\t struct mlx5dr_devx_obj *rtc_1)\n+{\n+\tstruct mlx5dr_cmd_ft_modify_attr ft_attr = {0};\n+\n+\tft_attr.modify_fs = MLX5_IFC_MODIFY_FLOW_TABLE_RTC_ID;\n+\tft_attr.type = fw_ft_type;\n+\tft_attr.rtc_id_0 = rtc_0 ? rtc_0->id : 0;\n+\tft_attr.rtc_id_1 = rtc_1 ? rtc_1->id : 0;\n+\n+\treturn mlx5dr_cmd_flow_table_modify(ft, &ft_attr);\n+}\n+\n+static int mlx5dr_table_ft_set_next_ft(struct mlx5dr_devx_obj *ft,\n+\t\t\t\t uint32_t fw_ft_type,\n+\t\t\t\t uint32_t next_ft_id)\n+{\n+\tstruct mlx5dr_cmd_ft_modify_attr ft_attr = {0};\n+\n+\tft_attr.modify_fs = MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION;\n+\tft_attr.table_miss_action = MLX5_IFC_MODIFY_FLOW_TABLE_MISS_ACTION_GOTO_TBL;\n+\tft_attr.type = fw_ft_type;\n+\tft_attr.table_miss_id = next_ft_id;\n+\n+\treturn mlx5dr_cmd_flow_table_modify(ft, &ft_attr);\n+}\n+\n+int mlx5dr_table_update_connected_miss_tables(struct mlx5dr_table *dst_tbl)\n+{\n+\tstruct mlx5dr_table *src_tbl;\n+\tint ret;\n+\n+\tif (LIST_EMPTY(&dst_tbl->default_miss.head))\n+\t\treturn 0;\n+\n+\tLIST_FOREACH(src_tbl, &dst_tbl->default_miss.head, default_miss.next) {\n+\t\tret = mlx5dr_table_connect_to_miss_table(src_tbl, dst_tbl);\n+\t\tif (ret) {\n+\t\t\tDR_LOG(ERR, \"Failed to update source miss table, unexpected behavior\");\n+\t\t\treturn ret;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int mlx5dr_table_connect_to_miss_table(struct mlx5dr_table *src_tbl,\n+\t\t\t\t struct mlx5dr_table *dst_tbl)\n+{\n+\tstruct mlx5dr_devx_obj *last_ft;\n+\tstruct mlx5dr_matcher *matcher;\n+\tint ret;\n+\n+\tlast_ft = mlx5dr_table_get_last_ft(src_tbl);\n+\n+\tif (dst_tbl) {\n+\t\tif (LIST_EMPTY(&dst_tbl->head)) {\n+\t\t\t/* Connect src_tbl last_ft to dst_tbl start anchor */\n+\t\t\tret = mlx5dr_table_ft_set_next_ft(last_ft,\n+\t\t\t\t\t\t\t src_tbl->fw_ft_type,\n+\t\t\t\t\t\t\t dst_tbl->ft->id);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\n+\t\t\t/* Reset last_ft RTC to default RTC */\n+\t\t\tret = mlx5dr_table_ft_set_next_rtc(last_ft,\n+\t\t\t\t\t\t\t src_tbl->fw_ft_type,\n+\t\t\t\t\t\t\t NULL, NULL);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t} else {\n+\t\t\t/* Connect src_tbl last_ft to first matcher RTC */\n+\t\t\tmatcher = LIST_FIRST(&dst_tbl->head);\n+\t\t\tret = mlx5dr_table_ft_set_next_rtc(last_ft,\n+\t\t\t\t\t\t\t src_tbl->fw_ft_type,\n+\t\t\t\t\t\t\t matcher->match_ste.rtc_0,\n+\t\t\t\t\t\t\t matcher->match_ste.rtc_1);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\n+\t\t\t/* Reset next miss FT to default */\n+\t\t\tret = mlx5dr_table_ft_set_default_next_ft(src_tbl, last_ft);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t}\n+\t} else {\n+\t\t/* Reset next miss FT to default */\n+\t\tret = mlx5dr_table_ft_set_default_next_ft(src_tbl, last_ft);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\n+\t\t/* Reset last_ft RTC to default RTC */\n+\t\tret = mlx5dr_table_ft_set_next_rtc(last_ft,\n+\t\t\t\t\t\t src_tbl->fw_ft_type,\n+\t\t\t\t\t\t NULL, NULL);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\tsrc_tbl->default_miss.miss_tbl = dst_tbl;\n+\n+\treturn 0;\n+}\n+\n+static int mlx5dr_table_set_default_miss_not_valid(struct mlx5dr_table *tbl,\n+\t\t\t\t\t\t struct mlx5dr_table *miss_tbl)\n+{\n+\tif (!tbl->ctx->caps->nic_ft.ignore_flow_level_rtc_valid ||\n+\t mlx5dr_context_shared_gvmi_used(tbl->ctx)) {\n+\t\tDR_LOG(ERR, \"Default miss table is not supported\");\n+\t\trte_errno = EOPNOTSUPP;\n+\t\treturn -rte_errno;\n+\t}\n+\n+\tif (mlx5dr_table_is_root(tbl) ||\n+\t (miss_tbl && mlx5dr_table_is_root(miss_tbl)) ||\n+\t (miss_tbl && miss_tbl->type != tbl->type) ||\n+\t (miss_tbl && tbl->default_miss.miss_tbl)) {\n+\t\tDR_LOG(ERR, \"Invalid arguments\");\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int mlx5dr_table_set_default_miss(struct mlx5dr_table *tbl,\n+\t\t\t\t struct mlx5dr_table *miss_tbl)\n+{\n+\tstruct mlx5dr_context *ctx = tbl->ctx;\n+\tint ret;\n+\n+\tret = mlx5dr_table_set_default_miss_not_valid(tbl, miss_tbl);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tpthread_spin_lock(&ctx->ctrl_lock);\n+\n+\tret = mlx5dr_table_connect_to_miss_table(tbl, miss_tbl);\n+\tif (ret)\n+\t\tgoto out;\n+\n+\tif (miss_tbl)\n+\t\tLIST_INSERT_HEAD(&miss_tbl->default_miss.head, tbl, default_miss.next);\n+\telse\n+\t\tLIST_REMOVE(tbl, default_miss.next);\n+\n+\tpthread_spin_unlock(&ctx->ctrl_lock);\n+\treturn 0;\n+out:\n+\tpthread_spin_unlock(&ctx->ctrl_lock);\n+\treturn -ret;\n }\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_table.h b/drivers/net/mlx5/hws/mlx5dr_table.h\nindex 362d8a9048..b2fbb47416 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_table.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_table.h\n@@ -7,6 +7,14 @@\n \n #define MLX5DR_ROOT_LEVEL 0\n \n+struct mlx5dr_default_miss {\n+\t/* My miss table */\n+\tstruct mlx5dr_table *miss_tbl;\n+\tLIST_ENTRY(mlx5dr_table) next;\n+\t/* Tables missing to my table */\n+\tLIST_HEAD(miss_table_head, mlx5dr_table) head;\n+};\n+\n struct mlx5dr_table {\n \tstruct mlx5dr_context *ctx;\n \tstruct mlx5dr_devx_obj *ft;\n@@ -16,6 +24,7 @@ struct mlx5dr_table {\n \tuint32_t level;\n \tLIST_HEAD(matcher_head, mlx5dr_matcher) head;\n \tLIST_ENTRY(mlx5dr_table) next;\n+\tstruct mlx5dr_default_miss default_miss;\n };\n \n static inline\n@@ -43,4 +52,18 @@ struct mlx5dr_devx_obj *mlx5dr_table_create_default_ft(struct ibv_context *ibv,\n \n void mlx5dr_table_destroy_default_ft(struct mlx5dr_table *tbl,\n \t\t\t\t struct mlx5dr_devx_obj *ft_obj);\n+\n+int mlx5dr_table_connect_to_miss_table(struct mlx5dr_table *src_tbl,\n+\t\t\t\t struct mlx5dr_table *dst_tbl);\n+\n+int mlx5dr_table_update_connected_miss_tables(struct mlx5dr_table *dst_tbl);\n+\n+int mlx5dr_table_ft_set_default_next_ft(struct mlx5dr_table *tbl,\n+\t\t\t\t\tstruct mlx5dr_devx_obj *ft_obj);\n+\n+int mlx5dr_table_ft_set_next_rtc(struct mlx5dr_devx_obj *ft,\n+\t\t\t\t uint32_t fw_ft_type,\n+\t\t\t\t struct mlx5dr_devx_obj *rtc_0,\n+\t\t\t\t struct mlx5dr_devx_obj *rtc_1);\n+\n #endif /* MLX5DR_TABLE_H_ */\n", "prefixes": [ "4/5" ] }