Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/131024/?format=api
{ "id": 131024, "url": "https://patches.dpdk.org/api/patches/131024/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230901032842.223547-16-wanry@3snic.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230901032842.223547-16-wanry@3snic.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230901032842.223547-16-wanry@3snic.com", "date": "2023-09-01T03:28:25", "name": "[v3,15/32] net/sssnic: support Tx queue setup and release", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "cd459cd109a8537476cf613aec7d90df65b13de0", "submitter": { "id": 3119, "url": "https://patches.dpdk.org/api/people/3119/?format=api", "name": "Renyong Wan", "email": "wanry@3snic.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230901032842.223547-16-wanry@3snic.com/mbox/", "series": [ { "id": 29399, "url": "https://patches.dpdk.org/api/series/29399/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=29399", "date": "2023-09-01T03:28:13", "name": "Introduce sssnic PMD for 3SNIC's 9x0 serials Ethernet adapters", "version": 3, "mbox": "https://patches.dpdk.org/series/29399/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/131024/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/131024/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CDA4A42219;\n\tFri, 1 Sep 2023 05:30:30 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6B7EF402E0;\n\tFri, 1 Sep 2023 05:29:35 +0200 (CEST)", "from VLXDG1SPAM1.ramaxel.com (email.ramaxel.com [221.4.138.186])\n by mails.dpdk.org (Postfix) with ESMTP id 77C59402E5\n for <dev@dpdk.org>; Fri, 1 Sep 2023 05:29:31 +0200 (CEST)", "from V12DG1MBS03.ramaxel.local ([172.26.18.33])\n by VLXDG1SPAM1.ramaxel.com with ESMTP id 3813Su0m033314;\n Fri, 1 Sep 2023 11:28:56 +0800 (GMT-8)\n (envelope-from wanry@3snic.com)", "from localhost.localdomain (10.64.136.151) by\n V12DG1MBS03.ramaxel.local (172.26.18.33) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id\n 15.1.2375.17; Fri, 1 Sep 2023 11:28:55 +0800" ], "From": "<wanry@3snic.com>", "To": "<dev@dpdk.org>", "CC": "<ferruh.yigit@amd.com>, Renyong Wan <wanry@3snic.com>, Steven Song\n <steven.song@3snic.com>", "Subject": "[PATCH v3 15/32] net/sssnic: support Tx queue setup and release", "Date": "Fri, 1 Sep 2023 11:28:25 +0800", "Message-ID": "<20230901032842.223547-16-wanry@3snic.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230901032842.223547-1-wanry@3snic.com>", "References": "<20230901032842.223547-1-wanry@3snic.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "7bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.64.136.151]", "X-ClientProxiedBy": "V12DG1MBS03.ramaxel.local (172.26.18.33) To\n V12DG1MBS03.ramaxel.local (172.26.18.33)", "X-DNSRBL": "", "X-SPAM-SOURCE-CHECK": "pass", "X-MAIL": "VLXDG1SPAM1.ramaxel.com 3813Su0m033314", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Renyong Wan <wanry@3snic.com>\n\nSigned-off-by: Steven Song <steven.song@3snic.com>\nSigned-off-by: Renyong Wan <wanry@3snic.com>\n---\nv2:\n* Removed error.h from including files.\n---\n drivers/net/sssnic/meson.build | 1 +\n drivers/net/sssnic/sssnic_ethdev.c | 4 +\n drivers/net/sssnic/sssnic_ethdev.h | 1 +\n drivers/net/sssnic/sssnic_ethdev_tx.c | 354 ++++++++++++++++++++++++++\n drivers/net/sssnic/sssnic_ethdev_tx.h | 27 ++\n 5 files changed, 387 insertions(+)\n create mode 100644 drivers/net/sssnic/sssnic_ethdev_tx.c\n create mode 100644 drivers/net/sssnic/sssnic_ethdev_tx.h", "diff": "diff --git a/drivers/net/sssnic/meson.build b/drivers/net/sssnic/meson.build\nindex 7c3516a279..0c6e21310d 100644\n--- a/drivers/net/sssnic/meson.build\n+++ b/drivers/net/sssnic/meson.build\n@@ -20,4 +20,5 @@ sources = files(\n 'sssnic_ethdev.c',\n 'sssnic_ethdev_link.c',\n 'sssnic_ethdev_rx.c',\n+ 'sssnic_ethdev_tx.c',\n )\ndiff --git a/drivers/net/sssnic/sssnic_ethdev.c b/drivers/net/sssnic/sssnic_ethdev.c\nindex f98510a55d..732fddfcf7 100644\n--- a/drivers/net/sssnic/sssnic_ethdev.c\n+++ b/drivers/net/sssnic/sssnic_ethdev.c\n@@ -11,6 +11,7 @@\n #include \"sssnic_ethdev.h\"\n #include \"sssnic_ethdev_link.h\"\n #include \"sssnic_ethdev_rx.h\"\n+#include \"sssnic_ethdev_tx.h\"\n \n static int\n sssnic_ethdev_infos_get(struct rte_eth_dev *ethdev,\n@@ -336,6 +337,7 @@ sssnic_ethdev_release(struct rte_eth_dev *ethdev)\n \tstruct sssnic_hw *hw = SSSNIC_ETHDEV_TO_HW(ethdev);\n \n \tsssnic_ethdev_link_intr_disable(ethdev);\n+\tsssnic_ethdev_tx_queue_all_release(ethdev);\n \tsssnic_ethdev_rx_queue_all_release(ethdev);\n \tsssnic_ethdev_mac_addrs_clean(ethdev);\n \tsssnic_hw_shutdown(hw);\n@@ -354,6 +356,8 @@ static const struct eth_dev_ops sssnic_ethdev_ops = {\n \t.set_mc_addr_list = sssnic_ethdev_set_mc_addr_list,\n \t.rx_queue_setup = sssnic_ethdev_rx_queue_setup,\n \t.rx_queue_release = sssnic_ethdev_rx_queue_release,\n+\t.tx_queue_setup = sssnic_ethdev_tx_queue_setup,\n+\t.tx_queue_release = sssnic_ethdev_tx_queue_release,\n };\n \n static int\ndiff --git a/drivers/net/sssnic/sssnic_ethdev.h b/drivers/net/sssnic/sssnic_ethdev.h\nindex 51740413c6..ab832d179f 100644\n--- a/drivers/net/sssnic/sssnic_ethdev.h\n+++ b/drivers/net/sssnic/sssnic_ethdev.h\n@@ -57,6 +57,7 @@\n #define SSSNIC_ETHDEV_MAX_NUM_MC_MAC 2048\n \n #define SSSNIC_ETHDEV_DEF_RX_FREE_THRESH 32\n+#define SSSNIC_ETHDEV_DEF_TX_FREE_THRESH 32\n \n struct sssnic_netdev {\n \tvoid *hw;\ndiff --git a/drivers/net/sssnic/sssnic_ethdev_tx.c b/drivers/net/sssnic/sssnic_ethdev_tx.c\nnew file mode 100644\nindex 0000000000..d77cbc8647\n--- /dev/null\n+++ b/drivers/net/sssnic/sssnic_ethdev_tx.c\n@@ -0,0 +1,354 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018-2022 Shenzhen 3SNIC Information Technology Co., Ltd.\n+ */\n+\n+#include <rte_common.h>\n+#include <rte_io.h>\n+#include <ethdev_pci.h>\n+\n+#include \"sssnic_log.h\"\n+#include \"sssnic_ethdev.h\"\n+#include \"sssnic_ethdev_tx.h\"\n+#include \"base/sssnic_hw.h\"\n+#include \"base/sssnic_workq.h\"\n+#include \"base/sssnic_api.h\"\n+#include \"base/sssnic_misc.h\"\n+\n+/* Hardware format of tx desc */\n+struct sssnic_ethdev_tx_desc {\n+\tunion {\n+\t\tuint32_t dw0;\n+\t\tstruct {\n+\t\t\t/* length of the first tx seg data */\n+\t\t\tuint32_t data_len : 18;\n+\t\t\tuint32_t dw0_resvd0 : 1;\n+\t\t\t/* number of tx segments in tx entry */\n+\t\t\tuint32_t num_segs : 8;\n+\t\t\t/* offload desc enable */\n+\t\t\tuint32_t offload_en : 1;\n+\t\t\t/* data format, use SGL if 0 else inline */\n+\t\t\tuint32_t data_fmt : 1;\n+\t\t\t/* DN, always set 0 */\n+\t\t\tuint32_t dw0_resvd1 : 1;\n+\t\t\t/* refer sssnic_ethdev_txq_entry_type */\n+\t\t\tuint32_t entry_type : 1;\n+\t\t\tuint32_t owner : 1;\n+\t\t};\n+\t};\n+\tunion {\n+\t\tuint32_t dw1;\n+\t\tstruct {\n+\t\t\tuint32_t pkt_type : 2;\n+\t\t\tuint32_t payload_off : 8;\n+\t\t\t/* UFO, not used, always set 0 */\n+\t\t\tuint32_t dw1_resvd0 : 1;\n+\t\t\tuint32_t tso_en : 1;\n+\t\t\t/* TCP/UDP checksum offload enable flag */\n+\t\t\tuint32_t csum_en : 1;\n+\t\t\tuint32_t mss : 14;\n+\t\t\tuint32_t sctp_crc_en : 1;\n+\t\t\t/* set 1 if entry type is not compact else set 0 */\n+\t\t\tuint32_t uc : 1;\n+\t\t\t/* PRI, not used, always set 0 */\n+\t\t\tuint32_t dw1_resvd1 : 3;\n+\t\t};\n+\t};\n+\tunion {\n+\t\tuint32_t dw2;\n+\t\t/* high 32bit of DMA address of the first tx seg data */\n+\t\tuint32_t data_addr_hi;\n+\t};\n+\tunion {\n+\t\tuint32_t dw3;\n+\t\t/* low 32bit of DMA address of the first tx seg data */\n+\t\tuint32_t data_addr_lo;\n+\t};\n+};\n+\n+/* Hardware format of tx offload */\n+struct sssnic_ethdev_tx_offload {\n+\tunion {\n+\t\tuint32_t dw0;\n+\t\tstruct {\n+\t\t\tuint32_t dw0_resvd0 : 19;\n+\t\t\t/* indicate a tunnel packet or normal packet */\n+\t\t\tuint32_t tunnel_flag : 1;\n+\t\t\tuint32_t dw0_resvd1 : 2;\n+\t\t\t/* not used, always set 0 */\n+\t\t\tuint32_t esp_next_proto : 2;\n+\t\t\t/* indicate inner L4 csum offload enable */\n+\t\t\tuint32_t inner_l4_csum_en : 1;\n+\t\t\t/* indicate inner L3 csum offload enable */\n+\t\t\tuint32_t inner_l3_csum_en : 1;\n+\t\t\t/* indicate inner L4 header with pseudo csum */\n+\t\t\tuint32_t inner_l4_pseudo_csum : 1;\n+\t\t\t/* indicate outer L4 csum offload enable*/\n+\t\t\tuint32_t l4_csum_en : 1;\n+\t\t\t/* indicate outer L3 csum offload enable*/\n+\t\t\tuint32_t l3_csum_en : 1;\n+\t\t\t/* indicate outer L4 header with pseudo csum */\n+\t\t\tuint32_t l4_pseudo_csum : 1;\n+\t\t\t/* indicate ESP offload */\n+\t\t\tuint32_t esp_en : 1;\n+\t\t\t/* indicate IPSEC offload */\n+\t\t\tuint32_t ipsec_en : 1;\n+\t\t};\n+\t};\n+\tuint32_t dw1;\n+\tuint32_t dw2;\n+\tunion {\n+\t\tuint32_t dw3;\n+\t\tstruct {\n+\t\t\tuint32_t vlan_tag : 16;\n+\t\t\t/* Always set 0 */\n+\t\t\tuint32_t vlan_type : 3;\n+\t\t\t/* indicate VLAN offload enable */\n+\t\t\tuint32_t vlan_en : 1;\n+\t\t\tuint32_t dw3_resvd0 : 12;\n+\t\t};\n+\t};\n+};\n+\n+/* Hardware format of tx tx seg */\n+struct sssnic_ethdev_tx_seg {\n+\tuint32_t len;\n+\tuint32_t resvd;\n+\tuint32_t buf_hi_addr;\n+\tuint32_t buf_lo_addr;\n+};\n+\n+/* hardware format of txq doobell register*/\n+struct sssnic_ethdev_txq_doorbell {\n+\tunion {\n+\t\tuint64_t u64;\n+\t\tstruct {\n+\t\t\tunion {\n+\t\t\t\tuint32_t dword0;\n+\t\t\t\tstruct {\n+\t\t\t\t\tuint32_t qid : 13;\n+\t\t\t\t\tuint32_t resvd0 : 9;\n+\t\t\t\t\tuint32_t nf : 1;\n+\t\t\t\t\tuint32_t cf : 1;\n+\t\t\t\t\tuint32_t cos : 3;\n+\t\t\t\t\tuint32_t service : 5;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t\tunion {\n+\t\t\t\tuint32_t dword1;\n+\t\t\t\tstruct {\n+\t\t\t\t\tuint32_t pi_hi : 8;\n+\t\t\t\t\tuint32_t resvd1 : 24;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+struct sssnic_ethdev_tx_entry {\n+\tstruct rte_mbuf *pktmbuf;\n+\tuint16_t num_workq_entries;\n+};\n+\n+struct sssnic_ethdev_txq {\n+\tstruct rte_eth_dev *ethdev;\n+\tstruct sssnic_workq *workq;\n+\tconst struct rte_memzone *ci_mz;\n+\tvolatile uint16_t *hw_ci_addr;\n+\tuint8_t *doorbell;\n+\tstruct sssnic_ethdev_tx_entry *txe;\n+\tstruct sssnic_ethdev_txq_stats stats;\n+\tuint16_t port;\n+\tuint16_t qid;\n+\tuint16_t depth;\n+\tuint16_t idx_mask;\n+\tuint16_t tx_free_thresh;\n+\tuint8_t owner;\n+\tuint8_t cos;\n+} __rte_cache_aligned;\n+\n+enum sssnic_ethdev_txq_entry_type {\n+\tSSSNIC_ETHDEV_TXQ_ENTRY_COMPACT = 0,\n+\tSSSNIC_ETHDEV_TXQ_ENTRY_EXTEND = 1,\n+};\n+\n+#define SSSNIC_ETHDEV_TXQ_ENTRY_SZ_BITS 4\n+#define SSSNIC_ETHDEV_TXQ_ENTRY_SZ (RTE_BIT32(SSSNIC_ETHDEV_TXQ_ENTRY_SZ_BITS))\n+\n+#define SSSNIC_ETHDEV_TX_HW_CI_SIZE 64\n+\n+/* Doorbell offset 4096 */\n+#define SSSNIC_ETHDEV_TXQ_DB_OFFSET 0x1000\n+\n+static inline uint16_t\n+sssnic_ethdev_txq_num_used_entries(struct sssnic_ethdev_txq *txq)\n+{\n+\treturn sssnic_workq_num_used_entries(txq->workq);\n+}\n+\n+static inline uint16_t\n+sssnic_ethdev_txq_ci_get(struct sssnic_ethdev_txq *txq)\n+{\n+\treturn sssnic_workq_ci_get(txq->workq);\n+}\n+\n+static inline void\n+sssnic_ethdev_txq_consume(struct sssnic_ethdev_txq *txq, uint16_t num_entries)\n+{\n+\tsssnic_workq_consume_fast(txq->workq, num_entries);\n+}\n+\n+int\n+sssnic_ethdev_tx_queue_setup(struct rte_eth_dev *ethdev, uint16_t tx_queue_id,\n+\tuint16_t nb_tx_desc, unsigned int socket_id,\n+\tconst struct rte_eth_txconf *tx_conf)\n+{\n+\tint ret;\n+\tstruct sssnic_hw *hw;\n+\tstruct sssnic_ethdev_txq *txq;\n+\tuint16_t q_depth;\n+\tuint16_t tx_free_thresh;\n+\tchar m_name[RTE_MEMZONE_NAMESIZE];\n+\n+\thw = SSSNIC_ETHDEV_TO_HW(ethdev);\n+\n+\tq_depth = nb_tx_desc;\n+\t/* Adjust q_depth to power of 2 */\n+\tif (!rte_is_power_of_2(nb_tx_desc)) {\n+\t\tq_depth = 1 << rte_log2_u32(nb_tx_desc);\n+\t\tPMD_DRV_LOG(NOTICE,\n+\t\t\t\"nb_tx_desc(%u) is not power of 2, adjust to %u\",\n+\t\t\tnb_tx_desc, q_depth);\n+\t}\n+\n+\tif (q_depth > SSSNIC_ETHDEV_MAX_NUM_Q_DESC) {\n+\t\tPMD_DRV_LOG(ERR, \"nb_tx_desc(%u) is out of range(max. %u)\",\n+\t\t\tq_depth, SSSNIC_ETHDEV_MAX_NUM_Q_DESC);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (tx_conf->tx_free_thresh > 0)\n+\t\ttx_free_thresh = tx_conf->tx_free_thresh;\n+\telse\n+\t\ttx_free_thresh = SSSNIC_ETHDEV_DEF_TX_FREE_THRESH;\n+\tif (tx_free_thresh >= q_depth - 1) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\"tx_free_thresh(%u) must be less than nb_tx_desc(%u)-1\",\n+\t\t\ttx_free_thresh, q_depth);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tsnprintf(m_name, sizeof(m_name), \"sssnic_p%u_sq%u\",\n+\t\tethdev->data->port_id, tx_queue_id);\n+\n+\ttxq = rte_zmalloc_socket(m_name, sizeof(struct sssnic_ethdev_txq),\n+\t\tRTE_CACHE_LINE_SIZE, (int)socket_id);\n+\n+\tif (txq == NULL) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\"Failed to allocate memory for sssnic port %u, txq %u\",\n+\t\t\tethdev->data->port_id, tx_queue_id);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\ttxq->ethdev = ethdev;\n+\ttxq->depth = q_depth;\n+\ttxq->port = ethdev->data->port_id;\n+\ttxq->qid = tx_queue_id;\n+\ttxq->tx_free_thresh = tx_free_thresh;\n+\ttxq->idx_mask = q_depth - 1;\n+\ttxq->owner = 1;\n+\ttxq->doorbell = hw->db_base_addr + SSSNIC_ETHDEV_TXQ_DB_OFFSET;\n+\n+\tsnprintf(m_name, sizeof(m_name), \"sssnic_p%u_sq%u_wq\",\n+\t\tethdev->data->port_id, tx_queue_id);\n+\n+\ttxq->workq = sssnic_workq_new(m_name, (int)socket_id,\n+\t\tSSSNIC_ETHDEV_TXQ_ENTRY_SZ, q_depth);\n+\tif (txq->workq == NULL) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\"Failed to create workq for sssnic port %u, txq %u\",\n+\t\t\tethdev->data->port_id, tx_queue_id);\n+\t\tret = -ENOMEM;\n+\t\tgoto new_workq_fail;\n+\t}\n+\n+\ttxq->ci_mz = rte_eth_dma_zone_reserve(ethdev, \"sssnic_txci_mz\",\n+\t\ttxq->qid, SSSNIC_ETHDEV_TX_HW_CI_SIZE,\n+\t\tSSSNIC_ETHDEV_TX_HW_CI_SIZE, (int)socket_id);\n+\tif (txq->ci_mz == NULL) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\"Failed to alloc DMA memory for tx ci of sssnic port %u rxq %u\",\n+\t\t\tethdev->data->port_id, tx_queue_id);\n+\t\tret = -ENOMEM;\n+\t\tgoto alloc_ci_mz_fail;\n+\t}\n+\ttxq->hw_ci_addr = (volatile uint16_t *)txq->ci_mz->addr;\n+\n+\tsnprintf(m_name, sizeof(m_name), \"sssnic_p%u_sq%u_txe\",\n+\t\tethdev->data->port_id, tx_queue_id);\n+\ttxq->txe = rte_zmalloc_socket(m_name,\n+\t\tsizeof(struct sssnic_ethdev_tx_entry) * q_depth,\n+\t\tRTE_CACHE_LINE_SIZE, (int)socket_id);\n+\tif (txq->txe == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to allocate memory for %s\", m_name);\n+\t\tret = -ENOMEM;\n+\t\tgoto alloc_txe_fail;\n+\t}\n+\n+\tethdev->data->tx_queues[tx_queue_id] = txq;\n+\n+\treturn 0;\n+\n+alloc_txe_fail:\n+\trte_memzone_free(txq->ci_mz);\n+alloc_ci_mz_fail:\n+\tsssnic_workq_destroy(txq->workq);\n+new_workq_fail:\n+\trte_free(txq);\n+\n+\treturn ret;\n+}\n+\n+static void\n+sssnic_ethdev_txq_pktmbufs_release(struct sssnic_ethdev_txq *txq)\n+{\n+\tstruct sssnic_ethdev_tx_entry *txe;\n+\tuint16_t num_entries;\n+\tuint16_t ci;\n+\tuint16_t i;\n+\n+\tnum_entries = sssnic_ethdev_txq_num_used_entries(txq);\n+\tfor (i = 0; i < num_entries; i++) {\n+\t\tci = sssnic_ethdev_txq_ci_get(txq);\n+\t\ttxe = &txq->txe[ci];\n+\t\trte_pktmbuf_free(txe->pktmbuf);\n+\t\ttxe->pktmbuf = NULL;\n+\t\tsssnic_ethdev_txq_consume(txq, txe->num_workq_entries);\n+\t\ttxe->num_workq_entries = 0;\n+\t}\n+}\n+\n+void\n+sssnic_ethdev_tx_queue_release(struct rte_eth_dev *ethdev, uint16_t queue_id)\n+{\n+\tstruct sssnic_ethdev_txq *txq = ethdev->data->tx_queues[queue_id];\n+\n+\tif (txq == NULL)\n+\t\treturn;\n+\n+\tsssnic_ethdev_txq_pktmbufs_release(txq);\n+\trte_free(txq->txe);\n+\trte_memzone_free(txq->ci_mz);\n+\tsssnic_workq_destroy(txq->workq);\n+\trte_free(txq);\n+\tethdev->data->tx_queues[queue_id] = NULL;\n+}\n+\n+void\n+sssnic_ethdev_tx_queue_all_release(struct rte_eth_dev *ethdev)\n+{\n+\tuint16_t qid;\n+\n+\tfor (qid = 0; qid < ethdev->data->nb_tx_queues; qid++)\n+\t\tsssnic_ethdev_tx_queue_release(ethdev, qid);\n+}\ndiff --git a/drivers/net/sssnic/sssnic_ethdev_tx.h b/drivers/net/sssnic/sssnic_ethdev_tx.h\nnew file mode 100644\nindex 0000000000..bd1d721e37\n--- /dev/null\n+++ b/drivers/net/sssnic/sssnic_ethdev_tx.h\n@@ -0,0 +1,27 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2018-2022 Shenzhen 3SNIC Information Technology Co., Ltd.\n+ */\n+\n+#ifndef _SSSNIC_ETHDEV_TX_H_\n+#define _SSSNIC_ETHDEV_TX_H_\n+\n+struct sssnic_ethdev_txq_stats {\n+\tuint64_t packets;\n+\tuint64_t bytes;\n+\tuint64_t nobuf;\n+\tuint64_t zero_len_segs;\n+\tuint64_t too_large_pkts;\n+\tuint64_t too_many_segs;\n+\tuint64_t null_segs;\n+\tuint64_t offload_errors;\n+\tuint64_t burst;\n+};\n+\n+int sssnic_ethdev_tx_queue_setup(struct rte_eth_dev *ethdev,\n+\tuint16_t tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id,\n+\tconst struct rte_eth_txconf *tx_conf);\n+void sssnic_ethdev_tx_queue_release(struct rte_eth_dev *ethdev,\n+\tuint16_t queue_id);\n+void sssnic_ethdev_tx_queue_all_release(struct rte_eth_dev *ethdev);\n+\n+#endif /* _SSSNIC_ETHDEV_TX_H_ */\n", "prefixes": [ "v3", "15/32" ] }