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GET /api/patches/1302/?format=api
{ "id": 1302, "url": "https://patches.dpdk.org/api/patches/1302/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1416199705-24150-4-git-send-email-chaozhu@linux.vnet.ibm.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1416199705-24150-4-git-send-email-chaozhu@linux.vnet.ibm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1416199705-24150-4-git-send-email-chaozhu@linux.vnet.ibm.com", "date": "2014-11-17T04:48:16", "name": "[dpdk-dev,v2,03/12] Add byte order operations for IBM Power architecture", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "97d39d73e42005fa38980868492155640565456f", "submitter": { "id": 114, "url": "https://patches.dpdk.org/api/people/114/?format=api", "name": "Chao Zhu", "email": "chaozhu@linux.vnet.ibm.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1416199705-24150-4-git-send-email-chaozhu@linux.vnet.ibm.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/1302/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/1302/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 1B8647FC1;\n\tSun, 16 Nov 2014 17:37:38 +0100 (CET)", "from e28smtp06.in.ibm.com (e28smtp06.in.ibm.com [122.248.162.6])\n\tby dpdk.org (Postfix) with ESMTP id 4EC447F95\n\tfor <dev@dpdk.org>; Sun, 16 Nov 2014 17:37:26 +0100 (CET)", "from /spool/local\n\tby e28smtp06.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <dev@dpdk.org> from <chaozhu@linux.vnet.ibm.com>;\n\tSun, 16 Nov 2014 22:17:37 +0530", "from d28dlp01.in.ibm.com (9.184.220.126)\n\tby e28smtp06.in.ibm.com (192.168.1.136) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tSun, 16 Nov 2014 22:17:34 +0530", "from d28relay05.in.ibm.com (d28relay05.in.ibm.com [9.184.220.62])\n\tby d28dlp01.in.ibm.com (Postfix) with ESMTP id D7ACBE003F\n\tfor <dev@dpdk.org>; Sun, 16 Nov 2014 22:17:47 +0530 (IST)", "from d28av01.in.ibm.com (d28av01.in.ibm.com [9.184.220.63])\n\tby d28relay05.in.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n\tsAGGm9va61538386 for <dev@dpdk.org>; Sun, 16 Nov 2014 22:18:09 +0530", "from d28av01.in.ibm.com (localhost [127.0.0.1])\n\tby d28av01.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id\n\tsAGGlYS4030192 for <dev@dpdk.org>; Sun, 16 Nov 2014 22:17:34 +0530", "from os_controller.crl.ibm.com ([9.186.57.97])\n\tby d28av01.in.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id\n\tsAGGlP34029091 for <dev@dpdk.org>; Sun, 16 Nov 2014 22:17:33 +0530" ], "From": "Chao Zhu <chaozhu@linux.vnet.ibm.com>", "To": "dev@dpdk.org", "Date": "Sun, 16 Nov 2014 23:48:16 -0500", "Message-Id": "<1416199705-24150-4-git-send-email-chaozhu@linux.vnet.ibm.com>", "X-Mailer": "git-send-email 1.7.1", "In-Reply-To": "<1416199705-24150-1-git-send-email-chaozhu@linux.vnet.ibm.com>", "References": "<1416199705-24150-1-git-send-email-chaozhu@linux.vnet.ibm.com>", "X-TM-AS-MML": "disable", "X-Content-Scanned": "Fidelis XPS MAILER", "x-cbid": "14111616-0021-0000-0000-0000023F01C9", "Subject": "[dpdk-dev] [PATCH v2 03/12] Add byte order operations for IBM Power\n\tarchitecture", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch adds architecture specific byte order operations for IBM Power\narchitecture. Power architecture support both big endian and little\nendian. This patch also adds a RTE_ARCH_BIG_ENDIAN micro.\n\nSigned-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>\n---\n config/defconfig_ppc_64-power8-linuxapp-gcc | 1 +\n .../common/include/arch/ppc_64/rte_byteorder.h | 150 ++++++++++++++++++++\n 2 files changed, 151 insertions(+), 0 deletions(-)\n create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h", "diff": "diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc\nindex 97d72ff..b10f60c 100644\n--- a/config/defconfig_ppc_64-power8-linuxapp-gcc\n+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc\n@@ -34,6 +34,7 @@ CONFIG_RTE_MACHINE=\"power8\"\n \n CONFIG_RTE_ARCH=\"ppc_64\"\n CONFIG_RTE_ARCH_PPC_64=y\n+CONFIG_RTE_ARCH_BIG_ENDIAN=y\n \n CONFIG_RTE_TOOLCHAIN=\"gcc\"\n CONFIG_RTE_TOOLCHAIN_GCC=y\ndiff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h b/lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h\nnew file mode 100644\nindex 0000000..a593e8a\n--- /dev/null\n+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_byteorder.h\n@@ -0,0 +1,150 @@\n+/*\n+ * BSD LICENSE\n+ *\n+ * Copyright (C) IBM Corporation 2014.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of IBM Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+*/\n+\n+/* Inspired from FreeBSD src/sys/powerpc/include/endian.h\n+ * Copyright (c) 1987, 1991, 1993\n+ * The Regents of the University of California. All rights reserved.\n+*/\n+\n+#ifndef _RTE_BYTEORDER_PPC_64_H_\n+#define _RTE_BYTEORDER_PPC_64_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include \"generic/rte_byteorder.h\"\n+\n+/*\n+ * An architecture-optimized byte swap for a 16-bit value.\n+ *\n+ * Do not use this function directly. The preferred function is rte_bswap16().\n+ */\n+static inline uint16_t rte_arch_bswap16(uint16_t _x)\n+{\n+\treturn ((_x >> 8) | ((_x << 8) & 0xff00));\n+}\n+\n+/*\n+ * An architecture-optimized byte swap for a 32-bit value.\n+ *\n+ * Do not use this function directly. The preferred function is rte_bswap32().\n+ */\n+static inline uint32_t rte_arch_bswap32(uint32_t _x)\n+{\n+\treturn ((_x >> 24) | ((_x >> 8) & 0xff00) | ((_x << 8) & 0xff0000) |\n+\t\t((_x << 24) & 0xff000000));\n+}\n+\n+/*\n+ * An architecture-optimized byte swap for a 64-bit value.\n+ *\n+ * Do not use this function directly. The preferred function is rte_bswap64().\n+ */\n+/* 64-bit mode */\n+static inline uint64_t rte_arch_bswap64(uint64_t _x)\n+{\n+\treturn ((_x >> 56) | ((_x >> 40) & 0xff00) | ((_x >> 24) & 0xff0000) |\n+\t\t((_x >> 8) & 0xff000000) | ((_x << 8) & (0xffULL << 32)) |\n+\t\t((_x << 24) & (0xffULL << 40)) |\n+\t\t((_x << 40) & (0xffULL << 48)) | ((_x << 56)));\n+}\n+\n+#ifndef RTE_FORCE_INTRINSICS\n+#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ?\t\t\\\n+\t\t\t\t rte_constant_bswap16(x) :\t\t\\\n+\t\t\t\t rte_arch_bswap16(x)))\n+\n+#define rte_bswap32(x) ((uint32_t)(__builtin_constant_p(x) ?\t\t\\\n+\t\t\t\t rte_constant_bswap32(x) :\t\t\\\n+\t\t\t\t rte_arch_bswap32(x)))\n+\n+#define rte_bswap64(x) ((uint64_t)(__builtin_constant_p(x) ?\t\t\\\n+\t\t\t\t rte_constant_bswap64(x) :\t\t\\\n+\t\t\t\t rte_arch_bswap64(x)))\n+#else\n+/*\n+ * __builtin_bswap16 is only available gcc 4.8 and upwards\n+ */\n+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)\n+#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ?\t\t\\\n+\t\t\t\t rte_constant_bswap16(x) :\t\t\\\n+\t\t\t\t rte_arch_bswap16(x)))\n+#endif\n+#endif\n+\n+/* Power 8 have both little endian and big endian mode \n+ * Power 7 only support big endian\n+ */\n+#ifndef RTE_ARCH_BIG_ENDIAN\n+\n+#define rte_cpu_to_le_16(x) (x)\n+#define rte_cpu_to_le_32(x) (x)\n+#define rte_cpu_to_le_64(x) (x)\n+\n+#define rte_cpu_to_be_16(x) rte_bswap16(x)\n+#define rte_cpu_to_be_32(x) rte_bswap32(x)\n+#define rte_cpu_to_be_64(x) rte_bswap64(x)\n+\n+#define rte_le_to_cpu_16(x) (x)\n+#define rte_le_to_cpu_32(x) (x)\n+#define rte_le_to_cpu_64(x) (x)\n+\n+#define rte_be_to_cpu_16(x) rte_bswap16(x)\n+#define rte_be_to_cpu_32(x) rte_bswap32(x)\n+#define rte_be_to_cpu_64(x) rte_bswap64(x)\n+\n+#else\n+\n+#define rte_cpu_to_le_16(x) rte_bswap16(x)\n+#define rte_cpu_to_le_32(x) rte_bswap32(x)\n+#define rte_cpu_to_le_64(x) rte_bswap64(x)\n+\n+#define rte_cpu_to_be_16(x) (x)\n+#define rte_cpu_to_be_32(x) (x)\n+#define rte_cpu_to_be_64(x) (x)\n+\n+#define rte_le_to_cpu_16(x) rte_bswap16(x)\n+#define rte_le_to_cpu_32(x) rte_bswap32(x)\n+#define rte_le_to_cpu_64(x) rte_bswap64(x)\n+\n+#define rte_be_to_cpu_16(x) (x)\n+#define rte_be_to_cpu_32(x) (x)\n+#define rte_be_to_cpu_64(x) (x)\n+#endif\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_BYTEORDER_PPC_64_H_ */\n+\n", "prefixes": [ "dpdk-dev", "v2", "03/12" ] }