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GET /api/patches/128879/?format=api
{ "id": 128879, "url": "https://patches.dpdk.org/api/patches/128879/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/SI2PR06MB45071DB57245256009CB9021CB5DA@SI2PR06MB4507.apcprd06.prod.outlook.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<SI2PR06MB45071DB57245256009CB9021CB5DA@SI2PR06MB4507.apcprd06.prod.outlook.com>", "list_archive_url": "https://inbox.dpdk.org/dev/SI2PR06MB45071DB57245256009CB9021CB5DA@SI2PR06MB4507.apcprd06.prod.outlook.com", "date": "2023-06-21T07:30:37", "name": "net/mlx5: support bus socket with no hugepages", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "d574ecda525268b4baae08444e708e1fa38b1ae4", "submitter": { "id": 3116, "url": "https://patches.dpdk.org/api/people/3116/?format=api", "name": "Hari Sasank", "email": "harisasank@outlook.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/SI2PR06MB45071DB57245256009CB9021CB5DA@SI2PR06MB4507.apcprd06.prod.outlook.com/mbox/", "series": [ { "id": 28596, "url": "https://patches.dpdk.org/api/series/28596/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=28596", "date": "2023-06-21T07:30:37", "name": "net/mlx5: support bus socket with no hugepages", "version": 1, "mbox": "https://patches.dpdk.org/series/28596/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/128879/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/128879/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4C4F642D10;\n\tWed, 21 Jun 2023 09:31:16 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3E1CA406BC;\n\tWed, 21 Jun 2023 09:31:16 +0200 (CEST)", "from APC01-SG2-obe.outbound.protection.outlook.com\n (mail-sgaapc01olkn2100.outbound.protection.outlook.com [40.92.53.100])\n by mails.dpdk.org (Postfix) with ESMTP id 5BD1A4068E\n for <dev@dpdk.org>; Wed, 21 Jun 2023 09:31:14 +0200 (CEST)", "from SI2PR06MB4507.apcprd06.prod.outlook.com (2603:1096:4:158::13)\n by TYZPR06MB5906.apcprd06.prod.outlook.com (2603:1096:400:333::15) with\n Microsoft SMTP Server (version=TLS1_2,\n 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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=Z8ZIw5pyerKYREHnoYz+skOsZkjNpPQuEO2X7WMRjf4=;\n b=Djra7p8Pu3HbTlzKV8jHvh40iEd4encDSNLdJ/HS2nDs4/RLifjiTljI6h0wevgYrZY0JFrymd43UufV0JocOqyvQ7m76hvnSAwIUjvFQJCTBhTW0aAYMhIZC7LajUZ15Qrhdg88LrnJdZ/kU5gWB/fI38a1Wie3enteXPKpdqi1Zkvi4+ZG6KnD6Qa1CgekG7G5svl7DuPHfWygRQjFfbSt7puWJwr/LEZdvC+UPmEwJpkHdISd2G/lJht+nYZKWotmmECf4GDghqgXQDszFMSH/mQC4b35cRRXqJ0Y4hRC3XjYp/VGYRHjgnJqHtH0W165vTw0jcztOPm2CBVwrw==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=none; dmarc=none;\n dkim=none; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=outlook.com;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=Z8ZIw5pyerKYREHnoYz+skOsZkjNpPQuEO2X7WMRjf4=;\n b=WiT0N/F8ZT10GwNIaWis9wpas4hHQqkrexvGmsWNP6y0p6Z0sk+6+XYoSY2hTgFPKK8WxuVB6vOYcqgCFM+xGI7bcJPJLgnjVo10bOCcHfxG1g+gn6edkbaMpkjujalTYZwMmO5I2RtRIVev6tpvXGAgcOiU0NhMA8faq+EcbfGiGz/hv7DoL0xjXFr30WxqnV4WQdZ/fol21yGEuBoFArWhBIRa/nvk+TcaPeReNlqFvRnQy/xERq8WNMSp5etLrw24oGoeELFN6upMlpDAjiy2nmuW/Vq1fHNwNwXhP8QcUQRehzyd61WLRsys1hehW81z2EgxMp7/jYiEjd8ScA==", "From": "Hari Sasank <harisasank@outlook.com>", "To": "Matan Azrad <matan@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>,\n Suanming Mou <suanmingm@nvidia.com>", "Cc": "dev@dpdk.org,\n\tHari Sasank <harisasank@outlook.com>", "Subject": "[PATCH] net/mlx5: support bus socket with no hugepages", "Date": "Wed, 21 Jun 2023 09:30:37 +0200", "Message-ID": "\n <SI2PR06MB45071DB57245256009CB9021CB5DA@SI2PR06MB4507.apcprd06.prod.outlook.com>", "X-Mailer": "git-send-email 2.34.1", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-TMN": 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JaQdj4AXWukxjMMFEC7dxLfBqJHqcUpi48DNfJ/fOZgWDYvg5iOCAEgUOMVYtBoti+My6QCRHowy2wnmS4jDTX3jwtjWDzhLU/Y6/rWz/EkPev7x8qe9aOeZs7Fkkl55RMK4EZopX+OsG0ggB1sZHlVKtxVPAwQ5HZHjFxA1h3/tVHB77RbUgYitNBtzDDpMEXOX25ziEkk3aJc3NFiJXaBOmfqc/gNMDWETny4VZWF4DLl+Cj08WS5nGyUrVSGTJbbJyAek7iwh9K2YDynqnS1fb4cos0A8M5WYb/XsadLsXQ9CcSkCjNQ5uqObYew0DUW+AMfMDjm/1c3GNr0hKWSWhFHDnjPyW81jk3g1nsK3360Gkx2TP7Syng3MB0YxKX9a322kuRGIhp0FzwqOVZNVVRL39R+XKHt1xV4aTgTC59XB1cpfgoAQ+ZVUZFXUX1QbbW6x2FWYVX/xZerwesr1q/EHxT7Fo9hAgWnZlDPbVcX0lrPNv5uKw5qZD1tcRyPwxFazEmHIOkkJwl8omfacX9XrGZv7GrMK76odr3YuggA21DvuCFqA2y+dq5Xp99zEQHADBlk0IHIRofzMZHQVWgxgZaoo6AUCke9L5ObXeQ6+jcuqhIiNx3/9+wKNHYtWOGoNL/WGyQA7Kq/lqfgSGy8ciN6VW5YffJ/mQnxpfW8Q9jQHqywsSRsvFBFcrzp0+CjUwHoHdIol4pTmwzib0LdvnFqzpAIKOo4YkhfO4n8EcRPw9MrCo9Ve2liR+Gk10F7lUi1dXx9fwroTqGF3SnSUiibbl065u+9ZAlj0114OfkDq7iSMyM20W63Ea3P3T8LJlh3c4R6fCIVpEWOu5gqvqww3kCS/9mAlQnNgl0ByICKn8Di5OtL8F8A/XouyOxP4wN69rT9f3bJRpb22tGHuTLWIWSC8z8pqX3uN5ojMd9H/BQ0dQ6oY+ziwSIergwWqonvwmkvjwIJRWTYzjsHoXmOqe3jhlO6DYQudy2TMgyDVsM4q7YKSCtaUETPNjeT63Cy2RVG5g35UlDQacGwyQyYXmDLiw+tZ/tyXMg25ycT630y6f6Qel4Q8LPZCBwY4ZX1rA0XUpg9FLuQ0L2nMYPQvHPp4SLiICZ/8QitxkQG9T95VrbSSP4AI+S0fGxSaxbplRyjp9fAtrwRG0VPRdOkrNPN0UutNc3hdJ95h9zbdzrWadycU3JklP4frQiiwSM4ZvWxGOudAqMp0Hoo3g+8dJHtxOWJNh9BuBoBljRx1Jkv03YmaZVd+qbgCStd8bc/VJcG4ZpkbpomYTbVxB1esB2weSSIF8qY=", "X-OriginatorOrg": "outlook.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n a6539774-6339-4b4c-f414-08db72297c34", "X-MS-Exchange-CrossTenant-AuthSource": "SI2PR06MB4507.apcprd06.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "21 Jun 2023 07:31:11.1279 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa", "X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg": "\n 00000000-0000-0000-0000-000000000000", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "TYZPR06MB5906", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "When a Mellanox NIC is attached to a bus on a numa\nsocket, it tries to allocate rte memory in that socket.\nIf hugepages are not configured/available on that rte socket\nmlx5_common_pci_probe fails with ENOMEM.\n\nIn this patch, a memflag MLX5_MEM_FALLBACK_ANY_SOCKET is\nintroduced which when set on mlx5_malloc, will allocate\nthe memory using SOCKET_ID_ANY if it is not able to allocate\nmemory on the specified socket. This allocates memory on\nany socket starting with the current thread's socket.\n\nSigned-off-by: Hari Sasank <harisasank@outlook.com>\n---\n drivers/common/mlx5/mlx5_common_devx.c | 9 ++++++---\n drivers/common/mlx5/mlx5_common_mr.c | 5 +++--\n drivers/common/mlx5/mlx5_malloc.c | 7 +++++++\n drivers/common/mlx5/mlx5_malloc.h | 4 ++++\n drivers/net/mlx5/mlx5.c | 3 ++-\n drivers/net/mlx5/mlx5_devx.c | 3 ++-\n drivers/net/mlx5/mlx5_rxq.c | 3 ++-\n drivers/net/mlx5/mlx5_trigger.c | 6 ++++--\n drivers/net/mlx5/mlx5_txpp.c | 3 ++-\n drivers/net/mlx5/mlx5_txq.c | 3 ++-\n 10 files changed, 34 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common_devx.c b/drivers/common/mlx5/mlx5_common_devx.c\nindex 431d8361cebd..122f1c65eab6 100644\n--- a/drivers/common/mlx5/mlx5_common_devx.c\n+++ b/drivers/common/mlx5/mlx5_common_devx.c\n@@ -107,7 +107,8 @@ mlx5_devx_cq_create(void *ctx, struct mlx5_devx_cq *cq_obj, uint16_t log_desc_n,\n \tumem_size = sizeof(struct mlx5_cqe) * num_of_cqes;\n \tumem_dbrec = RTE_ALIGN(umem_size, MLX5_DBR_SIZE);\n \tumem_size += MLX5_DBR_SIZE;\n-\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, umem_size,\n+\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET, umem_size,\n \t\t\t alignment, socket);\n \tif (!umem_buf) {\n \t\tDRV_LOG(ERR, \"Failed to allocate memory for CQ.\");\n@@ -225,7 +226,8 @@ mlx5_devx_sq_create(void *ctx, struct mlx5_devx_sq *sq_obj, uint16_t log_wqbb_n,\n \tumem_size = MLX5_WQE_SIZE * num_of_wqbbs;\n \tumem_dbrec = RTE_ALIGN(umem_size, MLX5_DBR_SIZE);\n \tumem_size += MLX5_DBR_SIZE;\n-\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, umem_size,\n+\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET, umem_size,\n \t\t\t alignment, socket);\n \tif (!umem_buf) {\n \t\tDRV_LOG(ERR, \"Failed to allocate memory for SQ.\");\n@@ -476,7 +478,8 @@ mlx5_devx_wq_init(void *ctx, uint32_t wqe_size, uint16_t log_wqbb_n, int socket,\n \tumem_size = wqe_size * (1 << log_wqbb_n);\n \tumem_dbrec = RTE_ALIGN(umem_size, MLX5_DBR_SIZE);\n \tumem_size += MLX5_DBR_SIZE;\n-\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, umem_size,\n+\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET, umem_size,\n \t\t\t alignment, socket);\n \tif (!umem_buf) {\n \t\tDRV_LOG(ERR, \"Failed to allocate memory for RQ.\");\ndiff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c\nindex 7b14b0c7bf1e..b2ad6a249732 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.c\n+++ b/drivers/common/mlx5/mlx5_common_mr.c\n@@ -223,7 +223,8 @@ mlx5_mr_btree_init(struct mlx5_mr_btree *bt, int n, int socket)\n \t}\n \tMLX5_ASSERT(!bt->table && !bt->size);\n \tmemset(bt, 0, sizeof(*bt));\n-\tbt->table = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,\n+\tbt->table = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t\tMLX5_MEM_FALLBACK_ANY_SOCKET,\n \t\t\t\tsizeof(struct mr_cache_entry) * n,\n \t\t\t\t0, socket);\n \tif (bt->table == NULL) {\n@@ -767,7 +768,7 @@ mlx5_mr_create_primary(void *pd,\n \t (void *)addr, data.start, data.end, msl->page_sz, ms_n);\n \t/* Size of memory for bitmap. */\n \tbmp_size = rte_bitmap_get_memory_footprint(ms_n);\n-\tmr = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,\n+\tmr = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO | MLX5_MEM_FALLBACK_ANY_SOCKET,\n \t\t\t RTE_ALIGN_CEIL(sizeof(*mr), RTE_CACHE_LINE_SIZE) +\n \t\t\t bmp_size, RTE_CACHE_LINE_SIZE, msl->socket_id);\n \tif (mr == NULL) {\ndiff --git a/drivers/common/mlx5/mlx5_malloc.c b/drivers/common/mlx5/mlx5_malloc.c\nindex c58c41da9266..e109f1bfa994 100644\n--- a/drivers/common/mlx5/mlx5_malloc.c\n+++ b/drivers/common/mlx5/mlx5_malloc.c\n@@ -182,6 +182,13 @@ mlx5_malloc(uint32_t flags, size_t size, unsigned int align, int socket)\n \t\t\taddr = rte_zmalloc_socket(NULL, size, align, socket);\n \t\telse\n \t\t\taddr = rte_malloc_socket(NULL, size, align, socket);\n+\t\tif (!addr && socket != SOCKET_ID_ANY &&\n+\t\t (flags & MLX5_MEM_FALLBACK_ANY_SOCKET)) {\n+\t\t\tif (flags & MLX5_MEM_ZERO)\n+\t\t\t\taddr = rte_zmalloc_socket(NULL, size, align, SOCKET_ID_ANY);\n+\t\t\telse\n+\t\t\t\taddr = rte_malloc_socket(NULL, size, align, SOCKET_ID_ANY);\n+\t\t}\n \t\tmlx5_mem_update_msl(addr);\n #ifdef RTE_LIBRTE_MLX5_DEBUG\n \t\tif (addr)\ndiff --git a/drivers/common/mlx5/mlx5_malloc.h b/drivers/common/mlx5/mlx5_malloc.h\nindex 9086a4f3f22e..cd57f95a629e 100644\n--- a/drivers/common/mlx5/mlx5_malloc.h\n+++ b/drivers/common/mlx5/mlx5_malloc.h\n@@ -28,6 +28,10 @@ enum mlx5_mem_flags {\n \t/* Memory should be allocated from rte hugepage. */\n \tMLX5_MEM_ZERO = 1 << 2,\n \t/* Memory should be cleared to zero. */\n+\tMLX5_MEM_FALLBACK_ANY_SOCKET = 1 << 3,\n+\t/* Memory can be allocated on any socket if\n+\t * it fails to allocate on the given socket.\n+\t */\n };\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex f9aea1318736..5b520d468299 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -2063,7 +2063,8 @@ mlx5_proc_priv_init(struct rte_eth_dev *dev)\n \t */\n \tppriv_size = sizeof(struct mlx5_proc_priv) +\n \t\t priv->txqs_n * sizeof(struct mlx5_uar_data);\n-\tppriv = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, ppriv_size,\n+\tppriv = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET, ppriv_size,\n \t\t\t RTE_CACHE_LINE_SIZE, dev->device->numa_node);\n \tif (!ppriv) {\n \t\trte_errno = ENOMEM;\ndiff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c\nindex 4369d2557e9e..47a925e5913a 100644\n--- a/drivers/net/mlx5/mlx5_devx.c\n+++ b/drivers/net/mlx5/mlx5_devx.c\n@@ -1285,7 +1285,8 @@ mlx5_txq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)\n \t\t\tRTE_BIT32(host_mem_attr.wq_attr.log_hairpin_num_packets);\n \t\tumem_dbrec = RTE_ALIGN(umem_size, MLX5_DBR_SIZE);\n \t\tumem_size += MLX5_DBR_SIZE;\n-\t\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, umem_size,\n+\t\tumem_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET, umem_size,\n \t\t\t\t alignment, priv->sh->numa_node);\n \t\tif (umem_buf == NULL && txq_ctrl->hairpin_conf.force_memory) {\n \t\t\tDRV_LOG(ERR, \"Failed to allocate memory for hairpin TX queue\");\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex ad8fd13cbe8e..6bdf1678e499 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -1728,7 +1728,8 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \t\tdesc >>= mprq_log_actual_stride_num;\n \t\talloc_size += desc * sizeof(struct mlx5_mprq_buf *);\n \t}\n-\ttmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, alloc_size, 0, socket);\n+\ttmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET, alloc_size, 0, socket);\n \tif (!tmpl) {\n \t\trte_errno = ENOMEM;\n \t\treturn NULL;\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex bbaa7d2aa021..1a6abdf2b61d 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -55,7 +55,8 @@ mlx5_txq_start(struct rte_eth_dev *dev)\n \tfor (i = 0; i != priv->txqs_n; ++i) {\n \t\tstruct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);\n \t\tstruct mlx5_txq_data *txq_data = &txq_ctrl->txq;\n-\t\tuint32_t flags = MLX5_MEM_RTE | MLX5_MEM_ZERO;\n+\t\tuint32_t flags = MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET;\n \n \t\tif (!txq_ctrl)\n \t\t\tcontinue;\n@@ -180,7 +181,8 @@ mlx5_rxq_ctrl_prepare(struct rte_eth_dev *dev, struct mlx5_rxq_ctrl *rxq_ctrl,\n \t\t\treturn ret;\n \t}\n \tMLX5_ASSERT(!rxq_ctrl->obj);\n-\trxq_ctrl->obj = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,\n+\trxq_ctrl->obj = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET,\n \t\t\t\t sizeof(*rxq_ctrl->obj), 0,\n \t\t\t\t rxq_ctrl->socket);\n \tif (!rxq_ctrl->obj) {\ndiff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c\nindex 5a5df2d1bb16..c81ae7bfd328 100644\n--- a/drivers/net/mlx5/mlx5_txpp.c\n+++ b/drivers/net/mlx5/mlx5_txpp.c\n@@ -394,7 +394,8 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh)\n \tstruct mlx5_txpp_wq *wq = &sh->txpp.clock_queue;\n \tint ret;\n \n-\tsh->txpp.tsa = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,\n+\tsh->txpp.tsa = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET,\n \t\t\t\t MLX5_TXPP_REARM_SQ_SIZE *\n \t\t\t\t sizeof(struct mlx5_txpp_ts),\n \t\t\t\t 0, sh->numa_node);\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex 8cb52b0f7d8e..b83e798544d2 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -1074,7 +1074,8 @@ mlx5_txq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_txq_ctrl *tmpl;\n \n-\ttmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(*tmpl) +\n+\ttmpl = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO |\n+\t\t\t MLX5_MEM_FALLBACK_ANY_SOCKET, sizeof(*tmpl) +\n \t\t\t desc * sizeof(struct rte_mbuf *), 0, socket);\n \tif (!tmpl) {\n \t\trte_errno = ENOMEM;\n", "prefixes": [] }