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GET /api/patches/128288/?format=api
{ "id": 128288, "url": "https://patches.dpdk.org/api/patches/128288/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230607114306.4156-1-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230607114306.4156-1-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230607114306.4156-1-syalavarthi@marvell.com", "date": "2023-06-07T11:43:06", "name": "[v1] ml/cnxk: enable support for scratch relocation", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ac29b3f2b797d7bc8a1e116c512bcb3f966441ed", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230607114306.4156-1-syalavarthi@marvell.com/mbox/", "series": [ { "id": 28389, "url": "https://patches.dpdk.org/api/series/28389/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=28389", "date": "2023-06-07T11:43:06", "name": "[v1] ml/cnxk: enable support for scratch relocation", "version": 1, "mbox": "https://patches.dpdk.org/series/28389/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/128288/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/128288/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CB16942C4D;\n\tWed, 7 Jun 2023 13:43:12 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5B89B40A84;\n\tWed, 7 Jun 2023 13:43:12 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 99EBA40698\n for <dev@dpdk.org>; Wed, 7 Jun 2023 13:43:11 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 357BJ4pO031514 for <dev@dpdk.org>; Wed, 7 Jun 2023 04:43:11 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3r2a75afw2-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 07 Jun 2023 04:43:10 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Wed, 7 Jun 2023 04:43:08 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Wed, 7 Jun 2023 04:43:08 -0700", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 7DFBD3F7045;\n Wed, 7 Jun 2023 04:43:08 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-type; s=pfpt0220;\n bh=j4nTHeWsI9YsjE7ZR3eSYP8wMTnSuGtiv26LZLCK7Ck=;\n b=a8x2AEKl8pEU7D6kImBf9VTRHJPJiTTWmkruD9u3lMu+eeVF8sTohFEF/AdHH8CiNDtW\n SR9ByrfKmKv4vMitylikcr1aE3tc4t42uLFZYUiaO3OmCLUSwzwFeljYKPSBDhSCmlVa\n 34b+8oLus2DkFlLHnVLBcatymx9OLggcIw3/yvZAxicPYTa8Y5i9oeVKEjAZkuV4Kd31\n llejmjtPT/kK1ABpHp8Isymx8XHltl5FVv0bud8KbfqpGmBBAxHNNhvQTzq/G8OjpqLx\n Q2n2amrLXp8qVSXfwKacokMZdM4+vgb6B4G93pLyLHY9iB+oefxwR5tBATeEPnNccr7l aQ==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <aprabhu@marvell.com>,\n <ptakkar@marvell.com>", "Subject": "[PATCH v1] ml/cnxk: enable support for scratch relocation", "Date": "Wed, 7 Jun 2023 04:43:06 -0700", "Message-ID": "<20230607114306.4156-1-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "T4Q3KolH9kwYS63gFgbBtbA_GiRvaX1p", "X-Proofpoint-GUID": "T4Q3KolH9kwYS63gFgbBtbA_GiRvaX1p", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26\n definitions=2023-06-07_06,2023-06-07_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Enabled support for relocation of scratch memory. Added\nsupport for extended arguments in load job descriptor to\nhandle scratch range start, end and base address.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\nDepends-on: patch-126427 (\"[v1,3/3] ml/cnxk: add support for 32 I/O per model\")\n\n drivers/ml/cnxk/cn10k_ml_dev.h | 21 +++++++++++++++++++--\n drivers/ml/cnxk/cn10k_ml_model.h | 3 +++\n drivers/ml/cnxk/cn10k_ml_ops.c | 22 ++++++++++++++++++----\n drivers/ml/cnxk/cn10k_ml_ops.h | 3 +++\n 4 files changed, 43 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_dev.h b/drivers/ml/cnxk/cn10k_ml_dev.h\nindex 5a8c8206b2..6ca0b0bb6e 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.h\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.h\n@@ -38,6 +38,7 @@\n \n /* ML slow-path job flags */\n #define ML_CN10K_SP_FLAGS_OCM_NONRELOCATABLE BIT(0)\n+#define ML_CN10K_SP_FLAGS_EXTENDED_LOAD_JD BIT(1)\n \n /* Poll mode job state */\n #define ML_CN10K_POLL_JOB_START\t 0\n@@ -233,6 +234,22 @@ struct cn10k_ml_jd_header {\n \tuint64_t *result;\n };\n \n+/* Extra arguments for job descriptor */\n+union cn10k_ml_jd_extended_args {\n+\tstruct cn10k_ml_jd_extended_args_section_start {\n+\t\t/** DDR Scratch base address */\n+\t\tuint64_t ddr_scratch_base_address;\n+\n+\t\t/** DDR Scratch range start */\n+\t\tuint64_t ddr_scratch_range_start;\n+\n+\t\t/** DDR Scratch range end */\n+\t\tuint64_t ddr_scratch_range_end;\n+\n+\t\tuint8_t rsvd[104];\n+\t} start;\n+};\n+\n /* Job descriptor structure */\n struct cn10k_ml_jd {\n \t/* Job descriptor header (32 bytes) */\n@@ -256,8 +273,8 @@ struct cn10k_ml_jd {\n \t\t} fw_load;\n \n \t\tstruct cn10k_ml_jd_section_model_start {\n-\t\t\t/* Source model start address in DDR relative to ML_MLR_BASE */\n-\t\t\tuint64_t model_src_ddr_addr;\n+\t\t\t/* Extended arguments */\n+\t\t\tuint64_t extended_args;\n \n \t\t\t/* Destination model start address in DDR relative to ML_MLR_BASE */\n \t\t\tuint64_t model_dst_ddr_addr;\ndiff --git a/drivers/ml/cnxk/cn10k_ml_model.h b/drivers/ml/cnxk/cn10k_ml_model.h\nindex fd3e235221..1f689363fc 100644\n--- a/drivers/ml/cnxk/cn10k_ml_model.h\n+++ b/drivers/ml/cnxk/cn10k_ml_model.h\n@@ -398,6 +398,9 @@ struct cn10k_ml_model_addr {\n \t/* Weights and bias load address */\n \tvoid *wb_load_addr;\n \n+\t/* Scratch base address */\n+\tvoid *scratch_base_addr;\n+\n \t/* Start tile */\n \tuint8_t tile_start;\n \ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex c9d78ef571..656467d891 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -416,8 +416,10 @@ cn10k_ml_prep_sp_job_descriptor(struct cn10k_ml_dev *mldev, struct cn10k_ml_mode\n \t\t\treq->jd.hdr.sp_flags = ML_CN10K_SP_FLAGS_OCM_NONRELOCATABLE;\n \t\telse\n \t\t\treq->jd.hdr.sp_flags = 0x0;\n-\t\treq->jd.model_start.model_src_ddr_addr =\n-\t\t\tPLT_U64_CAST(roc_ml_addr_ap2mlip(&mldev->roc, addr->init_load_addr));\n+\n+\t\treq->jd.hdr.sp_flags |= ML_CN10K_SP_FLAGS_EXTENDED_LOAD_JD;\n+\t\treq->jd.model_start.extended_args =\n+\t\t\tPLT_U64_CAST(roc_ml_addr_ap2mlip(&mldev->roc, &req->extended_args));\n \t\treq->jd.model_start.model_dst_ddr_addr =\n \t\t\tPLT_U64_CAST(roc_ml_addr_ap2mlip(&mldev->roc, addr->init_run_addr));\n \t\treq->jd.model_start.model_init_offset = 0x0;\n@@ -448,6 +450,13 @@ cn10k_ml_prep_sp_job_descriptor(struct cn10k_ml_dev *mldev, struct cn10k_ml_mode\n \t\treq->jd.model_start.output.s.ddr_range_start =\n \t\t\tmetadata->model.ddr_output_range_start;\n \t\treq->jd.model_start.output.s.ddr_range_end = metadata->model.ddr_output_range_end;\n+\n+\t\treq->extended_args.start.ddr_scratch_base_address = PLT_U64_CAST(\n+\t\t\troc_ml_addr_ap2mlip(&mldev->roc, model->addr.scratch_base_addr));\n+\t\treq->extended_args.start.ddr_scratch_range_start =\n+\t\t\tmetadata->model.ddr_scratch_range_start;\n+\t\treq->extended_args.start.ddr_scratch_range_end =\n+\t\t\tmetadata->model.ddr_scratch_range_end;\n \t}\n }\n \n@@ -1616,6 +1625,7 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \n \tchar str[RTE_MEMZONE_NAMESIZE];\n \tconst struct plt_memzone *mz;\n+\tsize_t model_scratch_size;\n \tsize_t model_stats_size;\n \tsize_t model_data_size;\n \tsize_t model_info_size;\n@@ -1657,6 +1667,9 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \tmetadata = (struct cn10k_ml_model_metadata *)params->addr;\n \tmodel_data_size = metadata->init_model.file_size + metadata->main_model.file_size +\n \t\t\t metadata->finish_model.file_size + metadata->weights_bias.file_size;\n+\tmodel_scratch_size = PLT_ALIGN_CEIL(metadata->model.ddr_scratch_range_end -\n+\t\t\t\t\t\t metadata->model.ddr_scratch_range_start + 1,\n+\t\t\t\t\t ML_CN10K_ALIGN_SIZE);\n \tmodel_data_size = PLT_ALIGN_CEIL(model_data_size, ML_CN10K_ALIGN_SIZE);\n \tmodel_info_size = sizeof(struct rte_ml_model_info) +\n \t\t\t metadata->model.num_input * sizeof(struct rte_ml_io_info) +\n@@ -1665,7 +1678,7 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \tmodel_stats_size = (dev->data->nb_queue_pairs + 1) * sizeof(struct cn10k_ml_model_stats);\n \n \tmz_size = PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_model), ML_CN10K_ALIGN_SIZE) +\n-\t\t 2 * model_data_size + model_info_size +\n+\t\t 2 * model_data_size + model_scratch_size + model_info_size +\n \t\t PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_req), ML_CN10K_ALIGN_SIZE) +\n \t\t model_stats_size;\n \n@@ -1694,6 +1707,7 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \tbase_dma_addr = PLT_PTR_ADD(\n \t\tmz->addr, PLT_ALIGN_CEIL(sizeof(struct cn10k_ml_model), ML_CN10K_ALIGN_SIZE));\n \tcn10k_ml_model_addr_update(model, params->addr, base_dma_addr);\n+\tmodel->addr.scratch_base_addr = PLT_PTR_ADD(base_dma_addr, 2 * model_data_size);\n \n \t/* Copy data from load to run. run address to be used by MLIP */\n \trte_memcpy(model->addr.base_dma_addr_run, model->addr.base_dma_addr_load, model_data_size);\n@@ -1707,7 +1721,7 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \tmodel->model_mem_map.scratch_pages = scratch_pages;\n \n \t/* Set model info */\n-\tmodel->info = PLT_PTR_ADD(base_dma_addr, 2 * model_data_size);\n+\tmodel->info = PLT_PTR_ADD(model->addr.scratch_base_addr, model_scratch_size);\n \tcn10k_ml_model_info_set(dev, model);\n \n \t/* Set slow-path request address and state */\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.h b/drivers/ml/cnxk/cn10k_ml_ops.h\nindex 58c992720a..d64a9f27e6 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.h\n@@ -17,6 +17,9 @@ struct cn10k_ml_req {\n \t/* Job descriptor */\n \tstruct cn10k_ml_jd jd;\n \n+\t/* Job descriptor extra arguments */\n+\tunion cn10k_ml_jd_extended_args extended_args;\n+\n \t/* Job result */\n \tstruct cn10k_ml_result result;\n \n", "prefixes": [ "v1" ] }