Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/127512/?format=api
https://patches.dpdk.org/api/patches/127512/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230525232331.34645-4-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230525232331.34645-4-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230525232331.34645-4-nicolas.chautru@intel.com", "date": "2023-05-25T23:23:30", "name": "[v1,3/4] bbdev: add new capability for FEC 5G UL processing", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e4b12427539b18e73301c5cdfd5e54d8f47738b2", "submitter": { "id": 1314, "url": "https://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 2642, "url": "https://patches.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230525232331.34645-4-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 28192, "url": "https://patches.dpdk.org/api/series/28192/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=28192", "date": "2023-05-25T23:23:27", "name": "bbdev: API extension for 23.11", "version": 1, "mbox": "https://patches.dpdk.org/series/28192/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/127512/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/127512/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A2CCC42BA1;\n\tFri, 26 May 2023 01:29:23 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BA16442D38;\n\tFri, 26 May 2023 01:29:04 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id 3C02E42BD9\n for <dev@dpdk.org>; Fri, 26 May 2023 01:28:59 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 25 May 2023 16:28:47 -0700", "from spr-npg-bds1-eec2.sn.intel.com (HELO spr-npg-bds1-eec2..)\n ([10.233.181.123])\n by orsmga003.jf.intel.com with ESMTP; 25 May 2023 16:28:42 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1685057340; x=1716593340;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=jI8mV/s+Kvg2t+9n/4A4M5LROdM7BCoqr+9a6C2fDJ0=;\n b=epcrI3sG+fvPH5W8XOlyPDx+UCdhntymqMsdMZaJMGSlryFzHMMWJBdy\n ZGW8jDxnBn++C75TtyUgg+oo2F/xW5R4qDI3SyQ1NSutrZZhhHJCW6DJO\n QITqGNgJSpyH8h1z7rXn9LqXqL04/iSHDDZhEhx/2h+6TfeAmfs8Rv4C2\n clrlUUFfYDBiL3/1UysrTcjO/FoE3WKjLtIVwm2L+EP5Y0PdOWfCwzRp6\n 22YxVe3Pqq5O4wBoq2fguSnylAnvrqcgYC7+2dgITgaUIlUSBHirvaT8P\n KzbxRZrO9khyxeitExDFBPJpv3cvZnAtUEMl7NDSfZEhdeCVoXcRtNORY A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10721\"; a=\"338653654\"", "E=Sophos;i=\"6.00,192,1681196400\"; d=\"scan'208\";a=\"338653654\"", "E=McAfee;i=\"6600,9927,10721\"; a=\"655428636\"", "E=Sophos;i=\"6.00,192,1681196400\"; d=\"scan'208\";a=\"655428636\"" ], "X-ExtLoop1": "1", "From": "Nicolas Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\tmaxime.coquelin@redhat.com", "Cc": "trix@redhat.com, hemant.agrawal@nxp.com, david.marchand@redhat.com,\n hernan.vargas@intel.com, Nicolas Chautru <nicolas.chautru@intel.com>", "Subject": "[PATCH v1 3/4] bbdev: add new capability for FEC 5G UL processing", "Date": "Thu, 25 May 2023 23:23:30 +0000", "Message-Id": "<20230525232331.34645-4-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20230525232331.34645-1-nicolas.chautru@intel.com>", "References": "<20230525232331.34645-1-nicolas.chautru@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Extending existing LDPC UL operation for new capability.\nOption to compress HARQ memory to 4 bits per LLR.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n doc/guides/prog_guide/bbdev.rst | 6 ++++++\n lib/bbdev/rte_bbdev_op.h | 4 +++-\n 2 files changed, 9 insertions(+), 1 deletion(-)", "diff": "diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst\nindex d5c7522f79..8dd7b866ad 100644\n--- a/doc/guides/prog_guide/bbdev.rst\n+++ b/doc/guides/prog_guide/bbdev.rst\n@@ -903,6 +903,12 @@ given below.\n |RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK |\n | Set if a device supports loopback access to HARQ internal memory |\n +--------------------------------------------------------------------+\n+|RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS |\n+| Set if a device includes LLR filler bits in HARQ circular buffer |\n++--------------------------------------------------------------------+\n+|RTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION |\n+|Set if a device supports input/output 4 bits HARQ compression |\n++--------------------------------------------------------------------+\n \n The structure passed for each LDPC decode operation is given below,\n with the operation flags forming a bitmask in the ``op_flags`` field.\ndiff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h\nindex 682e265327..a4a2ae1440 100644\n--- a/lib/bbdev/rte_bbdev_op.h\n+++ b/lib/bbdev/rte_bbdev_op.h\n@@ -203,7 +203,9 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks {\n \t * for HARQ memory. If not set, it is assumed the filler bits are not\n \t * in HARQ memory and handled directly by the LDPC decoder.\n \t */\n-\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19)\n+\tRTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 19),\n+\t/** Set if a device supports input/output HARQ 4bits compression. */\n+\tRTE_BBDEV_LDPC_HARQ_4BIT_COMPRESSION = (1ULL << 20)\n };\n \n /** Flags for LDPC encoder operation and capability structure */\n", "prefixes": [ "v1", "3/4" ] }{ "id": 127512, "url": "