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GET /api/patches/127399/?format=api
{ "id": 127399, "url": "https://patches.dpdk.org/api/patches/127399/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230525100821.12148-4-nipun.gupta@amd.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230525100821.12148-4-nipun.gupta@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230525100821.12148-4-nipun.gupta@amd.com", "date": "2023-05-25T10:08:19", "name": "[v5,3/5] eal/interrupts: add IRQ count in interrupt handle", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a414b180d26b9c7c722623f6b9cfb3586f274d93", "submitter": { "id": 2928, "url": "https://patches.dpdk.org/api/people/2928/?format=api", "name": "Gupta, Nipun", "email": "nipun.gupta@amd.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230525100821.12148-4-nipun.gupta@amd.com/mbox/", "series": [ { "id": 28179, "url": "https://patches.dpdk.org/api/series/28179/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=28179", "date": "2023-05-25T10:08:16", "name": "Support AMD CDX bus", "version": 5, "mbox": "https://patches.dpdk.org/series/28179/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/127399/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/127399/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3C68142B9A;\n\tThu, 25 May 2023 12:09:06 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3EB3142D49;\n\tThu, 25 May 2023 12:08:50 +0200 (CEST)", "from NAM12-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam12on2058.outbound.protection.outlook.com [40.107.244.58])\n by mails.dpdk.org (Postfix) with ESMTP id 88EB642D4A\n for <dev@dpdk.org>; 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helo=SATLEXMB04.amd.com; pr=C", "From": "Nipun Gupta <nipun.gupta@amd.com>", "To": "<dev@dpdk.org>, <thomas@monjalon.net>, <david.marchand@redhat.com>,\n <hkalra@marvell.com>, <anatoly.burakov@intel.com>,\n <stephen@networkplumber.org>", "CC": "<ferruh.yigit@amd.com>, <harpreet.anand@amd.com>,\n <nikhil.agarwal@amd.com>, Nipun Gupta <nipun.gupta@amd.com>", "Subject": "[PATCH v5 3/5] eal/interrupts: add IRQ count in interrupt handle", "Date": "Thu, 25 May 2023 15:38:19 +0530", "Message-ID": "<20230525100821.12148-4-nipun.gupta@amd.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20230525100821.12148-1-nipun.gupta@amd.com>", "References": "<20230124140746.594066-1-nipun.gupta@amd.com>\n <20230525100821.12148-1-nipun.gupta@amd.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN8NAM11FT097:EE_|BL3PR12MB6570:EE_", "X-MS-Office365-Filtering-Correlation-Id": "f7c478be-bcf7-4a52-69e4-08db5d0806f6", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n i2yJ9rEKNT4anUCE3UPeGorOZ9S7uaC42Br0FHIWtXjt15F60zCLyBVAQ5oxpgsphms4LAsnVemj1zZRKly8bzVFu7pwMGTELp4PLXbav8N1+paMPVPsjR5Yb/ovZtR+YfvlDckJxX2lHUL5EkV9TAUz+8IoQcxR6GRRMM0N0hbPq9Ne71ucktylWOEqyRx77ZOs76pbtv5rDPpIlCplTpcr+rnAsVA6gjSy0Up5YVzgIrnTl+pAvDQX6UajiwoMD578BZJUOQYXp3hkd5GIhvPRgDSWEnm2JL7HdFOrxJc3ESB6bVhy6bJwzxzaDTq146S7Os0ErDoNo08zUSRW9gfC1NbY8Yzcz+Z8kRhKB8Ra+DsGxebuC4uHUqUU4Yo96P0K8uUI89fVZtbhszQp2/PKaQfWdZIL3JLWb2ffeRjdAce5EEB/c5XbeRjIInH8v8WDwtPzH0S+PoqeSDJvjr0d56uxuJfOxCn7pPr+T0VvpfMSR6UJffIsk0fICG/ZVOqhRCsgE/L0UCBt1Bym8Tod/H/dmNqNIEuqozR+rdcZGCtt5XkAhvcYbkzDMkbeqSjX66UaxaoEmCkJW3oHqxKuuD7alTkmBPxx0738fYwRLTNeU3LhLMHsxqkF3Dvj4+ysuXlYtRm0tUAEPWTvsDRzYO3w09wDbm+hDGiu2hSsK8M5Ze09e8Fbbo4Ph579pnNkSieoxU2QAgtaMoEVdGt3LXLSzJzmNEbMl9vpaVq2LunTZtJQnQIhynj5Z31i+RL3iU1fbcbIbWZtTfVMjw==", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230028)(4636009)(376002)(346002)(396003)(39860400002)(136003)(451199021)(46966006)(40470700004)(36840700001)(82740400003)(40460700003)(26005)(356005)(81166007)(186003)(1076003)(44832011)(2616005)(36860700001)(36756003)(47076005)(83380400001)(2906002)(426003)(336012)(40480700001)(41300700001)(110136005)(316002)(54906003)(6666004)(82310400005)(70586007)(478600001)(70206006)(4326008)(86362001)(8936002)(5660300002)(8676002)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "25 May 2023 10:08:45.9897 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n f7c478be-bcf7-4a52-69e4-08db5d0806f6", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT097.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BL3PR12MB6570", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Have total number of IRQ count support in interrupt handle.\nIn case of VFIO this IRQ count is returned when\nVFIO_DEVICE_GET_IRQ_INFO ioctl is invoked. This IRQ_count can\nused by the devices to store/provide total number of interrupts\navailable and to enable or disable these interrupts.\n\nSigned-off-by: Nipun Gupta <nipun.gupta@amd.com>\nAcked-by: Ferruh Yigit <ferruh.yigit@amd.com>\n---\n lib/eal/common/eal_common_interrupts.c | 21 +++++++++++++++++\n lib/eal/common/eal_interrupts.h | 1 +\n lib/eal/include/rte_interrupts.h | 32 ++++++++++++++++++++++++++\n lib/eal/version.map | 2 ++\n 4 files changed, 56 insertions(+)", "diff": "diff --git a/lib/eal/common/eal_common_interrupts.c b/lib/eal/common/eal_common_interrupts.c\nindex 97b64fed58..a0167d9ad4 100644\n--- a/lib/eal/common/eal_common_interrupts.c\n+++ b/lib/eal/common/eal_common_interrupts.c\n@@ -398,6 +398,27 @@ int rte_intr_elist_index_set(struct rte_intr_handle *intr_handle,\n \treturn -rte_errno;\n }\n \n+int rte_intr_irq_count_set(struct rte_intr_handle *intr_handle,\n+\tint irq_count)\n+{\n+\tCHECK_VALID_INTR_HANDLE(intr_handle);\n+\n+\tintr_handle->irq_count = irq_count;\n+\n+\treturn 0;\n+fail:\n+\treturn -rte_errno;\n+}\n+\n+int rte_intr_irq_count_get(const struct rte_intr_handle *intr_handle)\n+{\n+\tCHECK_VALID_INTR_HANDLE(intr_handle);\n+\n+\treturn intr_handle->irq_count;\n+fail:\n+\treturn -rte_errno;\n+}\n+\n int rte_intr_vec_list_alloc(struct rte_intr_handle *intr_handle,\n \tconst char *name, int size)\n {\ndiff --git a/lib/eal/common/eal_interrupts.h b/lib/eal/common/eal_interrupts.h\nindex 482781b862..eaf8e20187 100644\n--- a/lib/eal/common/eal_interrupts.h\n+++ b/lib/eal/common/eal_interrupts.h\n@@ -16,6 +16,7 @@ struct rte_intr_handle {\n \t};\n \tuint32_t alloc_flags;\t/**< flags passed at allocation */\n \tenum rte_intr_handle_type type; /**< handle type */\n+\tuint32_t irq_count;\t\t/**< Total IRQ count */\n \tuint32_t max_intr; /**< max interrupt requested */\n \tuint32_t nb_efd; /**< number of available efd(event fd) */\n \tuint8_t efd_counter_size; /**< size of efd counter, used for vdev */\ndiff --git a/lib/eal/include/rte_interrupts.h b/lib/eal/include/rte_interrupts.h\nindex 487e3c8875..415d1fcac0 100644\n--- a/lib/eal/include/rte_interrupts.h\n+++ b/lib/eal/include/rte_interrupts.h\n@@ -506,6 +506,38 @@ __rte_internal\n int\n rte_intr_max_intr_get(const struct rte_intr_handle *intr_handle);\n \n+/**\n+ * @internal\n+ * Set the IRQ count field of interrupt handle with user\n+ * provided IRQ count value.\n+ *\n+ * @param intr_handle\n+ * pointer to the interrupt handle.\n+ * @param irq_count\n+ * IRQ count\n+ *\n+ * @return\n+ * - On success, zero.\n+ * - On failure, a negative value and rte_errno is set.\n+ */\n+__rte_internal\n+int\n+rte_intr_irq_count_set(struct rte_intr_handle *intr_handle, int irq_count);\n+\n+/**\n+ * @internal\n+ * Returns the IRQ count field of the given interrupt handle instance.\n+ *\n+ * @param intr_handle\n+ * pointer to the interrupt handle.\n+ *\n+ * @return\n+ * - On success, ir count.\n+ * - On failure, a negative value and rte_errno is set.\n+ */\n+__rte_internal\n+int rte_intr_irq_count_get(const struct rte_intr_handle *intr_handle);\n+\n /**\n * @internal\n * Set the number of event fd field of interrupt handle\ndiff --git a/lib/eal/version.map b/lib/eal/version.map\nindex 51a820d829..d31c942e04 100644\n--- a/lib/eal/version.map\n+++ b/lib/eal/version.map\n@@ -458,6 +458,8 @@ INTERNAL {\n \trte_intr_instance_dup;\n \trte_intr_instance_windows_handle_get;\n \trte_intr_instance_windows_handle_set;\n+\trte_intr_irq_count_get;\n+\trte_intr_irq_count_set;\n \trte_intr_max_intr_get;\n \trte_intr_max_intr_set;\n \trte_intr_nb_efd_get;\n", "prefixes": [ "v5", "3/5" ] }