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GET /api/patches/125984/?format=api
{ "id": 125984, "url": "https://patches.dpdk.org/api/patches/125984/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230413061650.796940-5-junfeng.guo@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230413061650.796940-5-junfeng.guo@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230413061650.796940-5-junfeng.guo@intel.com", "date": "2023-04-13T06:16:44", "name": "[04/10] net/gve: support queue release and stop for DQO", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "00a770eb732571876756a5c64a6e9d935b130110", "submitter": { "id": 1785, "url": "https://patches.dpdk.org/api/people/1785/?format=api", "name": "Junfeng Guo", "email": "junfeng.guo@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230413061650.796940-5-junfeng.guo@intel.com/mbox/", "series": [ { "id": 27687, "url": "https://patches.dpdk.org/api/series/27687/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=27687", "date": "2023-04-13T06:16:40", "name": "gve PMD enhancement", "version": 1, "mbox": "https://patches.dpdk.org/series/27687/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/125984/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/125984/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E70574292F;\n\tThu, 13 Apr 2023 08:17:35 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9BF5E42C76;\n\tThu, 13 Apr 2023 08:17:24 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by mails.dpdk.org (Postfix) with ESMTP id 2513342B71\n for <dev@dpdk.org>; Thu, 13 Apr 2023 08:17:21 +0200 (CEST)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 12 Apr 2023 23:17:21 -0700", "from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104])\n by fmsmga007.fm.intel.com with ESMTP; 12 Apr 2023 23:17:19 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1681366642; x=1712902642;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Wf9eX5u2eiVCB/cUctwUs0dl4M/TuYWnuQ78akWkP4M=;\n b=cXjhOmFhrE8fc0jc4Aj4x+vMmOcpMf6LaMQYLvH3rTgXCLLvIG7poyQq\n mfOeqtG0KTO9tFGNMuF9yFac2AF/3Zu+kpAB2IORXSkRG1McVIshgLiwO\n LqYVq4o7h3o0XmzKKYSDsvtSvKt7w8SsmrOSVz1nsTAmVYfBY++7IkBPV\n 6joY0q63l11UWpnXzA9MO/eboQYRd/vjvPohMyTiXA4DPDZIByPHgwvMT\n M9IcKIEYkdbrbb7aTUmcURh2XEKBdd0Ps25MG4DLBPxbsVQ2lLEYRYJS2\n nzC0jX2yYUuZ/G338+b/KftWi/gSoR2Ra4oJuGrvyy7GZ33xJyau/eeLQ Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10678\"; a=\"341595357\"", "E=Sophos;i=\"5.98,339,1673942400\"; d=\"scan'208\";a=\"341595357\"", "E=McAfee;i=\"6600,9927,10678\"; a=\"691824269\"", "E=Sophos;i=\"5.98,339,1673942400\"; d=\"scan'208\";a=\"691824269\"" ], "X-ExtLoop1": "1", "From": "Junfeng Guo <junfeng.guo@intel.com>", "To": "qi.z.zhang@intel.com, jingjing.wu@intel.com, ferruh.yigit@amd.com,\n beilei.xing@intel.com", "Cc": "dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,\n Rushil Gupta <rushilg@google.com>, Joshua Washington <joshwash@google.com>,\n Jeroen de Borst <jeroendb@google.com>", "Subject": "[PATCH 04/10] net/gve: support queue release and stop for DQO", "Date": "Thu, 13 Apr 2023 14:16:44 +0800", "Message-Id": "<20230413061650.796940-5-junfeng.guo@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20230413061650.796940-1-junfeng.guo@intel.com>", "References": "<20230413061650.796940-1-junfeng.guo@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for queue operations:\n - gve_tx_queue_release_dqo\n - gve_rx_queue_release_dqo\n - gve_stop_tx_queues_dqo\n - gve_stop_rx_queues_dqo\n\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\nSigned-off-by: Rushil Gupta <rushilg@google.com>\nSigned-off-by: Joshua Washington <joshwash@google.com>\nSigned-off-by: Jeroen de Borst <jeroendb@google.com>\n---\n drivers/net/gve/gve_ethdev.c | 18 +++++++++---\n drivers/net/gve/gve_ethdev.h | 12 ++++++++\n drivers/net/gve/gve_rx.c | 3 ++\n drivers/net/gve/gve_rx_dqo.c | 57 ++++++++++++++++++++++++++++++++++++\n drivers/net/gve/gve_tx.c | 3 ++\n drivers/net/gve/gve_tx_dqo.c | 55 ++++++++++++++++++++++++++++++++++\n 6 files changed, 144 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c\nindex fc60db63c5..340315a1a3 100644\n--- a/drivers/net/gve/gve_ethdev.c\n+++ b/drivers/net/gve/gve_ethdev.c\n@@ -292,11 +292,19 @@ gve_dev_close(struct rte_eth_dev *dev)\n \t\t\tPMD_DRV_LOG(ERR, \"Failed to stop dev.\");\n \t}\n \n-\tfor (i = 0; i < dev->data->nb_tx_queues; i++)\n-\t\tgve_tx_queue_release(dev, i);\n+\tif (gve_is_gqi(priv)) {\n+\t\tfor (i = 0; i < dev->data->nb_tx_queues; i++)\n+\t\t\tgve_tx_queue_release(dev, i);\n+\n+\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n+\t\t\tgve_rx_queue_release(dev, i);\n+\t} else {\n+\t\tfor (i = 0; i < dev->data->nb_tx_queues; i++)\n+\t\t\tgve_tx_queue_release_dqo(dev, i);\n \n-\tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n-\t\tgve_rx_queue_release(dev, i);\n+\t\tfor (i = 0; i < dev->data->nb_rx_queues; i++)\n+\t\t\tgve_rx_queue_release_dqo(dev, i);\n+\t}\n \n \tgve_free_qpls(priv);\n \trte_free(priv->adminq);\n@@ -578,6 +586,8 @@ static const struct eth_dev_ops gve_eth_dev_ops_dqo = {\n \t.dev_infos_get = gve_dev_info_get,\n \t.rx_queue_setup = gve_rx_queue_setup_dqo,\n \t.tx_queue_setup = gve_tx_queue_setup_dqo,\n+\t.rx_queue_release = gve_rx_queue_release_dqo,\n+\t.tx_queue_release = gve_tx_queue_release_dqo,\n \t.link_update = gve_link_update,\n \t.stats_get = gve_dev_stats_get,\n \t.stats_reset = gve_dev_stats_reset,\ndiff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h\nindex cb8cd62886..c8e1dd1435 100644\n--- a/drivers/net/gve/gve_ethdev.h\n+++ b/drivers/net/gve/gve_ethdev.h\n@@ -378,4 +378,16 @@ gve_tx_queue_setup_dqo(struct rte_eth_dev *dev, uint16_t queue_id,\n \t\t uint16_t nb_desc, unsigned int socket_id,\n \t\t const struct rte_eth_txconf *conf);\n \n+void\n+gve_tx_queue_release_dqo(struct rte_eth_dev *dev, uint16_t qid);\n+\n+void\n+gve_rx_queue_release_dqo(struct rte_eth_dev *dev, uint16_t qid);\n+\n+void\n+gve_stop_tx_queues_dqo(struct rte_eth_dev *dev);\n+\n+void\n+gve_stop_rx_queues_dqo(struct rte_eth_dev *dev);\n+\n #endif /* _GVE_ETHDEV_H_ */\ndiff --git a/drivers/net/gve/gve_rx.c b/drivers/net/gve/gve_rx.c\nindex 8d8f94efff..3dd3f578f9 100644\n--- a/drivers/net/gve/gve_rx.c\n+++ b/drivers/net/gve/gve_rx.c\n@@ -359,6 +359,9 @@ gve_stop_rx_queues(struct rte_eth_dev *dev)\n \tuint16_t i;\n \tint err;\n \n+\tif (!gve_is_gqi(hw))\n+\t\treturn gve_stop_rx_queues_dqo(dev);\n+\n \terr = gve_adminq_destroy_rx_queues(hw, dev->data->nb_rx_queues);\n \tif (err != 0)\n \t\tPMD_DRV_LOG(WARNING, \"failed to destroy rxqs\");\ndiff --git a/drivers/net/gve/gve_rx_dqo.c b/drivers/net/gve/gve_rx_dqo.c\nindex c419c4dd2f..7f58844839 100644\n--- a/drivers/net/gve/gve_rx_dqo.c\n+++ b/drivers/net/gve/gve_rx_dqo.c\n@@ -7,6 +7,38 @@\n #include \"gve_ethdev.h\"\n #include \"base/gve_adminq.h\"\n \n+static inline void\n+gve_release_rxq_mbufs_dqo(struct gve_rx_queue *rxq)\n+{\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < rxq->nb_rx_desc; i++) {\n+\t\tif (rxq->sw_ring[i]) {\n+\t\t\trte_pktmbuf_free_seg(rxq->sw_ring[i]);\n+\t\t\trxq->sw_ring[i] = NULL;\n+\t\t}\n+\t}\n+\n+\trxq->nb_avail = rxq->nb_rx_desc;\n+}\n+\n+void\n+gve_rx_queue_release_dqo(struct rte_eth_dev *dev, uint16_t qid)\n+{\n+\tstruct gve_rx_queue *q = dev->data->rx_queues[qid];\n+\n+\tif (q == NULL)\n+\t\treturn;\n+\n+\tgve_release_rxq_mbufs_dqo(q);\n+\trte_free(q->sw_ring);\n+\trte_memzone_free(q->compl_ring_mz);\n+\trte_memzone_free(q->mz);\n+\trte_memzone_free(q->qres_mz);\n+\tq->qres = NULL;\n+\trte_free(q);\n+}\n+\n static void\n gve_reset_rxq_dqo(struct gve_rx_queue *rxq)\n {\n@@ -56,6 +88,12 @@ gve_rx_queue_setup_dqo(struct rte_eth_dev *dev, uint16_t queue_id,\n \t}\n \tnb_desc = hw->rx_desc_cnt;\n \n+\t/* Free memory if needed */\n+\tif (dev->data->rx_queues[queue_id]) {\n+\t\tgve_rx_queue_release_dqo(dev, queue_id);\n+\t\tdev->data->rx_queues[queue_id] = NULL;\n+\t}\n+\n \t/* Allocate the RX queue data structure. */\n \trxq = rte_zmalloc_socket(\"gve rxq\",\n \t\t\t\t sizeof(struct gve_rx_queue),\n@@ -154,3 +192,22 @@ gve_rx_queue_setup_dqo(struct rte_eth_dev *dev, uint16_t queue_id,\n \trte_free(rxq);\n \treturn err;\n }\n+\n+void\n+gve_stop_rx_queues_dqo(struct rte_eth_dev *dev)\n+{\n+\tstruct gve_priv *hw = dev->data->dev_private;\n+\tstruct gve_rx_queue *rxq;\n+\tuint16_t i;\n+\tint err;\n+\n+\terr = gve_adminq_destroy_rx_queues(hw, dev->data->nb_rx_queues);\n+\tif (err != 0)\n+\t\tPMD_DRV_LOG(WARNING, \"failed to destroy rxqs\");\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\trxq = dev->data->rx_queues[i];\n+\t\tgve_release_rxq_mbufs_dqo(rxq);\n+\t\tgve_reset_rxq_dqo(rxq);\n+\t}\n+}\ndiff --git a/drivers/net/gve/gve_tx.c b/drivers/net/gve/gve_tx.c\nindex fee3b939c7..13dc807623 100644\n--- a/drivers/net/gve/gve_tx.c\n+++ b/drivers/net/gve/gve_tx.c\n@@ -672,6 +672,9 @@ gve_stop_tx_queues(struct rte_eth_dev *dev)\n \tuint16_t i;\n \tint err;\n \n+\tif (!gve_is_gqi(hw))\n+\t\treturn gve_stop_tx_queues_dqo(dev);\n+\n \terr = gve_adminq_destroy_tx_queues(hw, dev->data->nb_tx_queues);\n \tif (err != 0)\n \t\tPMD_DRV_LOG(WARNING, \"failed to destroy txqs\");\ndiff --git a/drivers/net/gve/gve_tx_dqo.c b/drivers/net/gve/gve_tx_dqo.c\nindex 22d20ff16f..ea6d5ff85e 100644\n--- a/drivers/net/gve/gve_tx_dqo.c\n+++ b/drivers/net/gve/gve_tx_dqo.c\n@@ -6,6 +6,36 @@\n #include \"gve_ethdev.h\"\n #include \"base/gve_adminq.h\"\n \n+static inline void\n+gve_release_txq_mbufs_dqo(struct gve_tx_queue *txq)\n+{\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < txq->sw_size; i++) {\n+\t\tif (txq->sw_ring[i]) {\n+\t\t\trte_pktmbuf_free_seg(txq->sw_ring[i]);\n+\t\t\ttxq->sw_ring[i] = NULL;\n+\t\t}\n+\t}\n+}\n+\n+void\n+gve_tx_queue_release_dqo(struct rte_eth_dev *dev, uint16_t qid)\n+{\n+\tstruct gve_tx_queue *q = dev->data->tx_queues[qid];\n+\n+\tif (q == NULL)\n+\t\treturn;\n+\n+\tgve_release_txq_mbufs_dqo(q);\n+\trte_free(q->sw_ring);\n+\trte_memzone_free(q->mz);\n+\trte_memzone_free(q->compl_ring_mz);\n+\trte_memzone_free(q->qres_mz);\n+\tq->qres = NULL;\n+\trte_free(q);\n+}\n+\n static int\n check_tx_thresh_dqo(uint16_t nb_desc, uint16_t tx_rs_thresh,\n \t\t uint16_t tx_free_thresh)\n@@ -91,6 +121,12 @@ gve_tx_queue_setup_dqo(struct rte_eth_dev *dev, uint16_t queue_id,\n \t}\n \tnb_desc = hw->tx_desc_cnt;\n \n+\t/* Free memory if needed. */\n+\tif (dev->data->tx_queues[queue_id]) {\n+\t\tgve_tx_queue_release_dqo(dev, queue_id);\n+\t\tdev->data->tx_queues[queue_id] = NULL;\n+\t}\n+\n \t/* Allocate the TX queue data structure. */\n \ttxq = rte_zmalloc_socket(\"gve txq\",\n \t\t\t\t sizeof(struct gve_tx_queue),\n@@ -183,3 +219,22 @@ gve_tx_queue_setup_dqo(struct rte_eth_dev *dev, uint16_t queue_id,\n \trte_free(txq);\n \treturn err;\n }\n+\n+void\n+gve_stop_tx_queues_dqo(struct rte_eth_dev *dev)\n+{\n+\tstruct gve_priv *hw = dev->data->dev_private;\n+\tstruct gve_tx_queue *txq;\n+\tuint16_t i;\n+\tint err;\n+\n+\terr = gve_adminq_destroy_tx_queues(hw, dev->data->nb_tx_queues);\n+\tif (err != 0)\n+\t\tPMD_DRV_LOG(WARNING, \"failed to destroy txqs\");\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\ttxq = dev->data->tx_queues[i];\n+\t\tgve_release_txq_mbufs_dqo(txq);\n+\t\tgve_reset_txq_dqo(txq);\n+\t}\n+}\n", "prefixes": [ "04/10" ] }