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GET /api/patches/124958/?format=api
{ "id": 124958, "url": "https://patches.dpdk.org/api/patches/124958/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230310082015.20200-13-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230310082015.20200-13-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230310082015.20200-13-syalavarthi@marvell.com", "date": "2023-03-10T08:19:48", "name": "[v6,12/39] ml/cnxk: enable validity checks for model metadata", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "4a0df3a4b8783c22e40a8c2db23806847f64634f", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230310082015.20200-13-syalavarthi@marvell.com/mbox/", "series": [ { "id": 27325, "url": "https://patches.dpdk.org/api/series/27325/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=27325", "date": "2023-03-10T08:19:36", "name": "Implementation of ML CNXK driver", "version": 6, "mbox": "https://patches.dpdk.org/series/27325/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/124958/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/124958/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2B50541D3D;\n\tFri, 10 Mar 2023 09:21:37 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6975D42D3B;\n\tFri, 10 Mar 2023 09:20:40 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 1E31140685\n for <dev@dpdk.org>; Fri, 10 Mar 2023 09:20:28 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 32A7uId7021875 for <dev@dpdk.org>; Fri, 10 Mar 2023 00:20:27 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3p80k782tf-6\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 10 Mar 2023 00:20:27 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Fri, 10 Mar 2023 00:20:22 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Fri, 10 Mar 2023 00:20:22 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 396CD5C6907;\n Fri, 10 Mar 2023 00:20:20 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=1mFFs36pR14664ZPGuht5pnfoDu9yiKGFojvDjY6gYw=;\n b=ZhO5QwJ/e5rXqBPajKWUHZOZ5hDTNw764M2Ou+YegDlp1qDE3/q82y64gvoUAdtftANb\n 1b13ud5AmFcmPm8g66hHNHaM6ppOOb9TSiU4WZ8RzxVF53WgQB0BdWlcpqoN8IyCydGt\n Q4NR3XxyXcLG66MwkAvedLNRcpyhxdIg3f4svNNaNrmT3OWlFgNKbxnjC1PVC+iHTHFN\n N4oqgC4XSGDfvE9mg6FdeclMhTpdVBphr1m3A3mMcEQhXPNi8FLMwY9Ymeyy3ND7/k5U\n VnELuiJ5CPRg29tarq1IpfhRCL20qe2DmmJ0vv1+ixUOrtzm2GbsxLnkZqZ8szveRsUm 0Q==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>, <ptakkar@marvell.com>, <pshukla@marvell.com>", "Subject": "[PATCH v6 12/39] ml/cnxk: enable validity checks for model metadata", "Date": "Fri, 10 Mar 2023 00:19:48 -0800", "Message-ID": "<20230310082015.20200-13-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20230310082015.20200-1-syalavarthi@marvell.com>", "References": "<20221208200220.20267-1-syalavarthi@marvell.com>\n <20230310082015.20200-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "XPm_IG4i1WbQqiqHHm6LD85Pie4sO4A2", "X-Proofpoint-ORIG-GUID": "XPm_IG4i1WbQqiqHHm6LD85Pie4sO4A2", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-03-10_02,2023-03-09_01,2023-02-09_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added model metadata structure and enabled metadata check\nduring model load. Remap cnxk IO types with RTE IO types.\nStore and update model metadata in model structure.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_model.c | 211 +++++++++++++++++++++\n drivers/ml/cnxk/cn10k_ml_model.h | 312 +++++++++++++++++++++++++++++++\n drivers/ml/cnxk/cn10k_ml_ops.c | 14 +-\n drivers/ml/cnxk/meson.build | 2 +-\n 4 files changed, 537 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_model.c b/drivers/ml/cnxk/cn10k_ml_model.c\nindex 39ed707396..dfa814bbe0 100644\n--- a/drivers/ml/cnxk/cn10k_ml_model.c\n+++ b/drivers/ml/cnxk/cn10k_ml_model.c\n@@ -2,4 +2,215 @@\n * Copyright (c) 2022 Marvell.\n */\n \n+#include <rte_hash_crc.h>\n+\n+#include <mldev_utils.h>\n+\n+#include \"cn10k_ml_dev.h\"\n #include \"cn10k_ml_model.h\"\n+\n+static enum rte_ml_io_type\n+cn10k_ml_io_type_map(uint8_t type)\n+{\n+\tswitch (type) {\n+\tcase 1:\n+\t\treturn RTE_ML_IO_TYPE_INT8;\n+\tcase 2:\n+\t\treturn RTE_ML_IO_TYPE_UINT8;\n+\tcase 3:\n+\t\treturn RTE_ML_IO_TYPE_INT16;\n+\tcase 4:\n+\t\treturn RTE_ML_IO_TYPE_UINT16;\n+\tcase 5:\n+\t\treturn RTE_ML_IO_TYPE_INT32;\n+\tcase 6:\n+\t\treturn RTE_ML_IO_TYPE_UINT32;\n+\tcase 7:\n+\t\treturn RTE_ML_IO_TYPE_FP16;\n+\tcase 8:\n+\t\treturn RTE_ML_IO_TYPE_FP32;\n+\t}\n+\n+\treturn RTE_ML_IO_TYPE_UNKNOWN;\n+}\n+\n+int\n+cn10k_ml_model_metadata_check(uint8_t *buffer, uint64_t size)\n+{\n+\tstruct cn10k_ml_model_metadata *metadata;\n+\tuint32_t payload_crc32c;\n+\tuint32_t header_crc32c;\n+\tuint8_t version[4];\n+\tuint8_t i;\n+\n+\tmetadata = (struct cn10k_ml_model_metadata *)buffer;\n+\n+\t/* Header CRC check */\n+\tif (metadata->metadata_header.header_crc32c != 0) {\n+\t\theader_crc32c = rte_hash_crc(\n+\t\t\tbuffer, sizeof(metadata->metadata_header) - sizeof(uint32_t), 0);\n+\n+\t\tif (header_crc32c != metadata->metadata_header.header_crc32c) {\n+\t\t\tplt_err(\"Invalid model, Header CRC mismatch\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\t/* Payload CRC check */\n+\tif (metadata->metadata_header.payload_crc32c != 0) {\n+\t\tpayload_crc32c = rte_hash_crc(buffer + sizeof(metadata->metadata_header),\n+\t\t\t\t\t size - sizeof(metadata->metadata_header), 0);\n+\n+\t\tif (payload_crc32c != metadata->metadata_header.payload_crc32c) {\n+\t\t\tplt_err(\"Invalid model, Payload CRC mismatch\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\t/* Model magic string */\n+\tif (strncmp((char *)metadata->metadata_header.magic, MRVL_ML_MODEL_MAGIC_STRING, 4) != 0) {\n+\t\tplt_err(\"Invalid model, magic = %s\", metadata->metadata_header.magic);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Target architecture */\n+\tif (metadata->metadata_header.target_architecture != MRVL_ML_MODEL_TARGET_ARCH) {\n+\t\tplt_err(\"Model target architecture (%u) not supported\",\n+\t\t\tmetadata->metadata_header.target_architecture);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/* Header version */\n+\trte_memcpy(version, metadata->metadata_header.version, 4 * sizeof(uint8_t));\n+\tif (version[0] * 1000 + version[1] * 100 < MRVL_ML_MODEL_VERSION) {\n+\t\tplt_err(\"Metadata version = %u.%u.%u.%u (< %u.%u.%u.%u) not supported\", version[0],\n+\t\t\tversion[1], version[2], version[3], (MRVL_ML_MODEL_VERSION / 1000) % 10,\n+\t\t\t(MRVL_ML_MODEL_VERSION / 100) % 10, (MRVL_ML_MODEL_VERSION / 10) % 10,\n+\t\t\tMRVL_ML_MODEL_VERSION % 10);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/* Init section */\n+\tif (metadata->init_model.file_size == 0) {\n+\t\tplt_err(\"Invalid metadata, init_model.file_size = %u\",\n+\t\t\tmetadata->init_model.file_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Main section */\n+\tif (metadata->main_model.file_size == 0) {\n+\t\tplt_err(\"Invalid metadata, main_model.file_size = %u\",\n+\t\t\tmetadata->main_model.file_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Finish section */\n+\tif (metadata->finish_model.file_size == 0) {\n+\t\tplt_err(\"Invalid metadata, finish_model.file_size = %u\",\n+\t\t\tmetadata->finish_model.file_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Weights and Bias */\n+\tif (metadata->weights_bias.file_size == 0) {\n+\t\tplt_err(\"Invalid metadata, weights_bias.file_size = %u\",\n+\t\t\tmetadata->weights_bias.file_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (metadata->weights_bias.relocatable != 1) {\n+\t\tplt_err(\"Model not supported, non-relocatable weights and bias\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/* Check input count */\n+\tif (metadata->model.num_input > MRVL_ML_INPUT_OUTPUT_SIZE) {\n+\t\tplt_err(\"Invalid metadata, num_input = %u (> %u)\", metadata->model.num_input,\n+\t\t\tMRVL_ML_INPUT_OUTPUT_SIZE);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Check output count */\n+\tif (metadata->model.num_output > MRVL_ML_INPUT_OUTPUT_SIZE) {\n+\t\tplt_err(\"Invalid metadata, num_output = %u (> %u)\", metadata->model.num_output,\n+\t\t\tMRVL_ML_INPUT_OUTPUT_SIZE);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Inputs */\n+\tfor (i = 0; i < metadata->model.num_input; i++) {\n+\t\tif (rte_ml_io_type_size_get(cn10k_ml_io_type_map(metadata->input[i].input_type)) <=\n+\t\t 0) {\n+\t\t\tplt_err(\"Invalid metadata, input[%u] : input_type = %u\", i,\n+\t\t\t\tmetadata->input[i].input_type);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (rte_ml_io_type_size_get(\n+\t\t\t cn10k_ml_io_type_map(metadata->input[i].model_input_type)) <= 0) {\n+\t\t\tplt_err(\"Invalid metadata, input[%u] : model_input_type = %u\", i,\n+\t\t\t\tmetadata->input[i].model_input_type);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (metadata->input[i].relocatable != 1) {\n+\t\t\tplt_err(\"Model not supported, non-relocatable input: %u\", i);\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\t}\n+\n+\t/* Outputs */\n+\tfor (i = 0; i < metadata->model.num_output; i++) {\n+\t\tif (rte_ml_io_type_size_get(\n+\t\t\t cn10k_ml_io_type_map(metadata->output[i].output_type)) <= 0) {\n+\t\t\tplt_err(\"Invalid metadata, output[%u] : output_type = %u\", i,\n+\t\t\t\tmetadata->output[i].output_type);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (rte_ml_io_type_size_get(\n+\t\t\t cn10k_ml_io_type_map(metadata->output[i].model_output_type)) <= 0) {\n+\t\t\tplt_err(\"Invalid metadata, output[%u] : model_output_type = %u\", i,\n+\t\t\t\tmetadata->output[i].model_output_type);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif (metadata->output[i].relocatable != 1) {\n+\t\t\tplt_err(\"Model not supported, non-relocatable output: %u\", i);\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void\n+cn10k_ml_model_metadata_update(struct cn10k_ml_model_metadata *metadata)\n+{\n+\tuint8_t i;\n+\n+\tfor (i = 0; i < metadata->model.num_input; i++) {\n+\t\tmetadata->input[i].input_type = cn10k_ml_io_type_map(metadata->input[i].input_type);\n+\t\tmetadata->input[i].model_input_type =\n+\t\t\tcn10k_ml_io_type_map(metadata->input[i].model_input_type);\n+\n+\t\tif (metadata->input[i].shape.w == 0)\n+\t\t\tmetadata->input[i].shape.w = 1;\n+\n+\t\tif (metadata->input[i].shape.x == 0)\n+\t\t\tmetadata->input[i].shape.x = 1;\n+\n+\t\tif (metadata->input[i].shape.y == 0)\n+\t\t\tmetadata->input[i].shape.y = 1;\n+\n+\t\tif (metadata->input[i].shape.z == 0)\n+\t\t\tmetadata->input[i].shape.z = 1;\n+\t}\n+\n+\tfor (i = 0; i < metadata->model.num_output; i++) {\n+\t\tmetadata->output[i].output_type =\n+\t\t\tcn10k_ml_io_type_map(metadata->output[i].output_type);\n+\t\tmetadata->output[i].model_output_type =\n+\t\t\tcn10k_ml_io_type_map(metadata->output[i].model_output_type);\n+\t}\n+}\ndiff --git a/drivers/ml/cnxk/cn10k_ml_model.h b/drivers/ml/cnxk/cn10k_ml_model.h\nindex a9f7b169de..dc30bc2aa7 100644\n--- a/drivers/ml/cnxk/cn10k_ml_model.h\n+++ b/drivers/ml/cnxk/cn10k_ml_model.h\n@@ -19,6 +19,309 @@ enum cn10k_ml_model_state {\n \tML_CN10K_MODEL_STATE_UNKNOWN,\n };\n \n+/* Model Metadata : v 2.1.0.2 */\n+#define MRVL_ML_MODEL_MAGIC_STRING \"MRVL\"\n+#define MRVL_ML_MODEL_TARGET_ARCH 128\n+#define MRVL_ML_MODEL_VERSION\t 2100\n+#define MRVL_ML_MODEL_NAME_LEN\t 64\n+#define MRVL_ML_INPUT_NAME_LEN\t 16\n+#define MRVL_ML_OUTPUT_NAME_LEN\t 16\n+#define MRVL_ML_INPUT_OUTPUT_SIZE 8\n+\n+/* Model file metadata structure */\n+struct cn10k_ml_model_metadata {\n+\t/* Header (256-byte) */\n+\tstruct {\n+\t\t/* Magic string ('M', 'R', 'V', 'L') */\n+\t\tuint8_t magic[4];\n+\n+\t\t/* Metadata version */\n+\t\tuint8_t version[4];\n+\n+\t\t/* Metadata size */\n+\t\tuint32_t metadata_size;\n+\n+\t\t/* Unique ID */\n+\t\tuint8_t uuid[128];\n+\n+\t\t/* Model target architecture\n+\t\t * 0 = Undefined\n+\t\t * 1 = M1K\n+\t\t * 128 = MLIP\n+\t\t * 256 = Experimental\n+\t\t */\n+\t\tuint32_t target_architecture;\n+\t\tuint8_t reserved[104];\n+\n+\t\t/* CRC of data after metadata_header (i.e. after first 256 bytes) */\n+\t\tuint32_t payload_crc32c;\n+\n+\t\t/* CRC of first 252 bytes of metadata_header, after payload_crc calculation */\n+\t\tuint32_t header_crc32c;\n+\t} metadata_header;\n+\n+\t/* Model information (256-byte) */\n+\tstruct {\n+\t\t/* Model name string */\n+\t\tuint8_t name[MRVL_ML_MODEL_NAME_LEN];\n+\n+\t\t/* Model version info (xx.xx.xx.xx) */\n+\t\tuint8_t version[4];\n+\n+\t\t/* Model code size (Init + Main + Finish) */\n+\t\tuint32_t code_size;\n+\n+\t\t/* Model data size (Weights and Bias) */\n+\t\tuint32_t data_size;\n+\n+\t\t/* OCM start offset, set to ocm_wb_range_start */\n+\t\tuint32_t ocm_start;\n+\n+\t\t/* OCM start offset, set to max OCM size */\n+\t\tuint32_t ocm_end;\n+\n+\t\t/* Relocatable flag (always yes)\n+\t\t * 0 = Not relocatable\n+\t\t * 1 = Relocatable\n+\t\t */\n+\t\tuint8_t ocm_relocatable;\n+\n+\t\t/* Tile relocatable flag (always yes)\n+\t\t * 0 = Not relocatable\n+\t\t * 1 = Relocatable\n+\t\t */\n+\t\tuint8_t tile_relocatable;\n+\n+\t\t/* Start tile (Always 0) */\n+\t\tuint8_t tile_start;\n+\n+\t\t/* End tile (num_tiles - 1) */\n+\t\tuint8_t tile_end;\n+\n+\t\t/* Inference batch size */\n+\t\tuint8_t batch_size;\n+\n+\t\t/* Number of input tensors (Max 8) */\n+\t\tuint8_t num_input;\n+\n+\t\t/* Number of output tensors (Max 8) */\n+\t\tuint8_t num_output;\n+\t\tuint8_t reserved1;\n+\n+\t\t/* Total input size in bytes */\n+\t\tuint32_t input_size;\n+\n+\t\t/* Total output size in bytes */\n+\t\tuint32_t output_size;\n+\n+\t\t/* Table size in bytes */\n+\t\tuint32_t table_size;\n+\n+\t\t/* Number of layers in the network */\n+\t\tuint32_t num_layers;\n+\t\tuint32_t reserved2;\n+\n+\t\t/* Floor of absolute OCM region */\n+\t\tuint64_t ocm_tmp_range_floor;\n+\n+\t\t/* Relative OCM start address of WB data block */\n+\t\tuint64_t ocm_wb_range_start;\n+\n+\t\t/* Relative OCM end address of WB data block */\n+\t\tuint64_t ocm_wb_range_end;\n+\n+\t\t/* Relative DDR start address of WB data block */\n+\t\tuint64_t ddr_wb_range_start;\n+\n+\t\t/* Relative DDR end address of all outputs */\n+\t\tuint64_t ddr_wb_range_end;\n+\n+\t\t/* Relative DDR start address of all inputs */\n+\t\tuint64_t ddr_input_range_start;\n+\n+\t\t/* Relative DDR end address of all inputs */\n+\t\tuint64_t ddr_input_range_end;\n+\n+\t\t/* Relative DDR start address of all outputs */\n+\t\tuint64_t ddr_output_range_start;\n+\n+\t\t/* Relative DDR end address of all outputs */\n+\t\tuint64_t ddr_output_range_end;\n+\n+\t\t/* Compiler version */\n+\t\tuint8_t compiler_version[8];\n+\n+\t\t/* CDK version */\n+\t\tuint8_t cdk_version[4];\n+\n+\t\t/* Lower batch optimization support\n+\t\t * 0 - No,\n+\t\t * 1 - Yes\n+\t\t */\n+\t\tuint8_t supports_lower_batch_size_optimization;\n+\t\tuint8_t reserved3[59];\n+\t} model;\n+\n+\t/* Init section (64-byte) */\n+\tstruct {\n+\t\tuint32_t file_offset;\n+\t\tuint32_t file_size;\n+\t\tuint8_t reserved[56];\n+\t} init_model;\n+\n+\t/* Main section (64-byte) */\n+\tstruct {\n+\t\tuint32_t file_offset;\n+\t\tuint32_t file_size;\n+\t\tuint8_t reserved[56];\n+\t} main_model;\n+\n+\t/* Finish section (64-byte) */\n+\tstruct {\n+\t\tuint32_t file_offset;\n+\t\tuint32_t file_size;\n+\t\tuint8_t reserved[56];\n+\t} finish_model;\n+\n+\tuint8_t reserved1[512]; /* End of 2k bytes */\n+\n+\t/* Weights and Bias (64-byte) */\n+\tstruct {\n+\t\t/* Memory offset, set to ddr_wb_range_start */\n+\t\tuint64_t mem_offset;\n+\t\tuint32_t file_offset;\n+\t\tuint32_t file_size;\n+\n+\t\t/* Relocatable flag for WB\n+\t\t * 1 = Relocatable\n+\t\t * 2 = Not relocatable\n+\t\t */\n+\t\tuint8_t relocatable;\n+\t\tuint8_t reserved[47];\n+\t} weights_bias;\n+\n+\t/* Input (512-byte, 64-byte per input) provisioned for 8 inputs */\n+\tstruct {\n+\t\t/* DDR offset (in OCM absolute addresses for input) */\n+\t\tuint64_t mem_offset;\n+\n+\t\t/* Relocatable flag\n+\t\t * 1 = Relocatable\n+\t\t * 2 = Not relocatable\n+\t\t */\n+\t\tuint8_t relocatable;\n+\n+\t\t/* Input quantization\n+\t\t * 1 = Requires quantization\n+\t\t * 2 = Pre-quantized\n+\t\t */\n+\t\tuint8_t quantize;\n+\n+\t\t/* Type of incoming input\n+\t\t * 1 = INT8, 2 = UINT8, 3 = INT16, 4 = UINT16,\n+\t\t * 5 = INT32, 6 = UINT32, 7 = FP16, 8 = FP32\n+\t\t */\n+\t\tuint8_t input_type;\n+\n+\t\t/* Type of input required by model\n+\t\t * 1 = INT8, 2 = UINT8, 3 = INT16, 4 = UINT16,\n+\t\t * 5 = INT32, 6 = UINT32, 7 = FP16, 8 = FP32\n+\t\t */\n+\t\tuint8_t model_input_type;\n+\n+\t\t/* float_32 qscale value\n+\t\t * quantized = non-quantized * qscale\n+\t\t */\n+\t\tfloat qscale;\n+\n+\t\t/* Input shape */\n+\t\tstruct {\n+\t\t\t/* Input format\n+\t\t\t * 1 = NCHW\n+\t\t\t * 2 = NHWC\n+\t\t\t */\n+\t\t\tuint8_t format;\n+\t\t\tuint8_t reserved[3];\n+\t\t\tuint32_t w;\n+\t\t\tuint32_t x;\n+\t\t\tuint32_t y;\n+\t\t\tuint32_t z;\n+\t\t} shape;\n+\t\tuint8_t reserved[4];\n+\n+\t\t/* Name of input */\n+\t\tuint8_t input_name[MRVL_ML_INPUT_NAME_LEN];\n+\n+\t\t/* DDR range end\n+\t\t * new = mem_offset + size_bytes - 1\n+\t\t */\n+\t\tuint64_t ddr_range_end;\n+\t} input[MRVL_ML_INPUT_OUTPUT_SIZE];\n+\n+\t/* Output (512 byte, 64-byte per input) provisioned for 8 outputs */\n+\tstruct {\n+\t\t/* DDR offset in OCM absolute addresses for output */\n+\t\tuint64_t mem_offset;\n+\n+\t\t/* Relocatable flag\n+\t\t * 1 = Relocatable\n+\t\t * 2 = Not relocatable\n+\t\t */\n+\t\tuint8_t relocatable;\n+\n+\t\t/* Output dequantization\n+\t\t * 1 = De-quantization required\n+\t\t * 2 = De-quantization not required\n+\t\t */\n+\t\tuint8_t dequantize;\n+\n+\t\t/* Type of outgoing output\n+\t\t * 1 = INT8, 2 = UINT8, 3 = INT16, 4 = UINT16\n+\t\t * 5 = INT32, 6 = UINT32, 7 = FP16, 8 = FP32\n+\t\t */\n+\t\tuint8_t output_type;\n+\n+\t\t/* Type of output produced by model\n+\t\t * 1 = INT8, 2 = UINT8, 3 = INT16, 4 = UINT16\n+\t\t * 5 = INT32, 6 = UINT32, 7 = FP16, 8 = FP32\n+\t\t */\n+\t\tuint8_t model_output_type;\n+\n+\t\t/* float_32 dscale value\n+\t\t * dequantized = quantized * dscale\n+\t\t */\n+\t\tfloat dscale;\n+\n+\t\t/* Number of items in the output */\n+\t\tuint32_t size;\n+\t\tuint8_t reserved[20];\n+\n+\t\t/* DDR range end\n+\t\t * new = mem_offset + size_bytes - 1\n+\t\t */\n+\t\tuint64_t ddr_range_end;\n+\t\tuint8_t output_name[MRVL_ML_OUTPUT_NAME_LEN];\n+\t} output[MRVL_ML_INPUT_OUTPUT_SIZE];\n+\n+\tuint8_t reserved2[1792];\n+\n+\t/* Model data */\n+\tstruct {\n+\t\tuint8_t reserved1[4068];\n+\n+\t\t/* Beta: xx.xx.xx.xx,\n+\t\t * Later: YYYYMM.xx.xx\n+\t\t */\n+\t\tuint8_t compiler_version[8];\n+\n+\t\t/* M1K CDK version (xx.xx.xx.xx) */\n+\t\tuint8_t m1k_cdk_version[4];\n+\t} data;\n+\n+\t/* Hidden 16 bytes of magic code */\n+\tuint8_t reserved3[16];\n+};\n+\n /* Model Object */\n struct cn10k_ml_model {\n \t/* Device reference */\n@@ -30,6 +333,12 @@ struct cn10k_ml_model {\n \t/* ID */\n \tuint16_t model_id;\n \n+\t/* Batch size */\n+\tuint32_t batch_size;\n+\n+\t/* Metadata */\n+\tstruct cn10k_ml_model_metadata metadata;\n+\n \t/* Spinlock, used to update model state */\n \tplt_spinlock_t lock;\n \n@@ -37,4 +346,7 @@ struct cn10k_ml_model {\n \tenum cn10k_ml_model_state state;\n };\n \n+int cn10k_ml_model_metadata_check(uint8_t *buffer, uint64_t size);\n+void cn10k_ml_model_metadata_update(struct cn10k_ml_model_metadata *metadata);\n+\n #endif /* _CN10K_ML_MODEL_H_ */\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex 0955fa0d76..2cde795903 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -416,8 +416,11 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \tuint64_t mz_size;\n \tuint16_t idx;\n \tbool found;\n+\tint ret;\n \n-\tPLT_SET_USED(params);\n+\tret = cn10k_ml_model_metadata_check(params->addr, params->size);\n+\tif (ret != 0)\n+\t\treturn ret;\n \n \tmldev = dev->data->dev_private;\n \n@@ -450,6 +453,15 @@ cn10k_ml_model_load(struct rte_ml_dev *dev, struct rte_ml_model_params *params,\n \tmodel->mldev = mldev;\n \tmodel->model_id = idx;\n \n+\trte_memcpy(&model->metadata, params->addr, sizeof(struct cn10k_ml_model_metadata));\n+\tcn10k_ml_model_metadata_update(&model->metadata);\n+\n+\t/* Enable support for batch_size of 256 */\n+\tif (model->metadata.model.batch_size == 0)\n+\t\tmodel->batch_size = 256;\n+\telse\n+\t\tmodel->batch_size = model->metadata.model.batch_size;\n+\n \tplt_spinlock_init(&model->lock);\n \tmodel->state = ML_CN10K_MODEL_STATE_LOADED;\n \tdev->data->models[idx] = model;\ndiff --git a/drivers/ml/cnxk/meson.build b/drivers/ml/cnxk/meson.build\nindex bf7a9c0225..799e8f2470 100644\n--- a/drivers/ml/cnxk/meson.build\n+++ b/drivers/ml/cnxk/meson.build\n@@ -19,7 +19,7 @@ sources = files(\n 'cn10k_ml_model.c',\n )\n \n-deps += ['mldev', 'common_cnxk', 'kvargs']\n+deps += ['mldev', 'common_cnxk', 'kvargs', 'hash']\n \n if get_option('buildtype').contains('debug')\n cflags += [ '-DCNXK_ML_DEV_DEBUG' ]\n", "prefixes": [ "v6", "12/39" ] }