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GET /api/patches/124695/?format=api
{ "id": 124695, "url": "https://patches.dpdk.org/api/patches/124695/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230302212057.1114863-6-mingxia.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230302212057.1114863-6-mingxia.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230302212057.1114863-6-mingxia.liu@intel.com", "date": "2023-03-02T21:20:41", "name": "[v9,05/21] net/cpfl: support queue start", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "807efbf9f60d056e13ca71f0c0823793f011916b", "submitter": { "id": 2514, "url": "https://patches.dpdk.org/api/people/2514/?format=api", "name": "Liu, Mingxia", "email": "mingxia.liu@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230302212057.1114863-6-mingxia.liu@intel.com/mbox/", "series": [ { "id": 27228, "url": "https://patches.dpdk.org/api/series/27228/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=27228", "date": "2023-03-02T21:20:36", "name": "add support for cpfl PMD in DPDK", "version": 9, "mbox": "https://patches.dpdk.org/series/27228/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/124695/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/124695/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 726D841DB5;\n\tThu, 2 Mar 2023 14:06:41 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A643142D10;\n\tThu, 2 Mar 2023 14:06:14 +0100 (CET)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id 9EA8742C54\n for <dev@dpdk.org>; Thu, 2 Mar 2023 14:06:12 +0100 (CET)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Mar 2023 05:06:12 -0800", "from dpdk-mingxial-ice.sh.intel.com ([10.67.110.191])\n by orsmga001.jf.intel.com with ESMTP; 02 Mar 2023 05:06:10 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1677762373; x=1709298373;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=n/UqUoRbFOqMFv5GkJ25l5nGQJCWPXNNapD7bLVvEuE=;\n b=AArZJBLRHak69sWpQWCOR9YqDM6OFr4pePcwlGha4L7+z396ZX5Tzsju\n kMCPYgygqMekmeimqiJxj1AHkHCt6qcRbzRiXvwKHXS09gy4zvZzOz2LB\n VBoGy4mdH+9QPjZrF83Iwh7doF3iMb8Ar51VLyp64liuGd/QdSxOeoTcT\n DN2s7O8u4iJxnBhttW2GFXPaljUC9lbqXegZatAhlw9wg6dIqi48A7X+Z\n MpDtPxqRanEBkcmVNQbzMOcwtSW41ezY/D8GexLKk5wGZgrtT9Paua0gz\n HQ7xL1vG+guAKc6JX3UvBA/zO6Oj5In6J0+rwPJGErtOdGXWi0giNuCkM A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10636\"; a=\"322988157\"", "E=Sophos;i=\"5.98,227,1673942400\"; d=\"scan'208\";a=\"322988157\"", "E=McAfee;i=\"6500,9779,10636\"; a=\"707406377\"", "E=Sophos;i=\"5.98,227,1673942400\"; d=\"scan'208\";a=\"707406377\"" ], "X-ExtLoop1": "1", "From": "Mingxia Liu <mingxia.liu@intel.com>", "To": "dev@dpdk.org,\n\tbeilei.xing@intel.com,\n\tyuying.zhang@intel.com", "Cc": "Mingxia Liu <mingxia.liu@intel.com>", "Subject": "[PATCH v9 05/21] net/cpfl: support queue start", "Date": "Thu, 2 Mar 2023 21:20:41 +0000", "Message-Id": "<20230302212057.1114863-6-mingxia.liu@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20230302212057.1114863-1-mingxia.liu@intel.com>", "References": "<20230302103527.931071-1-mingxia.liu@intel.com>\n <20230302212057.1114863-1-mingxia.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for these device ops:\n - rx_queue_start\n - tx_queue_start\n\nSigned-off-by: Mingxia Liu <mingxia.liu@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c | 41 ++++++++++\n drivers/net/cpfl/cpfl_rxtx.c | 138 +++++++++++++++++++++++++++++++++\n drivers/net/cpfl/cpfl_rxtx.h | 4 +\n 3 files changed, 183 insertions(+)", "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex 6cbc950d84..02a771638e 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -181,12 +181,51 @@ cpfl_dev_configure(struct rte_eth_dev *dev)\n \treturn 0;\n }\n \n+static int\n+cpfl_start_queues(struct rte_eth_dev *dev)\n+{\n+\tstruct idpf_rx_queue *rxq;\n+\tstruct idpf_tx_queue *txq;\n+\tint err = 0;\n+\tint i;\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\ttxq = dev->data->tx_queues[i];\n+\t\tif (txq == NULL || txq->tx_deferred_start)\n+\t\t\tcontinue;\n+\t\terr = cpfl_tx_queue_start(dev, i);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Fail to start Tx queue %u\", i);\n+\t\t\treturn err;\n+\t\t}\n+\t}\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\trxq = dev->data->rx_queues[i];\n+\t\tif (rxq == NULL || rxq->rx_deferred_start)\n+\t\t\tcontinue;\n+\t\terr = cpfl_rx_queue_start(dev, i);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Fail to start Rx queue %u\", i);\n+\t\t\treturn err;\n+\t\t}\n+\t}\n+\n+\treturn err;\n+}\n+\n static int\n cpfl_dev_start(struct rte_eth_dev *dev)\n {\n \tstruct idpf_vport *vport = dev->data->dev_private;\n \tint ret;\n \n+\tret = cpfl_start_queues(dev);\n+\tif (ret != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to start queues\");\n+\t\treturn ret;\n+\t}\n+\n \tret = idpf_vc_vport_ena_dis(vport, true);\n \tif (ret != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to enable vport\");\n@@ -240,6 +279,8 @@ static const struct eth_dev_ops cpfl_eth_dev_ops = {\n \t.dev_start\t\t\t= cpfl_dev_start,\n \t.dev_stop\t\t\t= cpfl_dev_stop,\n \t.link_update\t\t\t= cpfl_dev_link_update,\n+\t.rx_queue_start\t\t\t= cpfl_rx_queue_start,\n+\t.tx_queue_start\t\t\t= cpfl_tx_queue_start,\n \t.dev_supported_ptypes_get\t= cpfl_dev_supported_ptypes_get,\n };\n \ndiff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c\nindex 930d725a4a..c13166b63c 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.c\n+++ b/drivers/net/cpfl/cpfl_rxtx.c\n@@ -474,3 +474,141 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n err_txq_alloc:\n \treturn ret;\n }\n+\n+int\n+cpfl_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n+{\n+\tstruct idpf_rx_queue *rxq;\n+\tint err;\n+\n+\tif (rx_queue_id >= dev->data->nb_rx_queues)\n+\t\treturn -EINVAL;\n+\n+\trxq = dev->data->rx_queues[rx_queue_id];\n+\n+\tif (rxq == NULL || !rxq->q_set) {\n+\t\tPMD_DRV_LOG(ERR, \"RX queue %u not available or setup\",\n+\t\t\t\t\trx_queue_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (rxq->adapter->is_rx_singleq) {\n+\t\t/* Single queue */\n+\t\terr = idpf_qc_single_rxq_mbufs_alloc(rxq);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate RX queue mbuf\");\n+\t\t\treturn err;\n+\t\t}\n+\n+\t\trte_wmb();\n+\n+\t\t/* Init the RX tail register. */\n+\t\tIDPF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);\n+\t} else {\n+\t\t/* Split queue */\n+\t\terr = idpf_qc_split_rxq_mbufs_alloc(rxq->bufq1);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate RX buffer queue mbuf\");\n+\t\t\treturn err;\n+\t\t}\n+\t\terr = idpf_qc_split_rxq_mbufs_alloc(rxq->bufq2);\n+\t\tif (err != 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate RX buffer queue mbuf\");\n+\t\t\treturn err;\n+\t\t}\n+\n+\t\trte_wmb();\n+\n+\t\t/* Init the RX tail register. */\n+\t\tIDPF_PCI_REG_WRITE(rxq->bufq1->qrx_tail, rxq->bufq1->rx_tail);\n+\t\tIDPF_PCI_REG_WRITE(rxq->bufq2->qrx_tail, rxq->bufq2->rx_tail);\n+\t}\n+\n+\treturn err;\n+}\n+\n+int\n+cpfl_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n+{\n+\tstruct idpf_vport *vport = dev->data->dev_private;\n+\tstruct idpf_rx_queue *rxq =\n+\t\tdev->data->rx_queues[rx_queue_id];\n+\tint err = 0;\n+\n+\terr = idpf_vc_rxq_config(vport, rxq);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Fail to configure Rx queue %u\", rx_queue_id);\n+\t\treturn err;\n+\t}\n+\n+\terr = cpfl_rx_queue_init(dev, rx_queue_id);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to init RX queue %u\",\n+\t\t\t rx_queue_id);\n+\t\treturn err;\n+\t}\n+\n+\t/* Ready to switch the queue on */\n+\terr = idpf_vc_queue_switch(vport, rx_queue_id, true, true);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to switch RX queue %u on\",\n+\t\t\t rx_queue_id);\n+\t} else {\n+\t\trxq->q_started = true;\n+\t\tdev->data->rx_queue_state[rx_queue_id] =\n+\t\t\tRTE_ETH_QUEUE_STATE_STARTED;\n+\t}\n+\n+\treturn err;\n+}\n+\n+int\n+cpfl_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n+{\n+\tstruct idpf_tx_queue *txq;\n+\n+\tif (tx_queue_id >= dev->data->nb_tx_queues)\n+\t\treturn -EINVAL;\n+\n+\ttxq = dev->data->tx_queues[tx_queue_id];\n+\n+\t/* Init the RX tail register. */\n+\tIDPF_PCI_REG_WRITE(txq->qtx_tail, 0);\n+\n+\treturn 0;\n+}\n+\n+int\n+cpfl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n+{\n+\tstruct idpf_vport *vport = dev->data->dev_private;\n+\tstruct idpf_tx_queue *txq =\n+\t\tdev->data->tx_queues[tx_queue_id];\n+\tint err = 0;\n+\n+\terr = idpf_vc_txq_config(vport, txq);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Fail to configure Tx queue %u\", tx_queue_id);\n+\t\treturn err;\n+\t}\n+\n+\terr = cpfl_tx_queue_init(dev, tx_queue_id);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to init TX queue %u\",\n+\t\t\t tx_queue_id);\n+\t\treturn err;\n+\t}\n+\n+\t/* Ready to switch the queue on */\n+\terr = idpf_vc_queue_switch(vport, tx_queue_id, false, true);\n+\tif (err != 0) {\n+\t\tPMD_DRV_LOG(ERR, \"Failed to switch TX queue %u on\",\n+\t\t\t tx_queue_id);\n+\t} else {\n+\t\ttxq->q_started = true;\n+\t\tdev->data->tx_queue_state[tx_queue_id] =\n+\t\t\tRTE_ETH_QUEUE_STATE_STARTED;\n+\t}\n+\n+\treturn err;\n+}\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h\nindex e0221abfa3..716b2fefa4 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.h\n+++ b/drivers/net/cpfl/cpfl_rxtx.h\n@@ -28,4 +28,8 @@ int cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\t\tuint16_t nb_desc, unsigned int socket_id,\n \t\t\tconst struct rte_eth_rxconf *rx_conf,\n \t\t\tstruct rte_mempool *mp);\n+int cpfl_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n+int cpfl_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n+int cpfl_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n+int cpfl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n #endif /* _CPFL_RXTX_H_ */\n", "prefixes": [ "v9", "05/21" ] }