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GET /api/patches/124658/?format=api
{ "id": 124658, "url": "https://patches.dpdk.org/api/patches/124658/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230302103527.931071-21-mingxia.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230302103527.931071-21-mingxia.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230302103527.931071-21-mingxia.liu@intel.com", "date": "2023-03-02T10:35:26", "name": "[v8,20/21] net/cpfl: support scalar scatter Rx datapath for single queue model", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "77d89a6f2531b5f40fb8c28535a07a7bd2435ee4", "submitter": { "id": 2514, "url": "https://patches.dpdk.org/api/people/2514/?format=api", "name": "Liu, Mingxia", "email": "mingxia.liu@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230302103527.931071-21-mingxia.liu@intel.com/mbox/", "series": [ { "id": 27215, "url": "https://patches.dpdk.org/api/series/27215/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=27215", "date": "2023-03-02T10:35:06", "name": "add support for cpfl PMD in DPDK", "version": 8, "mbox": "https://patches.dpdk.org/series/27215/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/124658/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/124658/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5CD2A41DB0;\n\tThu, 2 Mar 2023 03:23:16 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C56C142DA5;\n\tThu, 2 Mar 2023 03:21:10 +0100 (CET)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by mails.dpdk.org (Postfix) with ESMTP id DF48F42D50\n for <dev@dpdk.org>; Thu, 2 Mar 2023 03:21:07 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Mar 2023 18:21:06 -0800", "from dpdk-mingxial-ice.sh.intel.com ([10.67.110.191])\n by fmsmga002.fm.intel.com with ESMTP; 01 Mar 2023 18:21:05 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1677723668; x=1709259668;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=LjxDOoFsO2pVsW+6YoKwEeWnx6eTpNa4USG2XOUxTPo=;\n b=I0YmTs9d9VF6EGU2IO5AsWiccaH9JoIkpGUu/ryvuhwgvf8GXUBUesF4\n J29Clb7YWyLoQm089S+4//LjzJDdRBYkv/suaSyAbhtLyYCc9sfOcp4q8\n fNuYixeCrVQxofFYF9vdVi23sL00eZQwHkW+GP+grASipEp6SOMYD5cf9\n boMFj7W6O/NcSbWKN2JBhctqMZYeBgIkdG/zfedqKOEsYEPHnAvY4drW1\n KVe0m/s2X46WDbI8FHzyoov7H/x2jxmFzGzWg9S1+S7/I37tDdF/a7alJ\n M5+xMn7BgNAlaBviNK4aTkJ2Br3mM6LQquyvxrklsbz4kIL8+nIyDMTmW w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10636\"; a=\"315013614\"", "E=Sophos;i=\"5.98,226,1673942400\"; d=\"scan'208\";a=\"315013614\"", "E=McAfee;i=\"6500,9779,10636\"; a=\"784607675\"", "E=Sophos;i=\"5.98,226,1673942400\"; d=\"scan'208\";a=\"784607675\"" ], "X-ExtLoop1": "1", "From": "Mingxia Liu <mingxia.liu@intel.com>", "To": "dev@dpdk.org,\n\tbeilei.xing@intel.com,\n\tyuying.zhang@intel.com", "Cc": "Mingxia Liu <mingxia.liu@intel.com>,\n\tWenjun Wu <wenjun1.wu@intel.com>", "Subject": "[PATCH v8 20/21] net/cpfl: support scalar scatter Rx datapath for\n single queue model", "Date": "Thu, 2 Mar 2023 10:35:26 +0000", "Message-Id": "<20230302103527.931071-21-mingxia.liu@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20230302103527.931071-1-mingxia.liu@intel.com>", "References": "<20230216003010.3439881-1-mingxia.liu@intel.com>\n <20230302103527.931071-1-mingxia.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch add single q recv scatter Rx function.\n\nSigned-off-by: Wenjun Wu <wenjun1.wu@intel.com>\nSigned-off-by: Mingxia Liu <mingxia.liu@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c | 3 ++-\n drivers/net/cpfl/cpfl_rxtx.c | 27 +++++++++++++++++++++++++++\n drivers/net/cpfl/cpfl_rxtx.h | 2 ++\n 3 files changed, 31 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex fe800b49f3..87c591ae5c 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -155,7 +155,8 @@ cpfl_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \t\tRTE_ETH_RX_OFFLOAD_UDP_CKSUM |\n \t\tRTE_ETH_RX_OFFLOAD_TCP_CKSUM |\n \t\tRTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |\n-\t\tRTE_ETH_RX_OFFLOAD_TIMESTAMP;\n+\t\tRTE_ETH_RX_OFFLOAD_TIMESTAMP\t\t|\n+\t\tRTE_ETH_RX_OFFLOAD_SCATTER;\n \n \tdev_info->tx_offload_capa =\n \t\tRTE_ETH_TX_OFFLOAD_IPV4_CKSUM\t\t|\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c\nindex dac95579f5..9e8767df72 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.c\n+++ b/drivers/net/cpfl/cpfl_rxtx.c\n@@ -503,6 +503,8 @@ int\n cpfl_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n {\n \tstruct idpf_rx_queue *rxq;\n+\tuint16_t max_pkt_len;\n+\tuint32_t frame_size;\n \tint err;\n \n \tif (rx_queue_id >= dev->data->nb_rx_queues)\n@@ -516,6 +518,17 @@ cpfl_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n \t\treturn -EINVAL;\n \t}\n \n+\tframe_size = dev->data->mtu + CPFL_ETH_OVERHEAD;\n+\n+\tmax_pkt_len =\n+\t RTE_MIN((uint32_t)CPFL_SUPPORT_CHAIN_NUM * rxq->rx_buf_len,\n+\t\t frame_size);\n+\n+\trxq->max_pkt_len = max_pkt_len;\n+\tif ((dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_SCATTER) ||\n+\t frame_size > rxq->rx_buf_len)\n+\t\tdev->data->scattered_rx = 1;\n+\n \terr = idpf_qc_ts_mbuf_register(rxq);\n \tif (err != 0) {\n \t\tPMD_DRV_LOG(ERR, \"fail to register timestamp mbuf %u\",\n@@ -807,6 +820,13 @@ cpfl_set_rx_function(struct rte_eth_dev *dev)\n \t\t\t}\n #endif /* CC_AVX512_SUPPORT */\n \t\t}\n+\t\tif (dev->data->scattered_rx) {\n+\t\t\tPMD_DRV_LOG(NOTICE,\n+\t\t\t\t \"Using Single Scalar Scatterd Rx (port %d).\",\n+\t\t\t\t dev->data->port_id);\n+\t\t\tdev->rx_pkt_burst = idpf_dp_singleq_recv_scatter_pkts;\n+\t\t\treturn;\n+\t\t}\n \t\tPMD_DRV_LOG(NOTICE,\n \t\t\t \"Using Single Scalar Rx (port %d).\",\n \t\t\t dev->data->port_id);\n@@ -819,6 +839,13 @@ cpfl_set_rx_function(struct rte_eth_dev *dev)\n \t\t\t dev->data->port_id);\n \t\tdev->rx_pkt_burst = idpf_dp_splitq_recv_pkts;\n \t} else {\n+\t\tif (dev->data->scattered_rx) {\n+\t\t\tPMD_DRV_LOG(NOTICE,\n+\t\t\t\t \"Using Single Scalar Scatterd Rx (port %d).\",\n+\t\t\t\t dev->data->port_id);\n+\t\t\tdev->rx_pkt_burst = idpf_dp_singleq_recv_scatter_pkts;\n+\t\t\treturn;\n+\t\t}\n \t\tPMD_DRV_LOG(NOTICE,\n \t\t\t \"Using Single Scalar Rx (port %d).\",\n \t\t\t dev->data->port_id);\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h\nindex 5f8144e55f..fb267d38c8 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.h\n+++ b/drivers/net/cpfl/cpfl_rxtx.h\n@@ -21,6 +21,8 @@\n #define CPFL_DEFAULT_TX_RS_THRESH\t32\n #define CPFL_DEFAULT_TX_FREE_THRESH\t32\n \n+#define CPFL_SUPPORT_CHAIN_NUM 5\n+\n int cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\t\tuint16_t nb_desc, unsigned int socket_id,\n \t\t\tconst struct rte_eth_txconf *tx_conf);\n", "prefixes": [ "v8", "20/21" ] }