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GET /api/patches/123610/?format=api
{ "id": 123610, "url": "https://patches.dpdk.org/api/patches/123610/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230209221929.265059-3-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230209221929.265059-3-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230209221929.265059-3-nicolas.chautru@intel.com", "date": "2023-02-09T22:19:22", "name": "[v1,2/9] baseband/acc: add support for 4GUL with SO and TB", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "72cf58ead66af559024f7c9ddec34be195f352ed", "submitter": { "id": 1314, "url": "https://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 2642, "url": "https://patches.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230209221929.265059-3-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 26933, "url": "https://patches.dpdk.org/api/series/26933/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26933", "date": "2023-02-09T22:19:20", "name": "baseband/acc: VRB PMD fixes", "version": 1, "mbox": "https://patches.dpdk.org/series/26933/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/123610/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/123610/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EB30841C56;\n\tThu, 9 Feb 2023 23:23:12 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1FCA9410F9;\n\tThu, 9 Feb 2023 23:23:11 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by mails.dpdk.org (Postfix) with ESMTP id BE27E40E50;\n Thu, 9 Feb 2023 23:23:07 +0100 (CET)", "from fmsmga004.fm.intel.com ([10.253.24.48])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Feb 2023 14:23:06 -0800", "from spr-npg-bds1-eec2.sn.intel.com (HELO spr-npg-bds1-eec2..)\n ([10.233.181.123])\n by fmsmga004.fm.intel.com with ESMTP; 09 Feb 2023 14:23:05 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1675981388; x=1707517388;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=b7bPRW3CJRVx4M5VHU/rFWfIcqtpIC93vn6D7qN4+CU=;\n b=PHFIhTVZ1gqP/NVO0zALUGrxQr6Xdkk3lgKBK7AVY/We+oqQHAorvjWR\n sOMfCsi7H2Gy0ztqCVJAaHdTMHW6V2DJvFyHQ7MMHO0t0SFcqIPrD8jUO\n hHTi4owSoHaGN9/lsXdy+zPvQ8RxsJ6yQgZcWdSrYuxCKsqlsHC/oBu0O\n NIuNr+jEgG28JIM4Es57s562/4bunV44V9TYCvXSwXJNmDpNd6eBp/yEl\n WyrZcyxAJRa20ycVL6z51TD+se44GDPh1yD19QZcLBiSlJMvVvgWlptEN\n 3EbSqB6ey2wpW8a4oTYfeSryy/VrV8lSySJJjGEsmyonsiEGZqDqSVUS9 Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10616\"; a=\"331563032\"", "E=Sophos;i=\"5.97,285,1669104000\"; d=\"scan'208\";a=\"331563032\"", "E=McAfee;i=\"6500,9779,10616\"; a=\"736513264\"", "E=Sophos;i=\"5.97,285,1669104000\"; d=\"scan'208\";a=\"736513264\"" ], "X-ExtLoop1": "1", "From": "Nicolas Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\tmaxime.coquelin@redhat.com", "Cc": "hernan.vargas@intel.com, stable@dpdk.or,\n Nicolas Chautru <nicolas.chautru@intel.com>, stable@dpdk.org", "Subject": "[PATCH v1 2/9] baseband/acc: add support for 4GUL with SO and TB", "Date": "Thu, 9 Feb 2023 22:19:22 +0000", "Message-Id": "<20230209221929.265059-3-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20230209221929.265059-1-nicolas.chautru@intel.com>", "References": "<20230209221929.265059-1-nicolas.chautru@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implementation to support the case when using LTE\ndecoder with soft output and transport block mode.\n\nFixes: bec597b78a0 (\"baseband/acc200: add LTE processing\")\nCc: stable@dpdk.org\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n drivers/baseband/acc/rte_vrb_pmd.c | 21 +++++++++++----------\n 1 file changed, 11 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c\nindex 797330a5dd..c43c08afe8 100644\n--- a/drivers/baseband/acc/rte_vrb_pmd.c\n+++ b/drivers/baseband/acc/rte_vrb_pmd.c\n@@ -1190,15 +1190,12 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)\n \tfcw->bypass_sb_deint = !check_bit(op->turbo_dec.op_flags,\n \t\t\tRTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE);\n \tif (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {\n-\t\t/* FIXME for TB block */\n+\t\tfcw->c = op->turbo_dec.tb_params.c;\n \t\tfcw->k_pos = op->turbo_dec.tb_params.k_pos;\n-\t\tfcw->k_neg = op->turbo_dec.tb_params.k_neg;\n \t} else {\n+\t\tfcw->c = 1;\n \t\tfcw->k_pos = op->turbo_dec.cb_params.k;\n-\t\tfcw->k_neg = op->turbo_dec.cb_params.k;\n \t}\n-\tfcw->c = 1;\n-\tfcw->c_neg = 1;\n \tif (check_bit(op->turbo_dec.op_flags, RTE_BBDEV_TURBO_SOFT_OUTPUT)) {\n \t\tfcw->soft_output_en = 1;\n \t\tfcw->sw_soft_out_dis = 0;\n@@ -1209,8 +1206,14 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)\n \t\tif (check_bit(op->turbo_dec.op_flags,\n \t\t\t\tRTE_BBDEV_TURBO_EQUALIZER)) {\n \t\t\tfcw->bypass_teq = 0;\n-\t\t\tfcw->ea = op->turbo_dec.cb_params.e;\n-\t\t\tfcw->eb = op->turbo_dec.cb_params.e;\n+\t\t\tif (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {\n+\t\t\t\tfcw->cab = op->turbo_dec.tb_params.cab;\n+\t\t\t\tfcw->ea = op->turbo_dec.tb_params.ea;\n+\t\t\t\tfcw->eb = op->turbo_dec.tb_params.eb;\n+\t\t\t} else {\n+\t\t\t\tfcw->ea = op->turbo_dec.cb_params.e;\n+\t\t\t\tfcw->eb = op->turbo_dec.cb_params.e;\n+\t\t\t}\n \t\t\tif (op->turbo_dec.rv_index == 0)\n \t\t\t\tfcw->k0_start_col = ACC_FCW_TD_RVIDX_0;\n \t\t\telse if (op->turbo_dec.rv_index == 1)\n@@ -1387,9 +1390,7 @@ vrb_dma_desc_td_fill(struct rte_bbdev_dec_op *op,\n \tdesc->numCBs = 1;\n \n \tif (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) {\n-\t\tk = (r < op->turbo_dec.tb_params.c_neg)\n-\t\t\t? op->turbo_dec.tb_params.k_neg\n-\t\t\t: op->turbo_dec.tb_params.k_pos;\n+\t\tk = op->turbo_dec.tb_params.k_pos;\n \t\te = (r < op->turbo_dec.tb_params.cab)\n \t\t\t? op->turbo_dec.tb_params.ea\n \t\t\t: op->turbo_dec.tb_params.eb;\n", "prefixes": [ "v1", "2/9" ] }