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GET /api/patches/121616/?format=api
{ "id": 121616, "url": "https://patches.dpdk.org/api/patches/121616/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230105130304.537205-5-erezsh@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230105130304.537205-5-erezsh@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230105130304.537205-5-erezsh@nvidia.com", "date": "2023-01-05T13:02:57", "name": "[v2,04/10] net/mlx5/hws: read cross-vhca capabilities", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f485b3d6b6527e2af31075fb3a388fef41e82c95", "submitter": { "id": 2911, "url": "https://patches.dpdk.org/api/people/2911/?format=api", "name": "Erez Shitrit", "email": "erezsh@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230105130304.537205-5-erezsh@nvidia.com/mbox/", "series": [ { "id": 26398, "url": "https://patches.dpdk.org/api/series/26398/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26398", "date": "2023-01-05T13:02:53", "name": "Support resource sharing among ibv_devices", "version": 2, "mbox": "https://patches.dpdk.org/series/26398/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/121616/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/121616/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6247BA00C2;\n\tThu, 5 Jan 2023 14:04:03 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DDD3A42D2C;\n\tThu, 5 Jan 2023 14:03:51 +0100 (CET)", "from NAM04-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam04on2087.outbound.protection.outlook.com [40.107.102.87])\n by mails.dpdk.org (Postfix) with ESMTP id F3C4942D29\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Erez Shitrit <erezsh@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<valex@nvidia.com>, <rasland@nvidia.com>, Yevgeny Kliteynik\n <kliteyn@nvidia.com>, Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>", "Subject": "[PATCH v2 04/10] net/mlx5/hws: read cross-vhca capabilities", "Date": "Thu, 5 Jan 2023 15:02:57 +0200", "Message-ID": "<20230105130304.537205-5-erezsh@nvidia.com>", "X-Mailer": "git-send-email 2.18.2", "In-Reply-To": "<20230105130304.537205-1-erezsh@nvidia.com>", "References": "<20221219082416.2223812-3-erezsh@nvidia.com>\n <20230105130304.537205-1-erezsh@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.37]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DM6NAM11FT099:EE_|DS7PR12MB5719:EE_", "X-MS-Office365-Filtering-Correlation-Id": "6160dee6-8c6b-4ca7-cd26-08daef1d4992", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n HBJBZx2SHAQpL5j6txiDJBLDmBsOpTinoE+YewfDdNB2I+Ou2fgttYT2/Wk0ORTRAYc8wO2fE5Yxp4nF6+TpLoYx/j/MjqhcUcG2vkwuMrGcISlBkfvAvETEvfnbJm8vI7lbeNP5CN+lbOyCgBqutjzgKSMD+1GVv/k8sEj8OvHcMdCfh/PF+9g4PC/jqkUwokNM5lmgtrPWkkNachnOWcEQ0JdvHwjie/z/I5yD1HhUSKnydEM0rJofS+m+iH5t78PE0s81VpjPUDmFGdC59ieKoOUT2J6ImuH8vX9rTjupjRL/kPkOdKhgoNEGjqCaXVeoajgm0UjCvLbRYQ42QTV2QsCqrGnr6Kl+cYtA8g9cT0JXQSOhl9x1kfFt/Gc8JYZzZL0VVEKQztObj2kcqpkd1iIazPnJxK1kLruBrgHLbfQCUz0MQe9mPxCqHaXk/YyoRVYRNB+cmi0ZvPko6D32INKy2psB313Jkl3e6g6xBJq+SfuRcacsoO8NerG7J8V/GZhlWdkYz0P0Df2r1r0cNZ/9K2Mn7ogGdALQO+iiz7RJd0EHX4gUW2S+XLZjwd0bEyVAKFch9cV3rG9tztOG1NtSWhGDw6RWPQMOW1BmKC+qIOuCAxTv0e9jya3HdsiKUJRJk073h3PyeekZWkl4NuQspM6Dlj9u9eiWED14erq9/rQmggbEnN2yposIrvILAVeqzD+xPsLKEWs+Yg==", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(136003)(346002)(376002)(39860400002)(396003)(451199015)(46966006)(36840700001)(40470700004)(41300700001)(70586007)(4326008)(6916009)(8676002)(5660300002)(70206006)(2906002)(54906003)(8936002)(316002)(7696005)(6286002)(478600001)(16526019)(6666004)(107886003)(186003)(26005)(336012)(55016003)(86362001)(40480700001)(83380400001)(1076003)(36860700001)(2616005)(426003)(47076005)(82740400003)(7636003)(356005)(36756003)(82310400005)(40460700003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "05 Jan 2023 13:03:49.2075 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 6160dee6-8c6b-4ca7-cd26-08daef1d4992", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT099.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DS7PR12MB5719", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Yevgeny Kliteynik <kliteyn@nvidia.com>\n\n\nAnd keep them for future processing.\n\nSigned-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>\nReviewed-by: Alex Vesker <valex@nvidia.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/net/mlx5/hws/mlx5dr_cmd.c | 24 ++++++++++++++++++++++++\n drivers/net/mlx5/hws/mlx5dr_cmd.h | 1 +\n 2 files changed, 25 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c\nindex 721376b8da..2156fd6643 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c\n@@ -723,6 +723,7 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,\n \tuint32_t in[MLX5_ST_SZ_DW(query_hca_cap_in)] = {0};\n \tconst struct flow_hw_port_info *port_info;\n \tstruct ibv_device_attr_ex attr_ex;\n+\tu32 res;\n \tint ret;\n \n \tMLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);\n@@ -798,6 +799,23 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,\n \t\t\t\t\t\t capability.cmd_hca_cap_2.\n \t\t\t\t\t\t format_select_dw_gtpu_first_ext_dw_0);\n \n+\t/* check cross-VHCA support in cap2 */\n+\tres =\n+\tMLX5_GET(query_hca_cap_out, out,\n+\t\tcapability.cmd_hca_cap_2.cross_vhca_object_to_object_supported);\n+\n+\tcaps->cross_vhca_resources = (res & MLX5_CROSS_VHCA_OBJ_TO_OBJ_TYPE_STC_TO_TIR) &&\n+\t\t\t\t (res & MLX5_CROSS_VHCA_OBJ_TO_OBJ_TYPE_STC_TO_FT) &&\n+\t\t\t\t (res & MLX5_CROSS_VHCA_OBJ_TO_OBJ_TYPE_FT_TO_RTC);\n+\n+\tres =\n+\tMLX5_GET(query_hca_cap_out, out,\n+\t\tcapability.cmd_hca_cap_2.allowed_object_for_other_vhca_access);\n+\n+\tcaps->cross_vhca_resources &= (res & MLX5_CROSS_VHCA_ALLOWED_OBJS_TIR) &&\n+\t\t\t\t (res & MLX5_CROSS_VHCA_ALLOWED_OBJS_FT) &&\n+\t\t\t\t (res & MLX5_CROSS_VHCA_ALLOWED_OBJS_RTC);\n+\n \tMLX5_SET(query_hca_cap_in, in, op_mod,\n \t\t MLX5_GET_HCA_CAP_OP_MOD_NIC_FLOW_TABLE |\n \t\t MLX5_HCA_CAP_OPMOD_GET_CUR);\n@@ -817,6 +835,12 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,\n \t\t\t\t\tcapability.flow_table_nic_cap.\n \t\t\t\t\tflow_table_properties_nic_receive.reparse);\n \n+\t/* check cross-VHCA support in flow table properties */\n+\tres =\n+\tMLX5_GET(query_hca_cap_out, out,\n+\t\tcapability.flow_table_nic_cap.flow_table_properties_nic_receive.cross_vhca_object);\n+\tcaps->cross_vhca_resources &= res;\n+\n \tif (caps->wqe_based_update) {\n \t\tMLX5_SET(query_hca_cap_in, in, op_mod,\n \t\t\t MLX5_GET_HCA_CAP_OP_MOD_WQE_BASED_FLOW_TABLE |\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h\nindex 2b3b47f473..ab61e27fd8 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h\n@@ -163,6 +163,7 @@ struct mlx5dr_cmd_query_caps {\n \tuint8_t sq_ts_format;\n \tuint64_t definer_format_sup;\n \tuint32_t trivial_match_definer;\n+\tbool cross_vhca_resources;\n \tchar fw_ver[64];\n };\n \n", "prefixes": [ "v2", "04/10" ] }