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GET /api/patches/121319/?format=api
{ "id": 121319, "url": "https://patches.dpdk.org/api/patches/121319/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221223015558.3143279-8-mingxia.liu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221223015558.3143279-8-mingxia.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221223015558.3143279-8-mingxia.liu@intel.com", "date": "2022-12-23T01:55:44", "name": "[07/21] net/cpfl: support queue release", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0091d45945f7f8b0ed67bf4fa4c7b323a39296c9", "submitter": { "id": 2514, "url": "https://patches.dpdk.org/api/people/2514/?format=api", "name": "Liu, Mingxia", "email": "mingxia.liu@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221223015558.3143279-8-mingxia.liu@intel.com/mbox/", "series": [ { "id": 26253, "url": "https://patches.dpdk.org/api/series/26253/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26253", "date": "2022-12-23T01:55:37", "name": "add support for cpfl PMD in DPDK", "version": 1, "mbox": "https://patches.dpdk.org/series/26253/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/121319/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/121319/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 99909A0093;\n\tFri, 23 Dec 2022 03:52:27 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9590942D39;\n\tFri, 23 Dec 2022 03:52:01 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by mails.dpdk.org (Postfix) with ESMTP id BBCD642D32\n for <dev@dpdk.org>; Fri, 23 Dec 2022 03:51:58 +0100 (CET)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 Dec 2022 18:51:58 -0800", "from dpdk-mingxial-01.sh.intel.com ([10.67.119.112])\n by orsmga006.jf.intel.com with ESMTP; 22 Dec 2022 18:51:56 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1671763918; x=1703299918;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=BXJ6UbE0kdFxrH6Y25Cw7h6hXSBtwWbyCte/+VjIg7k=;\n b=UOMi42tlXBDJP1c4UkrRNHEX0f6aOLr9QUg/oM/EkRYFi/bwxqS1niFE\n 0cxZPSdnma+9AT97nVyAJu7GcugS7tad5p8mEeWxb/EqFM274DuAR0wwi\n AQ+UgVos3uYnKZAVsHDhYI1SEovb7f8slb2+wyfwLk0ABjkhbGclmsBbC\n il1SiMBTiKPo47xAWehhdJCIRhN0Uf8PWR33n/a7q9ejuxsglP7Zwmv0K\n uCziZ1qxhQwv6M4ocbtGYJqXG0vwkJvsJCUslWemLFsMuiJivDNnioHoZ\n 0WnHMZoJo5RpXRdw9Fh4uA694m9rFKCu8X0GKV9NeOGmEe9klHRB6cZVL Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10569\"; a=\"321467104\"", "E=Sophos;i=\"5.96,267,1665471600\"; d=\"scan'208\";a=\"321467104\"", "E=McAfee;i=\"6500,9779,10569\"; a=\"629707162\"", "E=Sophos;i=\"5.96,267,1665471600\"; d=\"scan'208\";a=\"629707162\"" ], "X-ExtLoop1": "1", "From": "Mingxia Liu <mingxia.liu@intel.com>", "To": "dev@dpdk.org", "Cc": "jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com,\n Mingxia Liu <mingxia.liu@intel.com>", "Subject": "[PATCH 07/21] net/cpfl: support queue release", "Date": "Fri, 23 Dec 2022 01:55:44 +0000", "Message-Id": "<20221223015558.3143279-8-mingxia.liu@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221223015558.3143279-1-mingxia.liu@intel.com>", "References": "<20221223015558.3143279-1-mingxia.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for queue operations:\n - rx_queue_release\n - tx_queue_release\n\nSigned-off-by: Mingxia Liu <mingxia.liu@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c | 2 ++\n drivers/net/cpfl/cpfl_rxtx.c | 35 ++++++++++++++++++++++++++++++++++\n drivers/net/cpfl/cpfl_rxtx.h | 2 ++\n 3 files changed, 39 insertions(+)", "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex 4332f66ed6..be3cac3b27 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -632,6 +632,8 @@ static const struct eth_dev_ops cpfl_eth_dev_ops = {\n \t.tx_queue_start\t\t\t= cpfl_tx_queue_start,\n \t.rx_queue_stop\t\t\t= cpfl_rx_queue_stop,\n \t.tx_queue_stop\t\t\t= cpfl_tx_queue_stop,\n+\t.rx_queue_release\t\t= cpfl_dev_rx_queue_release,\n+\t.tx_queue_release\t\t= cpfl_dev_tx_queue_release,\n \t.dev_supported_ptypes_get\t= cpfl_dev_supported_ptypes_get,\n };\n \ndiff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c\nindex b7d616de4f..a10deb6c96 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.c\n+++ b/drivers/net/cpfl/cpfl_rxtx.c\n@@ -49,6 +49,14 @@ cpfl_tx_offload_convert(uint64_t offload)\n \treturn ol;\n }\n \n+static const struct idpf_rxq_ops def_rxq_ops = {\n+\t.release_mbufs = release_rxq_mbufs,\n+};\n+\n+static const struct idpf_txq_ops def_txq_ops = {\n+\t.release_mbufs = release_txq_mbufs,\n+};\n+\n static const struct rte_memzone *\n cpfl_dma_zone_reserve(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\t uint16_t len, uint16_t queue_type,\n@@ -177,6 +185,7 @@ cpfl_rx_split_bufq_setup(struct rte_eth_dev *dev, struct idpf_rx_queue *rxq,\n \treset_split_rx_bufq(bufq);\n \tbufq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_buf_qtail_start +\n \t\t\t queue_idx * vport->chunks_info.rx_buf_qtail_spacing);\n+\tbufq->ops = &def_rxq_ops;\n \tbufq->q_set = true;\n \n \tif (bufq_id == 1) {\n@@ -235,6 +244,12 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \tif (check_rx_thresh(nb_desc, rx_free_thresh) != 0)\n \t\treturn -EINVAL;\n \n+\t/* Free memory if needed */\n+\tif (dev->data->rx_queues[queue_idx] != NULL) {\n+\t\tidpf_rx_queue_release(dev->data->rx_queues[queue_idx]);\n+\t\tdev->data->rx_queues[queue_idx] = NULL;\n+\t}\n+\n \t/* Setup Rx queue */\n \trxq = rte_zmalloc_socket(\"cpfl rxq\",\n \t\t\t\t sizeof(struct idpf_rx_queue),\n@@ -287,6 +302,7 @@ cpfl_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\treset_single_rx_queue(rxq);\n \t\trxq->qrx_tail = hw->hw_addr + (vport->chunks_info.rx_qtail_start +\n \t\t\t\tqueue_idx * vport->chunks_info.rx_qtail_spacing);\n+\t\trxq->ops = &def_rxq_ops;\n \t} else {\n \t\treset_split_rx_descq(rxq);\n \n@@ -399,6 +415,12 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \tif (check_tx_thresh(nb_desc, tx_rs_thresh, tx_free_thresh) != 0)\n \t\treturn -EINVAL;\n \n+\t/* Free memory if needed. */\n+\tif (dev->data->tx_queues[queue_idx] != NULL) {\n+\t\tidpf_tx_queue_release(dev->data->tx_queues[queue_idx]);\n+\t\tdev->data->tx_queues[queue_idx] = NULL;\n+\t}\n+\n \t/* Allocate the TX queue data structure. */\n \ttxq = rte_zmalloc_socket(\"cpfl txq\",\n \t\t\t\t sizeof(struct idpf_tx_queue),\n@@ -461,6 +483,7 @@ cpfl_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \n \ttxq->qtx_tail = hw->hw_addr + (vport->chunks_info.tx_qtail_start +\n \t\t\tqueue_idx * vport->chunks_info.tx_qtail_spacing);\n+\ttxq->ops = &def_txq_ops;\n \ttxq->q_set = true;\n \tdev->data->tx_queues[queue_idx] = txq;\n \n@@ -674,6 +697,18 @@ cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \treturn 0;\n }\n \n+void\n+cpfl_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid)\n+{\n+\tidpf_rx_queue_release(dev->data->rx_queues[qid]);\n+}\n+\n+void\n+cpfl_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)\n+{\n+\tidpf_tx_queue_release(dev->data->tx_queues[qid]);\n+}\n+\n void\n cpfl_stop_queues(struct rte_eth_dev *dev)\n {\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h\nindex 6b63137d5c..037d479d56 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.h\n+++ b/drivers/net/cpfl/cpfl_rxtx.h\n@@ -35,4 +35,6 @@ int cpfl_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n void cpfl_stop_queues(struct rte_eth_dev *dev);\n int cpfl_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n int cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n+void cpfl_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);\n+void cpfl_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);\n #endif /* _CPFL_RXTX_H_ */\n", "prefixes": [ "07/21" ] }