Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/121104/?format=api
{ "id": 121104, "url": "https://patches.dpdk.org/api/patches/121104/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221220192645.14042-7-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221220192645.14042-7-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221220192645.14042-7-syalavarthi@marvell.com", "date": "2022-12-20T19:26:13", "name": "[v3,06/38] ml/cnxk: parse ML firmware path from device args", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fd31eea928445bf73f3bd9f1df6a098311f8f401", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221220192645.14042-7-syalavarthi@marvell.com/mbox/", "series": [ { "id": 26199, "url": "https://patches.dpdk.org/api/series/26199/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26199", "date": "2022-12-20T19:26:07", "name": "Implementation of ML CNXK driver", "version": 3, "mbox": "https://patches.dpdk.org/series/26199/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/121104/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/121104/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 637E4A0545;\n\tTue, 20 Dec 2022 20:27:24 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C3B7B42D2A;\n\tTue, 20 Dec 2022 20:26:59 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 71C6E40F18\n for <dev@dpdk.org>; Tue, 20 Dec 2022 20:26:55 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2BKHLnB3015476 for <dev@dpdk.org>; Tue, 20 Dec 2022 11:26:54 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3mkapj2tpp-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 20 Dec 2022 11:26:54 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Tue, 20 Dec 2022 11:26:52 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Tue, 20 Dec 2022 11:26:52 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 66FFD3F70A8;\n Tue, 20 Dec 2022 11:26:52 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=ZBR2O9eEnESmeEdhe0HipmF4kNQWoonvo1K4+AydPig=;\n b=CbCJZAJG79E+6rcdHgD9533OLTZzX8Jr8o06iFxSG089Mzk1ZW6XGzVWvUYBo+IcRm1T\n jptgfPVEJkO8WMEXFfwyoE9PbBo6RiLpEkqvPXjteKA4UByObafLzvcPvavhcNWYAdKS\n 9LomGYtIvNf8TdWVDbktPpSDWavWG/jxpiSQygA0/t5zKJhCMssG3EbbXtVLD65U11KQ\n ypQEw50YCga419FKiW5UG1THq4rjR7BNW1HW4e403/nZq9Cmo2lq0Pg2OBW6OodpBjFf\n zRMAev9MRNCI0scDA5QwNERuwxNBHdPiOhnn6APx8yw4m+v1ad9g1AnpNYV54VxqPI4j TA==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>", "Subject": "[PATCH v3 06/38] ml/cnxk: parse ML firmware path from device args", "Date": "Tue, 20 Dec 2022 11:26:13 -0800", "Message-ID": "<20221220192645.14042-7-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20221220192645.14042-1-syalavarthi@marvell.com>", "References": "<20221208201806.21893-1-syalavarthi@marvell.com>\n <20221220192645.14042-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "kmP_QBUuXCFnWFfUkT7b5GiwRquY2hWx", "X-Proofpoint-GUID": "kmP_QBUuXCFnWFfUkT7b5GiwRquY2hWx", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-20_06,2022-12-20_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Enabled parsing ML firmware path for cn10k. Default path is set\nas \"/lib/firmware/mlip-fw.bin\", when args are not provided. Added\ninternal structures for ML firmware.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_dev.c | 71 ++++++++++++++++++++++++++++++++++\n drivers/ml/cnxk/cn10k_ml_dev.h | 12 ++++++\n drivers/ml/cnxk/meson.build | 2 +-\n 3 files changed, 84 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_dev.c b/drivers/ml/cnxk/cn10k_ml_dev.c\nindex fd45226add..117cac43aa 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.c\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.c\n@@ -4,6 +4,8 @@\n \n #include <rte_common.h>\n #include <rte_dev.h>\n+#include <rte_devargs.h>\n+#include <rte_kvargs.h>\n #include <rte_mldev.h>\n #include <rte_mldev_pmd.h>\n #include <rte_pci.h>\n@@ -13,9 +15,70 @@\n #include \"cn10k_ml_dev.h\"\n #include \"cn10k_ml_ops.h\"\n \n+#define CN10K_ML_FW_PATH \"fw_path\"\n+\n+#define CN10K_ML_FW_PATH_DEFAULT \"/lib/firmware/mlip-fw.bin\"\n+\n+static const char *const valid_args[] = {CN10K_ML_FW_PATH, NULL};\n+\n /* Dummy operations for ML device */\n struct rte_ml_dev_ops ml_dev_dummy_ops = {0};\n \n+static int\n+parse_string_arg(const char *key __rte_unused, const char *value, void *extra_args)\n+{\n+\tif (value == NULL || extra_args == NULL)\n+\t\treturn -EINVAL;\n+\n+\t*(char **)extra_args = strdup(value);\n+\n+\tif (!*(char **)extra_args)\n+\t\treturn -ENOMEM;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_mldev_parse_devargs(struct rte_devargs *devargs, struct cn10k_ml_dev *mldev)\n+{\n+\tstruct rte_kvargs *kvlist = NULL;\n+\tbool fw_path_set = false;\n+\tchar *fw_path = NULL;\n+\tint ret = 0;\n+\n+\tif (devargs == NULL)\n+\t\tgoto check_args;\n+\n+\tkvlist = rte_kvargs_parse(devargs->args, valid_args);\n+\tif (kvlist == NULL) {\n+\t\tplt_err(\"Error parsing devargs\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (rte_kvargs_count(kvlist, CN10K_ML_FW_PATH) == 1) {\n+\t\tret = rte_kvargs_process(kvlist, CN10K_ML_FW_PATH, &parse_string_arg, &fw_path);\n+\t\tif (ret < 0) {\n+\t\t\tplt_err(\"Error processing arguments, key = %s\\n\", CN10K_ML_FW_PATH);\n+\t\t\tret = -EINVAL;\n+\t\t\tgoto exit;\n+\t\t}\n+\t\tfw_path_set = true;\n+\t}\n+\n+check_args:\n+\tif (!fw_path_set)\n+\t\tmldev->fw.path = CN10K_ML_FW_PATH_DEFAULT;\n+\telse\n+\t\tmldev->fw.path = fw_path;\n+\tplt_info(\"ML: %s = %s\", CN10K_ML_FW_PATH, mldev->fw.path);\n+\n+exit:\n+\tif (kvlist)\n+\t\trte_kvargs_free(kvlist);\n+\n+\treturn ret;\n+}\n+\n static int\n cn10k_ml_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n {\n@@ -49,6 +112,12 @@ cn10k_ml_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_de\n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n \t\tmldev->roc.pci_dev = pci_dev;\n \n+\t\tret = cn10k_mldev_parse_devargs(dev->device->devargs, mldev);\n+\t\tif (ret) {\n+\t\t\tplt_err(\"Failed to parse devargs ret = %d\", ret);\n+\t\t\tgoto pmd_destroy;\n+\t\t}\n+\n \t\tret = roc_ml_dev_init(&mldev->roc);\n \t\tif (ret) {\n \t\t\tplt_err(\"Failed to initialize ML ROC, ret = %d\", ret);\n@@ -122,3 +191,5 @@ static struct rte_pci_driver cn10k_mldev_pmd = {\n RTE_PMD_REGISTER_PCI(MLDEV_NAME_CN10K_PMD, cn10k_mldev_pmd);\n RTE_PMD_REGISTER_PCI_TABLE(MLDEV_NAME_CN10K_PMD, pci_id_ml_table);\n RTE_PMD_REGISTER_KMOD_DEP(MLDEV_NAME_CN10K_PMD, \"vfio-pci\");\n+\n+RTE_PMD_REGISTER_PARAM_STRING(MLDEV_NAME_CN10K_PMD, CN10K_ML_FW_PATH \"=<path>\");\ndiff --git a/drivers/ml/cnxk/cn10k_ml_dev.h b/drivers/ml/cnxk/cn10k_ml_dev.h\nindex e7fb5fc2e2..5333566cff 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.h\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.h\n@@ -43,6 +43,15 @@ enum cn10k_ml_dev_state {\n \tML_CN10K_DEV_STATE_CLOSED\n };\n \n+/* ML firmware structure */\n+struct cn10k_ml_fw {\n+\t/* Device reference */\n+\tstruct cn10k_ml_dev *mldev;\n+\n+\t/* Firmware file path */\n+\tconst char *path;\n+};\n+\n /* Device private data */\n struct cn10k_ml_dev {\n \t/* Device ROC */\n@@ -50,6 +59,9 @@ struct cn10k_ml_dev {\n \n \t/* Configuration state */\n \tenum cn10k_ml_dev_state state;\n+\n+\t/* Firmware */\n+\tstruct cn10k_ml_fw fw;\n };\n \n #endif /* _CN10K_ML_DEV_H_ */\ndiff --git a/drivers/ml/cnxk/meson.build b/drivers/ml/cnxk/meson.build\nindex aff65a082f..87b7fc3f2a 100644\n--- a/drivers/ml/cnxk/meson.build\n+++ b/drivers/ml/cnxk/meson.build\n@@ -17,7 +17,7 @@ sources = files(\n 'cn10k_ml_ops.c',\n )\n \n-deps += ['mldev', 'common_ml', 'common_cnxk']\n+deps += ['mldev', 'common_ml', 'common_cnxk', 'kvargs']\n \n if get_option('buildtype').contains('debug')\n cflags += [ '-DCNXK_ML_DEV_DEBUG' ]\n", "prefixes": [ "v3", "06/38" ] }