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GET /api/patches/121088/?format=api
{ "id": 121088, "url": "https://patches.dpdk.org/api/patches/121088/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221220143232.2519650-15-ktejasree@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221220143232.2519650-15-ktejasree@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221220143232.2519650-15-ktejasree@marvell.com", "date": "2022-12-20T14:32:29", "name": "[14/17] crypto/cnxk: add CTX for non IPsec operations", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7e0e38508e5178204845f6fdd27c5080aab05f9a", "submitter": { "id": 1789, "url": "https://patches.dpdk.org/api/people/1789/?format=api", "name": "Tejasree Kondoj", "email": "ktejasree@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221220143232.2519650-15-ktejasree@marvell.com/mbox/", "series": [ { "id": 26195, "url": "https://patches.dpdk.org/api/series/26195/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26195", "date": "2022-12-20T14:32:15", "name": "fixes and improvements to cnxk crytpo PMD", "version": 1, "mbox": "https://patches.dpdk.org/series/26195/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/121088/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/121088/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C3175A0545;\n\tTue, 20 Dec 2022 15:34:20 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BA13642D5D;\n\tTue, 20 Dec 2022 15:33:19 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 12FCC40E6E\n for <dev@dpdk.org>; Tue, 20 Dec 2022 15:33:17 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2BKEObIW019239 for <dev@dpdk.org>; Tue, 20 Dec 2022 06:33:17 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3mhe5rnb5s-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 20 Dec 2022 06:33:17 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Tue, 20 Dec 2022 06:33:14 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Tue, 20 Dec 2022 06:33:14 -0800", "from hyd1554.marvell.com (unknown [10.29.57.11])\n by maili.marvell.com (Postfix) with ESMTP id 7DECC3F7063;\n Tue, 20 Dec 2022 06:33:12 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=KAA8k9xQ9vy67kwSIx2WyUl+mVAr3Syy5+01rE2uHfs=;\n b=Gqd9dqcOR9cDnDy7CYSiPGx917LHMpXsWtdduadqWoYExqLdEstAO09RxnNje5syHWBZ\n yo1LYBDRRybd7FBRl6cMj6sOq+j1Z2hM+5/3eOBxoW2EM3oaEjNxGFOr5TtYKCzljBEr\n NbmrXXPj6Pb/F0Frm0H87aBQEBCjUVYAzVWn/uO76fLYkCqabKg0X08w3HFKJgorp+mR\n j7ghjwsLggJUnDNLhyYpdf7ajgOwkiaa3a6Y08TRgVBQat7UDmhO7u1OsloXJI17/zsL\n h4lSkj634kP+akh7mjoRFZcPV2HI1qSuejdFrhSnIAZEs/oKs/f3DgTNsayoavDQ/PGj Ew==", "From": "Tejasree Kondoj <ktejasree@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>", "CC": "Anoob Joseph <anoobj@marvell.com>, Vidya Sagar Velumuri\n <vvelumuri@marvell.com>, Gowrishankar Muthukrishnan\n <gmuthukrishn@marvell.com>, Volodymyr Fialko <vfialko@marvell.com>, \"Aakash\n Sasidharan\" <asasidharan@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 14/17] crypto/cnxk: add CTX for non IPsec operations", "Date": "Tue, 20 Dec 2022 20:02:29 +0530", "Message-ID": "<20221220143232.2519650-15-ktejasree@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221220143232.2519650-1-ktejasree@marvell.com>", "References": "<20221220143232.2519650-1-ktejasree@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "rveCv-FwVBHqeZUcoTOG_kpUjNa-ZoSU", "X-Proofpoint-ORIG-GUID": "rveCv-FwVBHqeZUcoTOG_kpUjNa-ZoSU", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-20_05,2022-12-20_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Support context cache with non IPsec operations.\n\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/common/cnxk/roc_platform.h | 3 +-\n drivers/common/cnxk/roc_se.c | 47 +++++++++++++++++++++++\n drivers/common/cnxk/roc_se.h | 42 +++++++++++++-------\n drivers/common/cnxk/version.map | 1 +\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 17 ++++----\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 14 +++----\n drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 38 +++++++++++++-----\n drivers/crypto/cnxk/cnxk_cryptodev_ops.h | 13 +++----\n drivers/crypto/cnxk/cnxk_se.h | 10 +++--\n 9 files changed, 134 insertions(+), 51 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h\nindex 1a48ff3db4..8ba28e69fa 100644\n--- a/drivers/common/cnxk/roc_platform.h\n+++ b/drivers/common/cnxk/roc_platform.h\n@@ -57,9 +57,10 @@\n #define PLT_ALIGN\t\t RTE_ALIGN\n #define PLT_ALIGN_MUL_CEIL\t RTE_ALIGN_MUL_CEIL\n #define PLT_MODEL_MZ_NAME\t \"roc_model_mz\"\n-#define PLT_CACHE_LINE_SIZE RTE_CACHE_LINE_SIZE\n+#define PLT_CACHE_LINE_SIZE\t RTE_CACHE_LINE_SIZE\n #define BITMASK_ULL\t\t GENMASK_ULL\n #define PLT_ALIGN_CEIL\t\t RTE_ALIGN_CEIL\n+#define PLT_ALIGN_FLOOR\t\t RTE_ALIGN_FLOOR\n #define PLT_INIT\t\t RTE_INIT\n #define PLT_MAX_ETHPORTS\t RTE_MAX_ETHPORTS\n #define PLT_TAILQ_FOREACH_SAFE\t RTE_TAILQ_FOREACH_SAFE\ndiff --git a/drivers/common/cnxk/roc_se.c b/drivers/common/cnxk/roc_se.c\nindex aba7f9416d..8c19c5fccc 100644\n--- a/drivers/common/cnxk/roc_se.c\n+++ b/drivers/common/cnxk/roc_se.c\n@@ -726,3 +726,50 @@ roc_se_ctx_swap(struct roc_se_ctx *se_ctx)\n \n \tzs_ctx->zuc.otk_ctx.w0.u64 = htobe64(zs_ctx->zuc.otk_ctx.w0.u64);\n }\n+\n+void\n+roc_se_ctx_init(struct roc_se_ctx *roc_se_ctx)\n+{\n+\tstruct se_ctx_s *ctx = &roc_se_ctx->se_ctx;\n+\tuint64_t ctx_len, *uc_ctx;\n+\tuint8_t i;\n+\n+\tswitch (roc_se_ctx->fc_type) {\n+\tcase ROC_SE_FC_GEN:\n+\t\tctx_len = sizeof(struct roc_se_context);\n+\t\tbreak;\n+\tcase ROC_SE_PDCP:\n+\t\tctx_len = sizeof(struct roc_se_zuc_snow3g_ctx);\n+\t\tbreak;\n+\tcase ROC_SE_KASUMI:\n+\t\tctx_len = sizeof(struct roc_se_kasumi_ctx);\n+\t\tbreak;\n+\tcase ROC_SE_PDCP_CHAIN:\n+\t\tctx_len = sizeof(struct roc_se_zuc_snow3g_chain_ctx);\n+\t\tbreak;\n+\tdefault:\n+\t\tctx_len = 0;\n+\t}\n+\n+\tctx_len = PLT_ALIGN_CEIL(ctx_len, 8);\n+\n+\t/* Skip w0 for swap */\n+\tuc_ctx = PLT_PTR_ADD(ctx, sizeof(ctx->w0));\n+\tfor (i = 0; i < (ctx_len / 8); i++)\n+\t\tuc_ctx[i] = plt_cpu_to_be_64(((uint64_t *)uc_ctx)[i]);\n+\n+\t/* Include w0 */\n+\tctx_len += sizeof(ctx->w0);\n+\tctx_len = PLT_ALIGN_CEIL(ctx_len, 8);\n+\n+\tctx->w0.s.aop_valid = 1;\n+\tctx->w0.s.ctx_hdr_size = 0;\n+\n+\tctx->w0.s.ctx_size = PLT_ALIGN_FLOOR(ctx_len, 128);\n+\tif (ctx->w0.s.ctx_size == 0)\n+\t\tctx->w0.s.ctx_size = 1;\n+\n+\tctx->w0.s.ctx_push_size = ctx_len / 8;\n+\tif (ctx->w0.s.ctx_push_size > 32)\n+\t\tctx->w0.s.ctx_push_size = 32;\n+}\ndiff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h\nindex a8f0f49479..d1ef71577c 100644\n--- a/drivers/common/cnxk/roc_se.h\n+++ b/drivers/common/cnxk/roc_se.h\n@@ -300,14 +300,31 @@ struct roc_se_ctx {\n \tuint64_t rsvd : 17;\n \tunion cpt_inst_w4 template_w4;\n \t/* Below fields are accessed by hardware */\n-\tunion {\n-\t\tstruct roc_se_context fctx;\n-\t\tstruct roc_se_zuc_snow3g_ctx zs_ctx;\n-\t\tstruct roc_se_zuc_snow3g_chain_ctx zs_ch_ctx;\n-\t\tstruct roc_se_kasumi_ctx k_ctx;\n-\t} se_ctx;\n+\tstruct se_ctx_s {\n+\t\t/* Word0 */\n+\t\tunion {\n+\t\t\tstruct {\n+\t\t\t\tuint64_t rsvd : 48;\n+\n+\t\t\t\tuint64_t ctx_push_size : 7;\n+\t\t\t\tuint64_t rsvd1 : 1;\n+\n+\t\t\t\tuint64_t ctx_hdr_size : 2;\n+\t\t\t\tuint64_t aop_valid : 1;\n+\t\t\t\tuint64_t rsvd2 : 1;\n+\t\t\t\tuint64_t ctx_size : 4;\n+\t\t\t} s;\n+\t\t\tuint64_t u64;\n+\t\t} w0;\n+\t\tunion {\n+\t\t\tstruct roc_se_context fctx;\n+\t\t\tstruct roc_se_zuc_snow3g_ctx zs_ctx;\n+\t\t\tstruct roc_se_zuc_snow3g_chain_ctx zs_ch_ctx;\n+\t\t\tstruct roc_se_kasumi_ctx k_ctx;\n+\t\t};\n+\t} se_ctx __plt_aligned(ROC_ALIGN);\n \tuint8_t *auth_key;\n-};\n+} __plt_aligned(ROC_ALIGN);\n \n struct roc_se_fc_params {\n \tunion {\n@@ -349,14 +366,13 @@ roc_se_zuc_bytes_swap(uint8_t *arr, int len)\n \t}\n }\n \n-int __roc_api roc_se_auth_key_set(struct roc_se_ctx *se_ctx,\n-\t\t\t\t roc_se_auth_type type, const uint8_t *key,\n-\t\t\t\t uint16_t key_len, uint16_t mac_len);\n+int __roc_api roc_se_auth_key_set(struct roc_se_ctx *se_ctx, roc_se_auth_type type,\n+\t\t\t\t const uint8_t *key, uint16_t key_len, uint16_t mac_len);\n \n-int __roc_api roc_se_ciph_key_set(struct roc_se_ctx *se_ctx,\n-\t\t\t\t roc_se_cipher_type type, const uint8_t *key,\n-\t\t\t\t uint16_t key_len, uint8_t *salt);\n+int __roc_api roc_se_ciph_key_set(struct roc_se_ctx *se_ctx, roc_se_cipher_type type,\n+\t\t\t\t const uint8_t *key, uint16_t key_len, uint8_t *salt);\n \n void __roc_api roc_se_ctx_swap(struct roc_se_ctx *se_ctx);\n+void __roc_api roc_se_ctx_init(struct roc_se_ctx *se_ctx);\n \n #endif /* __ROC_SE_H__ */\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 17f0ec6b48..ee283d2392 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -99,6 +99,7 @@ INTERNAL {\n \troc_model;\n \troc_se_auth_key_set;\n \troc_se_ciph_key_set;\n+\troc_se_ctx_init;\n \troc_nix_bpf_alloc;\n \troc_nix_bpf_config;\n \troc_nix_bpf_connect;\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 5a098ffcf2..57b44210c2 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -52,14 +52,13 @@ cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)\n \tif (rte_mempool_get(qp->sess_mp, (void **)&sess) < 0)\n \t\treturn NULL;\n \n-\tret = sym_session_configure(qp->lf.roc_cpt, sym_op->xform,\n-\t\t\t\t sess);\n+\tret = sym_session_configure(qp->lf.roc_cpt, sym_op->xform, sess, true);\n \tif (ret) {\n \t\trte_mempool_put(qp->sess_mp, (void *)sess);\n \t\tgoto sess_put;\n \t}\n \n-\tpriv = (void *)sess->driver_priv_data;\n+\tpriv = (void *)sess;\n \tsym_op->session = sess;\n \n \treturn priv;\n@@ -121,13 +120,13 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct\n \n \tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n \t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n-\t\t\tsec_sess = (struct cn10k_sec_session *)(sym_op->session);\n+\t\t\tsec_sess = (struct cn10k_sec_session *)sym_op->session;\n \t\t\tret = cpt_sec_inst_fill(qp, op, sec_sess, &inst[0]);\n \t\t\tif (unlikely(ret))\n \t\t\t\treturn 0;\n \t\t\tw7 = sec_sess->inst.w7;\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\t\tsess = CRYPTODEV_GET_SYM_SESS_PRIV(sym_op->session);\n+\t\t\tsess = (struct cnxk_se_sess *)(sym_op->session);\n \t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, &inst[0], is_sg_ver2);\n \t\t\tif (unlikely(ret))\n \t\t\t\treturn 0;\n@@ -141,7 +140,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct\n \n \t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, &inst[0], is_sg_ver2);\n \t\t\tif (unlikely(ret)) {\n-\t\t\t\tsym_session_clear(op->sym->session);\n+\t\t\t\tsym_session_clear(op->sym->session, true);\n \t\t\t\trte_mempool_put(qp->sess_mp, op->sym->session);\n \t\t\t\treturn 0;\n \t\t\t}\n@@ -316,7 +315,7 @@ cn10k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused, vo\n \t\t} else if (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \n-\t\t\tpriv = CRYPTODEV_GET_SYM_SESS_PRIV(sess);\n+\t\t\tpriv = (struct cnxk_se_sess *)sess;\n \t\t\tpriv->qp = qp;\n \t\t\tpriv->cpt_inst_w2 = w2;\n \t\t} else\n@@ -351,7 +350,7 @@ cn10k_ca_meta_info_extract(struct rte_crypto_op *op, struct cnxk_cpt_qp **qp, ui\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \n-\t\t\tpriv = CRYPTODEV_GET_SYM_SESS_PRIV(op->sym->session);\n+\t\t\tpriv = (struct cnxk_se_sess *)op->sym->session;\n \t\t\t*qp = priv->qp;\n \t\t\t*w2 = priv->cpt_inst_w2;\n \t\t} else {\n@@ -914,7 +913,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n temp_sess_free:\n \tif (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {\n \t\tif (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n-\t\t\tsym_session_clear(cop->sym->session);\n+\t\t\tsym_session_clear(cop->sym->session, true);\n \t\t\trte_mempool_put(qp->sess_mp, cop->sym->session);\n \t\t\tcop->sym->session = NULL;\n \t\t}\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex cfe1e08dff..e3784e34c9 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -49,11 +49,11 @@ cn9k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)\n \tif (rte_mempool_get(qp->sess_mp, (void **)&sess) < 0)\n \t\treturn NULL;\n \n-\tret = sym_session_configure(qp->lf.roc_cpt, sym_op->xform, sess);\n+\tret = sym_session_configure(qp->lf.roc_cpt, sym_op->xform, sess, true);\n \tif (ret)\n \t\tgoto sess_put;\n \n-\tpriv = CRYPTODEV_GET_SYM_SESS_PRIV(sess);\n+\tpriv = (struct cnxk_se_sess *)sess;\n \n \tsym_op->session = sess;\n \n@@ -76,7 +76,7 @@ cn9k_cpt_inst_prep(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \n \t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tsym_op = op->sym;\n-\t\t\tsess = CRYPTODEV_GET_SYM_SESS_PRIV(sym_op->session);\n+\t\t\tsess = (struct cnxk_se_sess *)sym_op->session;\n \t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, inst, false);\n \t\t\tinst->w7.u64 = sess->cpt_inst_w7;\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)\n@@ -90,7 +90,7 @@ cn9k_cpt_inst_prep(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \n \t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, inst, false);\n \t\t\tif (unlikely(ret)) {\n-\t\t\t\tsym_session_clear(op->sym->session);\n+\t\t\t\tsym_session_clear(op->sym->session, true);\n \t\t\t\trte_mempool_put(qp->sess_mp, op->sym->session);\n \t\t\t}\n \t\t\tinst->w7.u64 = sess->cpt_inst_w7;\n@@ -326,7 +326,7 @@ cn9k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n \t\t} else if (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \n-\t\t\tpriv = CRYPTODEV_GET_SYM_SESS_PRIV(sess);\n+\t\t\tpriv = (struct cnxk_se_sess *)sess;\n \t\t\tpriv->qp = qp;\n \t\t\tpriv->cpt_inst_w2 = w2;\n \t\t} else\n@@ -361,7 +361,7 @@ cn9k_ca_meta_info_extract(struct rte_crypto_op *op,\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \n-\t\t\tpriv = CRYPTODEV_GET_SYM_SESS_PRIV(op->sym->session);\n+\t\t\tpriv = (struct cnxk_se_sess *)op->sym->session;\n \t\t\t*qp = priv->qp;\n \t\t\tinst->w2.u64 = priv->cpt_inst_w2;\n \t\t} else {\n@@ -630,7 +630,7 @@ cn9k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, struct rte_crypto_op *cop,\n temp_sess_free:\n \tif (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {\n \t\tif (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n-\t\t\tsym_session_clear(cop->sym->session);\n+\t\t\tsym_session_clear(cop->sym->session, true);\n \t\t\trte_mempool_put(qp->sess_mp, cop->sym->session);\n \t\t\tcop->sym->session = NULL;\n \t\t}\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\nindex 92e8755671..2e845afce9 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n@@ -626,6 +626,11 @@ cnxk_cpt_inst_w7_get(struct cnxk_se_sess *sess, struct roc_cpt *roc_cpt)\n \n \tinst_w7.s.cptr = (uint64_t)&sess->roc_se_ctx.se_ctx;\n \n+\tif (roc_cpt->cpt_revision == ROC_CPT_REVISION_ID_106XX)\n+\t\tinst_w7.s.ctx_val = 1;\n+\telse\n+\t\tinst_w7.s.cptr += 8;\n+\n \t/* Set the engine group */\n \tif (sess->zsk_flag || sess->aes_ctr_eea2 || sess->is_sha3)\n \t\tinst_w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_SE];\n@@ -636,19 +641,22 @@ cnxk_cpt_inst_w7_get(struct cnxk_se_sess *sess, struct roc_cpt *roc_cpt)\n }\n \n int\n-sym_session_configure(struct roc_cpt *roc_cpt,\n-\t\t struct rte_crypto_sym_xform *xform,\n-\t\t struct rte_cryptodev_sym_session *sess)\n+sym_session_configure(struct roc_cpt *roc_cpt, struct rte_crypto_sym_xform *xform,\n+\t\t struct rte_cryptodev_sym_session *sess, bool is_session_less)\n {\n \tenum cpt_dp_thread_type thr_type;\n-\tstruct cnxk_se_sess *sess_priv = CRYPTODEV_GET_SYM_SESS_PRIV(sess);\n+\tstruct cnxk_se_sess *sess_priv = (struct cnxk_se_sess *)sess;\n \tint ret;\n \n-\tmemset(sess_priv, 0, sizeof(struct cnxk_se_sess));\n+\tif (is_session_less)\n+\t\tmemset(sess_priv, 0, sizeof(struct cnxk_se_sess));\n+\n \tret = cnxk_sess_fill(roc_cpt, xform, sess_priv);\n \tif (ret)\n \t\tgoto priv_put;\n \n+\tsess_priv->lf = roc_cpt->lf[0];\n+\n \tif (sess_priv->cpt_op & ROC_SE_OP_CIPHER_MASK) {\n \t\tswitch (sess_priv->roc_se_ctx.fc_type) {\n \t\tcase ROC_SE_FC_GEN:\n@@ -690,6 +698,10 @@ sym_session_configure(struct roc_cpt *roc_cpt,\n \t}\n \n \tsess_priv->cpt_inst_w7 = cnxk_cpt_inst_w7_get(sess_priv, roc_cpt);\n+\n+\tif (roc_cpt->cpt_revision == ROC_CPT_REVISION_ID_106XX)\n+\t\troc_se_ctx_init(&sess_priv->roc_se_ctx);\n+\n \treturn 0;\n \n priv_put:\n@@ -704,25 +716,31 @@ cnxk_cpt_sym_session_configure(struct rte_cryptodev *dev,\n \tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n \tstruct roc_cpt *roc_cpt = &vf->cpt;\n \n-\treturn sym_session_configure(roc_cpt, xform, sess);\n+\treturn sym_session_configure(roc_cpt, xform, sess, false);\n }\n \n void\n-sym_session_clear(struct rte_cryptodev_sym_session *sess)\n+sym_session_clear(struct rte_cryptodev_sym_session *sess, bool is_session_less)\n {\n-\tstruct cnxk_se_sess *sess_priv = CRYPTODEV_GET_SYM_SESS_PRIV(sess);\n+\tstruct cnxk_se_sess *sess_priv = (struct cnxk_se_sess *)sess;\n+\n+\t/* Trigger CTX flush + invalidate to remove from CTX_CACHE */\n+\troc_cpt_lf_ctx_flush(sess_priv->lf, &sess_priv->roc_se_ctx.se_ctx, true);\n+\n+\tplt_delay_ms(1);\n \n \tif (sess_priv->roc_se_ctx.auth_key != NULL)\n \t\tplt_free(sess_priv->roc_se_ctx.auth_key);\n \n-\tmemset(sess_priv, 0, cnxk_cpt_sym_session_get_size(NULL));\n+\tif (is_session_less)\n+\t\tmemset(sess_priv, 0, cnxk_cpt_sym_session_get_size(NULL));\n }\n \n void\n cnxk_cpt_sym_session_clear(struct rte_cryptodev *dev __rte_unused,\n \t\t\t struct rte_cryptodev_sym_session *sess)\n {\n-\treturn sym_session_clear(sess);\n+\treturn sym_session_clear(sess, false);\n }\n \n unsigned int\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\nindex 5153d334ba..f91ad368ea 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h\n@@ -107,18 +107,15 @@ int cnxk_cpt_queue_pair_release(struct rte_cryptodev *dev, uint16_t qp_id);\n \n unsigned int cnxk_cpt_sym_session_get_size(struct rte_cryptodev *dev);\n \n-int cnxk_cpt_sym_session_configure(struct rte_cryptodev *dev,\n-\t\t\t\t struct rte_crypto_sym_xform *xform,\n+int cnxk_cpt_sym_session_configure(struct rte_cryptodev *dev, struct rte_crypto_sym_xform *xform,\n \t\t\t\t struct rte_cryptodev_sym_session *sess);\n \n-int sym_session_configure(struct roc_cpt *roc_cpt,\n-\t\t\t struct rte_crypto_sym_xform *xform,\n-\t\t\t struct rte_cryptodev_sym_session *sess);\n+int sym_session_configure(struct roc_cpt *roc_cpt, struct rte_crypto_sym_xform *xform,\n+\t\t\t struct rte_cryptodev_sym_session *sess, bool is_session_less);\n \n-void cnxk_cpt_sym_session_clear(struct rte_cryptodev *dev,\n-\t\tstruct rte_cryptodev_sym_session *sess);\n+void cnxk_cpt_sym_session_clear(struct rte_cryptodev *dev, struct rte_cryptodev_sym_session *sess);\n \n-void sym_session_clear(struct rte_cryptodev_sym_session *sess);\n+void sym_session_clear(struct rte_cryptodev_sym_session *sess, bool is_session_less);\n \n unsigned int cnxk_ae_session_size_get(struct rte_cryptodev *dev __rte_unused);\n \ndiff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h\nindex 092cdd88e7..774efd5879 100644\n--- a/drivers/crypto/cnxk/cnxk_se.h\n+++ b/drivers/crypto/cnxk/cnxk_se.h\n@@ -6,6 +6,8 @@\n #define _CNXK_SE_H_\n #include <stdbool.h>\n \n+#include <rte_cryptodev.h>\n+\n #include \"cnxk_cryptodev.h\"\n #include \"cnxk_cryptodev_ops.h\"\n #include \"cnxk_sg.h\"\n@@ -25,6 +27,7 @@ enum cpt_dp_thread_type {\n };\n \n struct cnxk_se_sess {\n+\tstruct rte_cryptodev_sym_session rte_sess;\n \tuint16_t cpt_op : 4;\n \tuint16_t zsk_flag : 4;\n \tuint16_t aes_gcm : 1;\n@@ -51,10 +54,11 @@ struct cnxk_se_sess {\n \tuint64_t cpt_inst_w2;\n \tstruct cnxk_cpt_qp *qp;\n \tstruct roc_se_ctx roc_se_ctx;\n-} __rte_cache_aligned;\n+\tstruct roc_cpt_lf *lf;\n+} __rte_aligned(ROC_ALIGN);\n \n-static __rte_always_inline int\n-fill_sess_gmac(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess);\n+static __rte_always_inline int fill_sess_gmac(struct rte_crypto_sym_xform *xform,\n+\t\t\t\t\t struct cnxk_se_sess *sess);\n \n static inline void\n cpt_pack_iv(uint8_t *iv_src, uint8_t *iv_dst)\n", "prefixes": [ "14/17" ] }