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GET /api/patches/120662/?format=api
{ "id": 120662, "url": "https://patches.dpdk.org/api/patches/120662/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221208201806.21893-23-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221208201806.21893-23-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221208201806.21893-23-syalavarthi@marvell.com", "date": "2022-12-08T20:17:50", "name": "[v2,22/37] ml/cnxk: enable quantization and dequantization", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6fbdac0cb17080d15502fbf95b82cead87a527a6", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221208201806.21893-23-syalavarthi@marvell.com/mbox/", "series": [ { "id": 26050, "url": "https://patches.dpdk.org/api/series/26050/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26050", "date": "2022-12-08T20:17:28", "name": "Implementation of ML CNXK driver", "version": 2, "mbox": "https://patches.dpdk.org/series/26050/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/120662/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/120662/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1A7A5A0093;\n\tThu, 8 Dec 2022 21:21:32 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id F02F842DBE;\n\tThu, 8 Dec 2022 21:19:33 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 3B3B842D42\n for <dev@dpdk.org>; Thu, 8 Dec 2022 21:19:18 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2B8Jjcg0004895 for <dev@dpdk.org>; Thu, 8 Dec 2022 12:19:17 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3m86usnj1d-3\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 08 Dec 2022 12:19:17 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 8 Dec 2022 12:19:14 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 8 Dec 2022 12:19:14 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 10A223F70E0;\n Thu, 8 Dec 2022 12:18:18 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=d4tKEwktq3eFKI7Wm+x/PbpEXNgbsndcgFpWW5QO1U0=;\n b=SsM36Jdd2c3Oq/ordXx3DZRCtp3HHj0i67q5yRUKMSLn4w0oFA1Iz4dwFYdObGCMR4gu\n Oo7lBMESlUzFv5DKO2GhJRFD2C1ZbsvFVndaj2plXj0Wiwr5OJ/dfzRCXVPMfOhv2RiA\n kaomre1+RBDvfOF3BVM2Rci3SjX9yYhpLHUIus34CDov1yZUwUjTBQg0Qbm+2LfRINWu\n QXGIfs49+rFdrQHOMQhMUSNgtO+o4w2wAahf/Tt7PEyWvixEOceK+9lIrP22oWH4qNRc\n dfg3Jhzwv4H+5eBCVCB5Ff4J0pRhn0t9dN3WrQ/OL+cUd6LlX6c4k4wunDA0FCQ49L/M tw==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>", "Subject": "[PATCH v2 22/37] ml/cnxk: enable quantization and dequantization", "Date": "Thu, 8 Dec 2022 12:17:50 -0800", "Message-ID": "<20221208201806.21893-23-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20221208201806.21893-1-syalavarthi@marvell.com>", "References": "<20221208200220.20267-1-syalavarthi@marvell.com>\n <20221208201806.21893-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "6noyt8jwDFbID8F-6fFJ0jqUwc6o3IjI", "X-Proofpoint-ORIG-GUID": "6noyt8jwDFbID8F-6fFJ0jqUwc6o3IjI", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-08_11,2022-12-08_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implemented driver functions to quantize / dequantize input\nand output data. Support is enabled for multiple batches.\nQuantization / dequantization use the type conversion functions\ndefined in ML common code.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ops.c | 150 +++++++++++++++++++++++++++++++++\n 1 file changed, 150 insertions(+)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex c96f17ebd8..9868d2a598 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -5,6 +5,8 @@\n #include <rte_mldev.h>\n #include <rte_mldev_pmd.h>\n \n+#include <ml_utils.h>\n+\n #include \"cn10k_ml_dev.h\"\n #include \"cn10k_ml_model.h\"\n #include \"cn10k_ml_ops.h\"\n@@ -987,6 +989,152 @@ cn10k_ml_io_output_size_get(struct rte_ml_dev *dev, int16_t model_id, uint32_t n\n \treturn 0;\n }\n \n+static int\n+cn10k_ml_io_quantize(struct rte_ml_dev *dev, int16_t model_id, uint16_t nb_batches, void *dbuffer,\n+\t\t void *qbuffer)\n+{\n+\tstruct cn10k_ml_model *model;\n+\tuint8_t *lcl_dbuffer;\n+\tuint8_t *lcl_qbuffer;\n+\tuint32_t batch_id;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tmodel = dev->data->models[model_id];\n+\n+\tif (model == NULL) {\n+\t\tplt_err(\"Invalid model_id = %d\", model_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tlcl_dbuffer = dbuffer;\n+\tlcl_qbuffer = qbuffer;\n+\tbatch_id = 0;\n+\n+next_batch:\n+\tfor (i = 0; i < model->metadata.model.num_input; i++) {\n+\t\tif (model->metadata.input[i].input_type ==\n+\t\t model->metadata.input[i].model_input_type) {\n+\t\t\tmemcpy(lcl_qbuffer, lcl_dbuffer, model->addr.input[i].sz_d);\n+\t\t} else {\n+\t\t\tswitch (model->metadata.input[i].model_input_type) {\n+\t\t\tcase RTE_ML_IO_TYPE_INT8:\n+\t\t\t\tret = ml_float32_to_int8(model->metadata.input[i].qscale,\n+\t\t\t\t\t\t\t model->addr.input[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_UINT8:\n+\t\t\t\tret = ml_float32_to_uint8(model->metadata.input[i].qscale,\n+\t\t\t\t\t\t\t model->addr.input[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_INT16:\n+\t\t\t\tret = ml_float32_to_int16(model->metadata.input[i].qscale,\n+\t\t\t\t\t\t\t model->addr.input[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_UINT16:\n+\t\t\t\tret = ml_float32_to_uint16(model->metadata.input[i].qscale,\n+\t\t\t\t\t\t\t model->addr.input[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_FP16:\n+\t\t\t\tret = ml_float32_to_float16(model->addr.input[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_dbuffer, lcl_qbuffer);\n+\t\t\t\tbreak;\n+\t\t\tdefault:\n+\t\t\t\tplt_err(\"Unsupported model_input_type[%u] : %u\", i,\n+\t\t\t\t\tmodel->metadata.input[i].model_input_type);\n+\t\t\t\tret = -ENOTSUP;\n+\t\t\t}\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t}\n+\n+\t\tlcl_dbuffer += model->addr.input[i].sz_d;\n+\t\tlcl_qbuffer += model->addr.input[i].sz_q;\n+\t}\n+\n+\tbatch_id++;\n+\tif (batch_id < PLT_DIV_CEIL(nb_batches, model->batch_size))\n+\t\tgoto next_batch;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_ml_io_dequantize(struct rte_ml_dev *dev, int16_t model_id, uint16_t nb_batches, void *qbuffer,\n+\t\t void *dbuffer)\n+{\n+\tstruct cn10k_ml_model *model;\n+\tuint8_t *lcl_qbuffer;\n+\tuint8_t *lcl_dbuffer;\n+\tuint32_t batch_id;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tmodel = dev->data->models[model_id];\n+\n+\tif (model == NULL) {\n+\t\tplt_err(\"Invalid model_id = %d\", model_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tlcl_dbuffer = dbuffer;\n+\tlcl_qbuffer = qbuffer;\n+\tbatch_id = 0;\n+\n+next_batch:\n+\tfor (i = 0; i < model->metadata.model.num_output; i++) {\n+\t\tif (model->metadata.output[i].output_type ==\n+\t\t model->metadata.output[i].model_output_type) {\n+\t\t\tmemcpy(lcl_dbuffer, lcl_qbuffer, model->addr.output[i].sz_q);\n+\t\t} else {\n+\t\t\tswitch (model->metadata.output[i].model_output_type) {\n+\t\t\tcase RTE_ML_IO_TYPE_INT8:\n+\t\t\t\tret = ml_int8_to_float32(model->metadata.output[i].dscale,\n+\t\t\t\t\t\t\t model->addr.output[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_UINT8:\n+\t\t\t\tret = ml_uint8_to_float32(model->metadata.output[i].dscale,\n+\t\t\t\t\t\t\t model->addr.output[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_INT16:\n+\t\t\t\tret = ml_int16_to_float32(model->metadata.output[i].dscale,\n+\t\t\t\t\t\t\t model->addr.output[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_UINT16:\n+\t\t\t\tret = ml_uint16_to_float32(model->metadata.output[i].dscale,\n+\t\t\t\t\t\t\t model->addr.output[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tbreak;\n+\t\t\tcase RTE_ML_IO_TYPE_FP16:\n+\t\t\t\tret = ml_float16_to_float32(model->addr.output[i].nb_elements,\n+\t\t\t\t\t\t\t lcl_qbuffer, lcl_dbuffer);\n+\t\t\t\tbreak;\n+\t\t\tdefault:\n+\t\t\t\tplt_err(\"Unsupported model_output_type[%u] : %u\", i,\n+\t\t\t\t\tmodel->metadata.output[i].model_output_type);\n+\t\t\t\tret = -ENOTSUP;\n+\t\t\t}\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t}\n+\n+\t\tlcl_qbuffer += model->addr.output[i].sz_q;\n+\t\tlcl_dbuffer += model->addr.output[i].sz_d;\n+\t}\n+\n+\tbatch_id++;\n+\tif (batch_id < PLT_DIV_CEIL(nb_batches, model->batch_size))\n+\t\tgoto next_batch;\n+\n+\treturn 0;\n+}\n+\n struct rte_ml_dev_ops cn10k_ml_ops = {\n \t/* Device control ops */\n \t.dev_info_get = cn10k_ml_dev_info_get,\n@@ -1010,4 +1158,6 @@ struct rte_ml_dev_ops cn10k_ml_ops = {\n \t/* I/O ops */\n \t.io_input_size_get = cn10k_ml_io_input_size_get,\n \t.io_output_size_get = cn10k_ml_io_output_size_get,\n+\t.io_quantize = cn10k_ml_io_quantize,\n+\t.io_dequantize = cn10k_ml_io_dequantize,\n };\n", "prefixes": [ "v2", "22/37" ] }