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GET /api/patches/120633/?format=api
{ "id": 120633, "url": "https://patches.dpdk.org/api/patches/120633/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221208200220.20267-29-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221208200220.20267-29-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221208200220.20267-29-syalavarthi@marvell.com", "date": "2022-12-08T20:02:11", "name": "[v1,28/37] ml/cnxk: enable support for firmware error codes", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "84aab6671bef33e925ca8e9b3107b57a5a8d3af5", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221208200220.20267-29-syalavarthi@marvell.com/mbox/", "series": [ { "id": 26049, "url": "https://patches.dpdk.org/api/series/26049/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26049", "date": "2022-12-08T20:01:43", "name": "Implementation of ML CNXK driver", "version": 1, "mbox": "https://patches.dpdk.org/series/26049/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/120633/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/120633/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D2738A0093;\n\tThu, 8 Dec 2022 21:05:50 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 13F3942DE4;\n\tThu, 8 Dec 2022 21:03:01 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 7C3FF42D5D\n for <dev@dpdk.org>; Thu, 8 Dec 2022 21:02:38 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2B8JjnOL005114 for <dev@dpdk.org>; Thu, 8 Dec 2022 12:02:37 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3m86usnfsn-17\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 08 Dec 2022 12:02:37 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 8 Dec 2022 12:02:30 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 8 Dec 2022 12:02:30 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 1A7683F705F;\n Thu, 8 Dec 2022 12:02:30 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=tR4P+T3skxOy9R8zVWKt/0g8nd2+Lep7M+0oiaAaAng=;\n b=fvOb2OZ2ZFe/y+sWnKj6X/kodkwuv1gnodZclha75JlFtpx39ZA2XA8TmFxIVhhzVorI\n 2LQT/d0sXQ918aM6/bIgpR5IcImtV5wYvyWCPu7e84LyGSLbtLWEgiitCpUCbotMofAx\n y31eRAjj5P1Puj2UgylsNcBbKeAYCmwB2eCHlkMpf5Pgzo92jeFcpS4U7AvNbyYLwR6J\n ZFyEfLdCS1ZgWk1whsWOz+G8v60bouGdZnmY69u5DB+3RX+EWqTHqO1Ivtmz9ZlSQtMj\n ndnLgJRf/jzfmvEbwxvmHBajvbn4T+m/XadT0OvVTItK2yRxwO1knrLME1tSG+PGyt0f jA==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>", "Subject": "[PATCH v1 28/37] ml/cnxk: enable support for firmware error codes", "Date": "Thu, 8 Dec 2022 12:02:11 -0800", "Message-ID": "<20221208200220.20267-29-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20221208200220.20267-1-syalavarthi@marvell.com>", "References": "<20221208200220.20267-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "ZxYVfWk14tD1j796sm_jldFuaPWRcjSQ", "X-Proofpoint-ORIG-GUID": "ZxYVfWk14tD1j796sm_jldFuaPWRcjSQ", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-08_11,2022-12-08_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Enabled support for error handling. Added error types and subtypes\nsupported by ML firmware. Enabled support to get device specific\nerror code and message for a completed ML request.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_dev.c | 4 +-\n drivers/ml/cnxk/cn10k_ml_dev.h | 50 +++++++++++++-\n drivers/ml/cnxk/cn10k_ml_ops.c | 117 ++++++++++++++++++++++++++++++---\n drivers/ml/cnxk/cn10k_ml_ops.h | 2 +\n 4 files changed, 160 insertions(+), 13 deletions(-)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_dev.c b/drivers/ml/cnxk/cn10k_ml_dev.c\nindex 805b037593..779734d6cd 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.c\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.c\n@@ -261,7 +261,7 @@ cn10k_ml_fw_load_asim(struct cn10k_ml_fw *fw)\n \t} while (plt_tsc_cycles() < timeout_cycle);\n \n \t/* Check firmware load status, clean-up and exit on failure. */\n-\tif ((!timeout) && (fw->req->result.error_code == 0)) {\n+\tif ((!timeout) && (fw->req->result.error_code.u64 == 0)) {\n \t\tcn10k_ml_fw_print_info(fw);\n \t} else {\n \t\t/* Set ML to disable new jobs */\n@@ -452,7 +452,7 @@ cn10k_ml_fw_load_cn10ka(struct cn10k_ml_fw *fw, void *buffer, uint64_t size)\n \t} while (plt_tsc_cycles() < timeout_cycle);\n \n \t/* Check firmware load status, clean-up and exit on failure. */\n-\tif ((!timeout) && (fw->req->result.error_code == 0)) {\n+\tif ((!timeout) && (fw->req->result.error_code.u64 == 0)) {\n \t\tcn10k_ml_fw_print_info(fw);\n \t} else {\n \t\t/* Set ML to disable new jobs */\ndiff --git a/drivers/ml/cnxk/cn10k_ml_dev.h b/drivers/ml/cnxk/cn10k_ml_dev.h\nindex 5096a26c40..2045465839 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.h\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.h\n@@ -64,6 +64,54 @@ enum cn10k_ml_dev_state {\n \tML_CN10K_DEV_STATE_CLOSED\n };\n \n+/* ML error types enumeration */\n+enum cn10k_ml_error_etype {\n+\t/* 0x0 */ ML_ETYPE_NO_ERROR = 0, /* No error */\n+\t/* 0x1 */ ML_ETYPE_FW_NONFATAL,\t /* Firmware non-fatal error */\n+\t/* 0x2 */ ML_ETYPE_HW_NONFATAL,\t /* Hardware non-fatal error */\n+\t/* 0x3 */ ML_ETYPE_HW_FATAL,\t /* Hardware fatal error */\n+\t/* 0x4 */ ML_ETYPE_HW_WARNING,\t /* Hardware warning */\n+\t/* 0x5 */ ML_ETYPE_DRIVER,\t /* Driver specific error */\n+\t/* 0x6 */ ML_ETYPE_UNKNOWN,\t /* Unknown error */\n+};\n+\n+/* ML firmware non-fatal error sub-type */\n+enum cn10k_ml_error_stype_fw_nf {\n+\t/* 0x0 */ ML_FW_ERR_NOERR = 0,\t\t /* No error */\n+\t/* 0x1 */ ML_FW_ERR_UNLOAD_ID_NOT_FOUND, /* Model ID not found during load */\n+\t/* 0x2 */ ML_FW_ERR_LOAD_LUT_OVERFLOW,\t /* Lookup table overflow at load */\n+\t/* 0x3 */ ML_FW_ERR_ID_IN_USE,\t\t /* Model ID already in use */\n+\t/* 0x4 */ ML_FW_ERR_INVALID_TILEMASK,\t /* Invalid OCM tilemask */\n+\t/* 0x5 */ ML_FW_ERR_RUN_LUT_OVERFLOW,\t /* Lookup table overflow at run */\n+\t/* 0x6 */ ML_FW_ERR_RUN_ID_NOT_FOUND,\t /* Model ID not found during run */\n+\t/* 0x7 */ ML_FW_ERR_COMMAND_NOTSUP,\t /* Unsupported command */\n+\t/* 0x8 */ ML_FW_ERR_DDR_ADDR_RANGE,\t /* DDR address out of range */\n+\t/* 0x9 */ ML_FW_ERR_NUM_BATCHES_INVALID, /* Invalid number of batches */\n+\t/* 0xA */ ML_FW_ERR_INSSYNC_TIMEOUT,\t /* INS sync timeout */\n+};\n+\n+/* ML driver error sub-type */\n+enum cn10k_ml_error_stype_driver {\n+\t/* 0x0 */ ML_DRIVER_ERR_NOERR = 0, /* No error */\n+\t/* 0x1 */ ML_DRIVER_ERR_UNKNOWN, /* Unable to determine erro sub-type */\n+\t/* 0x2 */ ML_DRIVER_ERR_EXCEPTION, /* Firmware exception */\n+\t/* 0x3 */ ML_DRIVER_ERR_FW_ERROR, /* Unknown firmware error */\n+};\n+\n+/* ML error structure */\n+union cn10k_ml_error_code {\n+\tstruct {\n+\t\t/* Error type */\n+\t\tuint64_t etype : 4;\n+\n+\t\t/* Error sub-type */\n+\t\tuint64_t stype : 60;\n+\t} s;\n+\n+\t/* WORD 0 */\n+\tuint64_t u64;\n+};\n+\n /* ML Firmware stats */\n struct cn10k_ml_fw_stats {\n \t/* Firmware start cycle */\n@@ -82,7 +130,7 @@ struct cn10k_ml_fw_stats {\n /* ML result structure */\n struct cn10k_ml_result {\n \t/* Job error code */\n-\tuint64_t error_code;\n+\tunion cn10k_ml_error_code error_code;\n \n \t/* Firmware stats */\n \tstruct cn10k_ml_fw_stats stats;\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex e7ee0774f2..d9eea21e12 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -23,6 +23,49 @@\n #define ML_FLAGS_POLL_COMPL BIT(0)\n #define ML_FLAGS_SSO_COMPL BIT(1)\n \n+/* Error message length */\n+#define ERRMSG_LEN 32\n+\n+/* Error type database */\n+static const struct cn10k_ml_etype_db {\n+\tenum cn10k_ml_error_etype etype;\n+\tchar name[ERRMSG_LEN];\n+} ml_etype_db[] = {\n+\t{ML_ETYPE_NO_ERROR, \"NO_ERROR\"},\t{ML_ETYPE_FW_NONFATAL, \"FW_NON_FATAL\"},\n+\t{ML_ETYPE_HW_NONFATAL, \"HW_NON_FATAL\"}, {ML_ETYPE_HW_FATAL, \"HW_FATAL\"},\n+\t{ML_ETYPE_HW_WARNING, \"HW_WARNING\"},\t{ML_ETYPE_DRIVER, \"DRIVER_ERROR\"},\n+\t{ML_ETYPE_UNKNOWN, \"UNKNOWN_ERROR\"},\n+};\n+\n+/* Hardware non-fatal error subtype database */\n+static const struct cn10k_ml_stype_db_hw_nf {\n+\tenum cn10k_ml_error_stype_fw_nf stype;\n+\tchar msg[ERRMSG_LEN];\n+} ml_stype_db_hw_nf[] = {\n+\t{ML_FW_ERR_NOERR, \"NO ERROR\"},\n+\t{ML_FW_ERR_UNLOAD_ID_NOT_FOUND, \"UNLOAD MODEL ID NOT FOUND\"},\n+\t{ML_FW_ERR_LOAD_LUT_OVERFLOW, \"LOAD LUT OVERFLOW\"},\n+\t{ML_FW_ERR_ID_IN_USE, \"MODEL ID IN USE\"},\n+\t{ML_FW_ERR_INVALID_TILEMASK, \"INVALID TILEMASK\"},\n+\t{ML_FW_ERR_RUN_LUT_OVERFLOW, \"RUN LUT OVERFLOW\"},\n+\t{ML_FW_ERR_RUN_ID_NOT_FOUND, \"RUN MODEL ID NOT FOUND\"},\n+\t{ML_FW_ERR_COMMAND_NOTSUP, \"COMMAND NOT SUPPORTED\"},\n+\t{ML_FW_ERR_DDR_ADDR_RANGE, \"DDR ADDRESS OUT OF RANGE\"},\n+\t{ML_FW_ERR_NUM_BATCHES_INVALID, \"INVALID BATCHES\"},\n+\t{ML_FW_ERR_INSSYNC_TIMEOUT, \"INSSYNC TIMEOUT\"},\n+};\n+\n+/* Driver error subtype database */\n+static const struct cn10k_ml_stype_db_driver {\n+\tenum cn10k_ml_error_stype_driver stype;\n+\tchar msg[ERRMSG_LEN];\n+} ml_stype_db_driver[] = {\n+\t{ML_DRIVER_ERR_NOERR, \"NO ERROR\"},\n+\t{ML_DRIVER_ERR_UNKNOWN, \"UNKNOWN ERROR\"},\n+\t{ML_DRIVER_ERR_EXCEPTION, \"FW EXCEPTION\"},\n+\t{ML_DRIVER_ERR_FW_ERROR, \"UNKNOWN FIRMWARE ERROR\"},\n+};\n+\n static void\n print_line(FILE *fp, int len)\n {\n@@ -474,6 +517,7 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \n \tdev->enqueue_burst = cn10k_ml_enqueue_burst;\n \tdev->dequeue_burst = cn10k_ml_dequeue_burst;\n+\tdev->op_error_get = cn10k_ml_op_error_get;\n \n \tmldev->nb_models_loaded = 0;\n \tmldev->state = ML_CN10K_DEV_STATE_CONFIGURED;\n@@ -758,7 +802,7 @@ cn10k_ml_dev_selftest(struct rte_ml_dev *dev)\n \tif (timeout) {\n \t\tret = -ETIME;\n \t} else {\n-\t\tif (req->result.error_code != 0)\n+\t\tif (req->result.error_code.u64 != 0)\n \t\t\tret = -1;\n \t}\n \n@@ -940,7 +984,7 @@ cn10k_ml_model_start(struct rte_ml_dev *dev, int16_t model_id)\n \treq = model->req;\n \tcn10k_ml_prep_sp_job_descriptor(mldev, model, req, ML_CN10K_JOB_TYPE_MODEL_START);\n \n-\treq->result.error_code = 0x0;\n+\treq->result.error_code.u64 = 0x0;\n \treq->result.user_ptr = NULL;\n \n \tplt_write64(ML_CN10K_POLL_JOB_START, &req->status);\n@@ -1021,7 +1065,7 @@ cn10k_ml_model_start(struct rte_ml_dev *dev, int16_t model_id)\n \n \tif (job_dequeued) {\n \t\tif (plt_read64(&req->status) == ML_CN10K_POLL_JOB_FINISH) {\n-\t\t\tif (req->result.error_code == 0)\n+\t\t\tif (req->result.error_code.u64 == 0)\n \t\t\t\tret = 0;\n \t\t\telse\n \t\t\t\tret = -1;\n@@ -1083,7 +1127,7 @@ cn10k_ml_model_stop(struct rte_ml_dev *dev, int16_t model_id)\n \t/* Prepare JD */\n \treq = model->req;\n \tcn10k_ml_prep_sp_job_descriptor(mldev, model, req, ML_CN10K_JOB_TYPE_MODEL_STOP);\n-\treq->result.error_code = 0x0;\n+\treq->result.error_code.u64 = 0x0;\n \treq->result.user_ptr = NULL;\n \n \tplt_write64(ML_CN10K_POLL_JOB_START, &req->status);\n@@ -1138,7 +1182,7 @@ cn10k_ml_model_stop(struct rte_ml_dev *dev, int16_t model_id)\n \n \tif (job_dequeued) {\n \t\tif (plt_read64(&req->status) == ML_CN10K_POLL_JOB_FINISH) {\n-\t\t\tif (req->result.error_code == 0x0)\n+\t\t\tif (req->result.error_code.u64 == 0x0)\n \t\t\t\tret = 0;\n \t\t\telse\n \t\t\t\tret = -1;\n@@ -1429,12 +1473,30 @@ cn10k_ml_result_update(struct rte_ml_dev *dev, int qp_id, struct cn10k_ml_result\n \tPLT_SET_USED(dev);\n \tPLT_SET_USED(qp_id);\n \n-\top->impl_opaque = result->error_code;\n+\tstruct cn10k_ml_dev *mldev;\n \n-\tif (likely(result->error_code == 0))\n+\tif (likely(result->error_code.u64 == 0)) {\n+\t\top->impl_opaque = result->error_code.u64;\n \t\top->status = RTE_ML_OP_STATUS_SUCCESS;\n-\telse\n+\t} else {\n+\t\t/* Handle driver error */\n+\t\tif (result->error_code.s.etype == ML_ETYPE_DRIVER) {\n+\t\t\tmldev = dev->data->dev_private;\n+\n+\t\t\t/* Check for exception */\n+\t\t\tif ((roc_ml_reg_read64(&mldev->roc, ML_SCRATCH_EXCEPTION_SP_C0) != 0) ||\n+\t\t\t (roc_ml_reg_read64(&mldev->roc, ML_SCRATCH_EXCEPTION_SP_C1) != 0))\n+\t\t\t\tresult->error_code.s.stype = ML_DRIVER_ERR_EXCEPTION;\n+\t\t\telse if ((roc_ml_reg_read64(&mldev->roc, ML_CORE_INT_LO) != 0) ||\n+\t\t\t\t (roc_ml_reg_read64(&mldev->roc, ML_CORE_INT_HI) != 0))\n+\t\t\t\tresult->error_code.s.stype = ML_DRIVER_ERR_FW_ERROR;\n+\t\t\telse\n+\t\t\t\tresult->error_code.s.stype = ML_DRIVER_ERR_UNKNOWN;\n+\t\t}\n+\n+\t\top->impl_opaque = result->error_code.u64;\n \t\top->status = RTE_ML_OP_STATUS_ERROR;\n+\t}\n \n \top->user_ptr = result->user_ptr;\n }\n@@ -1471,6 +1533,7 @@ cn10k_ml_enqueue_burst(struct rte_ml_dev *dev, uint16_t qp_id, struct rte_ml_op\n \tcn10k_ml_prep_fp_job_descriptor(dev, req, op);\n \n \tmemset(&req->result, 0, sizeof(struct cn10k_ml_result));\n+\treq->result.error_code.s.etype = ML_ETYPE_UNKNOWN;\n \treq->result.user_ptr = op->user_ptr;\n \n \tplt_write64(ML_CN10K_POLL_JOB_START, &req->status);\n@@ -1518,8 +1581,12 @@ cn10k_ml_dequeue_burst(struct rte_ml_dev *dev, uint16_t qp_id, struct rte_ml_op\n dequeue_req:\n \treq = &queue->reqs[tail];\n \tstatus = plt_read64(&req->status);\n-\tif (unlikely(status != ML_CN10K_POLL_JOB_FINISH))\n-\t\tgoto empty_or_active;\n+\tif (unlikely(status != ML_CN10K_POLL_JOB_FINISH)) {\n+\t\tif (plt_tsc_cycles() < req->timeout)\n+\t\t\tgoto empty_or_active;\n+\t\telse /* Timeout, set indication of driver error */\n+\t\t\treq->result.error_code.s.etype = ML_ETYPE_DRIVER;\n+\t}\n \n \tcn10k_ml_result_update(dev, qp_id, &req->result, req->op);\n \tops[count] = req->op;\n@@ -1536,6 +1603,35 @@ cn10k_ml_dequeue_burst(struct rte_ml_dev *dev, uint16_t qp_id, struct rte_ml_op\n \treturn count;\n }\n \n+__rte_hot int\n+cn10k_ml_op_error_get(struct rte_ml_dev *dev, struct rte_ml_op *op, struct rte_ml_op_error *error)\n+{\n+\tunion cn10k_ml_error_code *error_code;\n+\tchar msg[RTE_ML_STR_MAX];\n+\n+\tPLT_SET_USED(dev);\n+\n+\terror_code = (union cn10k_ml_error_code *)&op->impl_opaque;\n+\n+\t/* Copy error message */\n+\tplt_strlcpy(msg, ml_etype_db[error_code->s.etype].name, sizeof(msg));\n+\n+\t/* Copy sub error message */\n+\tif (error_code->s.etype == ML_ETYPE_HW_NONFATAL) {\n+\t\tstrcat(msg, \" : \");\n+\t\tstrcat(msg, ml_stype_db_hw_nf[error_code->s.stype].msg);\n+\t}\n+\n+\tif (error_code->s.etype == ML_ETYPE_DRIVER) {\n+\t\tstrcat(msg, \" : \");\n+\t\tstrcat(msg, ml_stype_db_driver[error_code->s.stype].msg);\n+\t}\n+\n+\tplt_strlcpy(error->message, msg, sizeof(error->message));\n+\n+\treturn 0;\n+}\n+\n __rte_hot int\n cn10k_ml_inference_sync(struct rte_ml_dev *dev, struct rte_ml_op *op)\n {\n@@ -1552,6 +1648,7 @@ cn10k_ml_inference_sync(struct rte_ml_dev *dev, struct rte_ml_op *op)\n \tcn10k_ml_prep_fp_job_descriptor(dev, req, op);\n \n \tmemset(&req->result, 0, sizeof(struct cn10k_ml_result));\n+\treq->result.error_code.s.etype = ML_ETYPE_UNKNOWN;\n \treq->result.user_ptr = op->user_ptr;\n \n \tplt_write64(ML_CN10K_POLL_JOB_START, &req->status);\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.h b/drivers/ml/cnxk/cn10k_ml_ops.h\nindex c23e484b69..5f00cb2a60 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.h\n@@ -75,6 +75,8 @@ __rte_hot uint16_t cn10k_ml_enqueue_burst(struct rte_ml_dev *dev, uint16_t qp_id\n \t\t\t\t\t struct rte_ml_op **ops, uint16_t nb_ops);\n __rte_hot uint16_t cn10k_ml_dequeue_burst(struct rte_ml_dev *dev, uint16_t qp_id,\n \t\t\t\t\t struct rte_ml_op **ops, uint16_t nb_ops);\n+__rte_hot int cn10k_ml_op_error_get(struct rte_ml_dev *dev, struct rte_ml_op *op,\n+\t\t\t\t struct rte_ml_op_error *error);\n __rte_hot int cn10k_ml_inference_sync(struct rte_ml_dev *dev, struct rte_ml_op *op);\n \n #endif /* _CN10K_ML_OPS_H_ */\n", "prefixes": [ "v1", "28/37" ] }