Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/120612/?format=api
{ "id": 120612, "url": "https://patches.dpdk.org/api/patches/120612/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221208200220.20267-9-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221208200220.20267-9-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221208200220.20267-9-syalavarthi@marvell.com", "date": "2022-12-08T20:01:51", "name": "[v1,08/37] ml/cnxk: enable support for device start and stop", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "423a0465bf85368539fc24a6506cad7d77038d2b", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221208200220.20267-9-syalavarthi@marvell.com/mbox/", "series": [ { "id": 26049, "url": "https://patches.dpdk.org/api/series/26049/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26049", "date": "2022-12-08T20:01:43", "name": "Implementation of ML CNXK driver", "version": 1, "mbox": "https://patches.dpdk.org/series/26049/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/120612/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/120612/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 92C74A0093;\n\tThu, 8 Dec 2022 21:03:46 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C9C0842D68;\n\tThu, 8 Dec 2022 21:02:39 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 15BA342BAC\n for <dev@dpdk.org>; Thu, 8 Dec 2022 21:02:29 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2B8JjnOA005114 for <dev@dpdk.org>; Thu, 8 Dec 2022 12:02:29 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3m86usnfsn-7\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 08 Dec 2022 12:02:29 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 8 Dec 2022 12:02:25 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 8 Dec 2022 12:02:25 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 6799F3F706C;\n Thu, 8 Dec 2022 12:02:25 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=jBMnf4FOJVIZAPs0U/dAsrshfPoULr+MtcySaVScGzk=;\n b=cROVyVRrJhrRYG9FXSxTa/Ydghd3tSjf3BJQEleWzjkkaemg6W3H0iinOCCPqdkY1oOJ\n WPrAS2xBcUmCv8I3WUKG2denQsdeFADAO2hD4PB0YmLuNg+qSn5W3iml+Uk/Qt5GUv6v\n ntAjViNkOqzhawgfHI43m5VSn84gN6m0PSIoS6Yp8v8mnFDcGarRRk9ChC3H3Tr4TnLd\n FLPvXqh8ZF4e9fAsYcE6muVSoDmje2W2CcijteoSZ4bjD7TVYwUrKUHrs/xfh7Psb3wg\n Tl3z5SOnVOUGxdAX6sLGU8QEz495vORzPRRI7cdR5lR1SLXBNpReLtCAL4LJF/KRDDb6 yw==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>", "Subject": "[PATCH v1 08/37] ml/cnxk: enable support for device start and stop", "Date": "Thu, 8 Dec 2022 12:01:51 -0800", "Message-ID": "<20221208200220.20267-9-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20221208200220.20267-1-syalavarthi@marvell.com>", "References": "<20221208200220.20267-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "gvxvr4PwA8cVcwWiCy57jHRol__muKOw", "X-Proofpoint-ORIG-GUID": "gvxvr4PwA8cVcwWiCy57jHRol__muKOw", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-08_11,2022-12-08_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implemented ML driver functions to start and stop ML device.\nStart / Stop would enable or disable ML device to accept\ninference requests.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ops.c | 42 +++++++++++++++++++++++++++++++---\n 1 file changed, 39 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex 11e1cdb7cd..3fea763caf 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -104,9 +104,45 @@ cn10k_ml_dev_close(struct rte_ml_dev *dev)\n \treturn rte_dev_remove(dev->device);\n }\n \n+static int\n+cn10k_ml_dev_start(struct rte_ml_dev *dev)\n+{\n+\tstruct cn10k_ml_dev *mldev;\n+\tuint64_t reg_val64;\n+\n+\tmldev = dev->data->dev_private;\n+\n+\treg_val64 = roc_ml_reg_read64(&mldev->roc, ML_CFG);\n+\treg_val64 |= ROC_ML_CFG_ENA;\n+\troc_ml_reg_write64(&mldev->roc, reg_val64, ML_CFG);\n+\tplt_ml_dbg(\"ML_CFG => 0x%016lx\", roc_ml_reg_read64(&mldev->roc, ML_CFG));\n+\n+\tmldev->state = ML_CN10K_DEV_STATE_STARTED;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_ml_dev_stop(struct rte_ml_dev *dev)\n+{\n+\tstruct cn10k_ml_dev *mldev;\n+\tuint64_t reg_val64;\n+\n+\tmldev = dev->data->dev_private;\n+\n+\treg_val64 = roc_ml_reg_read64(&mldev->roc, ML_CFG);\n+\treg_val64 &= ~ROC_ML_CFG_ENA;\n+\troc_ml_reg_write64(&mldev->roc, reg_val64, ML_CFG);\n+\tplt_ml_dbg(\"ML_CFG => 0x%016lx\", roc_ml_reg_read64(&mldev->roc, ML_CFG));\n+\n+\tmldev->state = ML_CN10K_DEV_STATE_CONFIGURED;\n+\n+\treturn 0;\n+}\n+\n struct rte_ml_dev_ops cn10k_ml_ops = {\n \t/* Device control ops */\n-\t.dev_info_get = cn10k_ml_dev_info_get,\n-\t.dev_configure = cn10k_ml_dev_configure,\n-\t.dev_close = cn10k_ml_dev_close,\n+\t.dev_info_get = cn10k_ml_dev_info_get, .dev_configure = cn10k_ml_dev_configure,\n+\t.dev_close = cn10k_ml_dev_close, .dev_start = cn10k_ml_dev_start,\n+\t.dev_stop = cn10k_ml_dev_stop,\n };\n", "prefixes": [ "v1", "08/37" ] }