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GET /api/patches/120605/?format=api
{ "id": 120605, "url": "https://patches.dpdk.org/api/patches/120605/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221208200220.20267-5-syalavarthi@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221208200220.20267-5-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221208200220.20267-5-syalavarthi@marvell.com", "date": "2022-12-08T20:01:47", "name": "[v1,04/37] ml/cnxk: add support for configure and close", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "ed62ed5656728034fd76624c8fa7df81333ce6f3", "submitter": { "id": 2480, "url": "https://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221208200220.20267-5-syalavarthi@marvell.com/mbox/", "series": [ { "id": 26049, "url": "https://patches.dpdk.org/api/series/26049/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26049", "date": "2022-12-08T20:01:43", "name": "Implementation of ML CNXK driver", "version": 1, "mbox": "https://patches.dpdk.org/series/26049/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/120605/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/120605/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9DBB9A0093;\n\tThu, 8 Dec 2022 21:02:50 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A2D0842D38;\n\tThu, 8 Dec 2022 21:02:32 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 2BC64410D2\n for <dev@dpdk.org>; Thu, 8 Dec 2022 21:02:28 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2B8JjnO6005114 for <dev@dpdk.org>; Thu, 8 Dec 2022 12:02:27 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3m86usnfsn-4\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Thu, 08 Dec 2022 12:02:27 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 8 Dec 2022 12:02:24 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Thu, 8 Dec 2022 12:02:24 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 7D4793F7070;\n Thu, 8 Dec 2022 12:02:24 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=hhfAsIqDGK1y17g2b7WnjdU3Q5tf63mVT9QGSy046Cs=;\n b=C5iXako0DUyCv8yi2JTL5wP+mrfCPw1rXD6nEzNnvBhLB7q0cpsIU6Gz8SAj8Oi+ZWtg\n Iiom2bAoioc0dS3HQapHfkngum1tb6D50moy0BuKfcsEj4vLRvpMBcPrUFysWPNQnT5o\n PToCrFEQp7PtoYIJb9zH5YzxPggwF7uUU9Zhh4oRKpkMRmainrUgRcd9uxAVgBAr28Yl\n qfu0c4ILA7PjIqXEgYycpDXRCXst3ijb32QBnv3FcVTJTRp8B1Cyoi4frJPFUN4GDfGs\n /hif1pHPd0aEmHau6RS6Uq0zrdpjMkJIB7g8WaTjlFlglCj4yja9gwFFXPlFGGLqAEkN yg==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>", "Subject": "[PATCH v1 04/37] ml/cnxk: add support for configure and close", "Date": "Thu, 8 Dec 2022 12:01:47 -0800", "Message-ID": "<20221208200220.20267-5-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20221208200220.20267-1-syalavarthi@marvell.com>", "References": "<20221208200220.20267-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "unlyoePJAM5Y7PYk0LZLL1XjtoH3b9s9", "X-Proofpoint-ORIG-GUID": "unlyoePJAM5Y7PYk0LZLL1XjtoH3b9s9", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-08_11,2022-12-08_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implemented driver functions to configure and close ML devices.\nAdded skeleton code and support to reconfigure ML device. PCI\ndevice remove is enabled in device close.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_dev.c | 2 ++\n drivers/ml/cnxk/cn10k_ml_dev.h | 21 ++++++++++++\n drivers/ml/cnxk/cn10k_ml_ops.c | 60 ++++++++++++++++++++++++++++++++++\n 3 files changed, 83 insertions(+)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_dev.c b/drivers/ml/cnxk/cn10k_ml_dev.c\nindex c2e93c9a1a..fd45226add 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.c\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.c\n@@ -65,6 +65,8 @@ cn10k_ml_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_de\n \tdev->dequeue_burst = NULL;\n \tdev->op_error_get = NULL;\n \n+\tmldev->state = ML_CN10K_DEV_STATE_PROBED;\n+\n \treturn 0;\n \n pmd_destroy:\ndiff --git a/drivers/ml/cnxk/cn10k_ml_dev.h b/drivers/ml/cnxk/cn10k_ml_dev.h\nindex eeaf83ce5c..bda7a5b3ff 100644\n--- a/drivers/ml/cnxk/cn10k_ml_dev.h\n+++ b/drivers/ml/cnxk/cn10k_ml_dev.h\n@@ -25,10 +25,31 @@\n /* Maximum number of segments for IO data */\n #define ML_CN10K_MAX_SEGMENTS 1\n \n+/* ML command timeout in seconds */\n+#define ML_CN10K_CMD_TIMEOUT 5\n+\n+/* Device configuration state enum */\n+enum cn10k_ml_dev_state {\n+\t/* Device probed and not configured */\n+\tML_CN10K_DEV_STATE_PROBED = 0,\n+\n+\t/* Device configured */\n+\tML_CN10K_DEV_STATE_CONFIGURED,\n+\n+\t/* Device started */\n+\tML_CN10K_DEV_STATE_STARTED,\n+\n+\t/* Device closed */\n+\tML_CN10K_DEV_STATE_CLOSED\n+};\n+\n /* Device private data */\n struct cn10k_ml_dev {\n \t/* ML device ROC */\n \tstruct roc_ml roc;\n+\n+\t/* Configuration state */\n+\tenum cn10k_ml_dev_state state;\n };\n \n #endif /* _CN10K_ML_DEV_H_ */\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex bad5ad4713..32d38569a3 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -25,7 +25,67 @@ cn10k_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info)\n \treturn 0;\n }\n \n+static int\n+cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *conf)\n+{\n+\tstruct rte_ml_dev_info dev_info;\n+\tstruct cn10k_ml_dev *mldev;\n+\n+\tif (dev == NULL || conf == NULL)\n+\t\treturn -EINVAL;\n+\n+\t/* Get CN10K device handle */\n+\tmldev = dev->data->dev_private;\n+\n+\tcn10k_ml_dev_info_get(dev, &dev_info);\n+\tif (conf->nb_models > dev_info.max_models) {\n+\t\tplt_err(\"Invalid device config, nb_models > %d\\n\", dev_info.max_models);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (conf->nb_queue_pairs > dev_info.max_queue_pairs) {\n+\t\tplt_err(\"Invalid device config, nb_queue_pairs > %u\\n\", dev_info.max_queue_pairs);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (mldev->state == ML_CN10K_DEV_STATE_PROBED) {\n+\t\tplt_ml_dbg(\"Configuring ML device, nb_queue_pairs = %u, nb_models = %u\",\n+\t\t\t conf->nb_queue_pairs, conf->nb_models);\n+\t} else if (mldev->state == ML_CN10K_DEV_STATE_CONFIGURED) {\n+\t\tplt_ml_dbg(\"Re-configuring ML device, nb_queue_pairs = %u, nb_models = %u\",\n+\t\t\t conf->nb_queue_pairs, conf->nb_models);\n+\t} else if (mldev->state == ML_CN10K_DEV_STATE_STARTED) {\n+\t\tplt_err(\"Device can't be reconfigured in started state\\n\");\n+\t\treturn -ENOTSUP;\n+\t} else if (mldev->state == ML_CN10K_DEV_STATE_CLOSED) {\n+\t\tplt_err(\"Device can't be reconfigured after close\\n\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tmldev->state = ML_CN10K_DEV_STATE_CONFIGURED;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_ml_dev_close(struct rte_ml_dev *dev)\n+{\n+\tstruct cn10k_ml_dev *mldev;\n+\n+\tif (dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tmldev = dev->data->dev_private;\n+\n+\tmldev->state = ML_CN10K_DEV_STATE_CLOSED;\n+\n+\t/* Remove PCI device */\n+\treturn rte_dev_remove(dev->device);\n+}\n+\n struct rte_ml_dev_ops cn10k_ml_ops = {\n \t/* Device control ops */\n \t.dev_info_get = cn10k_ml_dev_info_get,\n+\t.dev_configure = cn10k_ml_dev_configure,\n+\t.dev_close = cn10k_ml_dev_close,\n };\n", "prefixes": [ "v1", "04/37" ] }