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GET /api/patches/120569/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 120569,
    "url": "https://patches.dpdk.org/api/patches/120569/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221208075309.37852-15-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221208075309.37852-15-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221208075309.37852-15-beilei.xing@intel.com",
    "date": "2022-12-08T07:53:08",
    "name": "[14/15] common/idpf: add vec queue setup",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "10c29e0aca1e4ff48374788e932ff1dbc032fbe4",
    "submitter": {
        "id": 410,
        "url": "https://patches.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "https://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221208075309.37852-15-beilei.xing@intel.com/mbox/",
    "series": [
        {
            "id": 26041,
            "url": "https://patches.dpdk.org/api/series/26041/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=26041",
            "date": "2022-12-08T07:52:54",
            "name": "net/idpf: refactor idpf pmd",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/26041/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/120569/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/120569/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3B752A00C2;\n\tThu,  8 Dec 2022 08:55:08 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7647442D7A;\n\tThu,  8 Dec 2022 08:53:51 +0100 (CET)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by mails.dpdk.org (Postfix) with ESMTP id 15ED842D63\n for <dev@dpdk.org>; Thu,  8 Dec 2022 08:53:48 +0100 (CET)",
            "from fmsmga004.fm.intel.com ([10.253.24.48])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Dec 2022 23:53:48 -0800",
            "from dpdk-beileix-3.sh.intel.com ([10.67.110.253])\n by fmsmga004.fm.intel.com with ESMTP; 07 Dec 2022 23:53:46 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1670486029; x=1702022029;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=PW+X0tRfqVnclNGVd1aEoQduIgr6UH3IvJwO5g0VBo8=;\n b=Pr5EozFHNgMAgWedx/SpZT9TtmlzLlXFtUDYjMOE/+ywy64B+ckILDtr\n m6RFpI0WtseGM7b3JCpdvW2dAbHZKgxAwbxLVE6TqZRZOwU8FnLmDmdbG\n M5Jf0II1HvElsiVVn+8m06S1FoVHPLrQE9JCCUvU7XH9yAEII+wueCKKA\n U3j8LY5D5ljWY0D2Z7VG6gwEjube83wzLMLmL69JYb8tnF+qTt5bhdg9u\n 1vpvsVoJmux2JD0L4KkRXb8R2e5fa4g6CR8vntQuCjJAinqbj+Ma9RlQX\n rpzJ6c9TyRFW5nDUHTUfJMTlLDRjwUo5eDLXkjnRcMJL4E75PUfA3elvg A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10554\"; a=\"318244231\"",
            "E=Sophos;i=\"5.96,227,1665471600\"; d=\"scan'208\";a=\"318244231\"",
            "E=McAfee;i=\"6500,9779,10554\"; a=\"715499397\"",
            "E=Sophos;i=\"5.96,227,1665471600\"; d=\"scan'208\";a=\"715499397\""
        ],
        "X-ExtLoop1": "1",
        "From": "beilei.xing@intel.com",
        "To": "jingjing.wu@intel.com,\n\tqi.z.zhang@intel.com",
        "Cc": "dev@dpdk.org,\n\tBeilei Xing <beilei.xing@intel.com>",
        "Subject": "[PATCH 14/15] common/idpf: add vec queue setup",
        "Date": "Thu,  8 Dec 2022 07:53:08 +0000",
        "Message-Id": "<20221208075309.37852-15-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20221208075309.37852-1-beilei.xing@intel.com>",
        "References": "<20221208075309.37852-1-beilei.xing@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Beilei Xing <beilei.xing@intel.com>\n\nAdd vector queue setup for single queue model.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/common/idpf/idpf_common_rxtx.c | 57 ++++++++++++++++++++++++++\n drivers/common/idpf/idpf_common_rxtx.h |  2 +\n drivers/common/idpf/version.map        |  1 +\n drivers/net/idpf/idpf_rxtx.c           | 57 --------------------------\n drivers/net/idpf/idpf_rxtx.h           |  1 -\n 5 files changed, 60 insertions(+), 58 deletions(-)",
    "diff": "diff --git a/drivers/common/idpf/idpf_common_rxtx.c b/drivers/common/idpf/idpf_common_rxtx.c\nindex 3030f89bf1..7618819e68 100644\n--- a/drivers/common/idpf/idpf_common_rxtx.c\n+++ b/drivers/common/idpf/idpf_common_rxtx.c\n@@ -1397,3 +1397,60 @@ idpf_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,\n \n \treturn i;\n }\n+\n+static void __rte_cold\n+release_rxq_mbufs_vec(struct idpf_rx_queue *rxq)\n+{\n+\tconst uint16_t mask = rxq->nb_rx_desc - 1;\n+\tuint16_t i;\n+\n+\tif (rxq->sw_ring == NULL || rxq->rxrearm_nb >= rxq->nb_rx_desc)\n+\t\treturn;\n+\n+\t/* free all mbufs that are valid in the ring */\n+\tif (rxq->rxrearm_nb == 0) {\n+\t\tfor (i = 0; i < rxq->nb_rx_desc; i++) {\n+\t\t\tif (rxq->sw_ring[i] != NULL)\n+\t\t\t\trte_pktmbuf_free_seg(rxq->sw_ring[i]);\n+\t\t}\n+\t} else {\n+\t\tfor (i = rxq->rx_tail; i != rxq->rxrearm_start; i = (i + 1) & mask) {\n+\t\t\tif (rxq->sw_ring[i] != NULL)\n+\t\t\t\trte_pktmbuf_free_seg(rxq->sw_ring[i]);\n+\t\t}\n+\t}\n+\n+\trxq->rxrearm_nb = rxq->nb_rx_desc;\n+\n+\t/* set all entries to NULL */\n+\tmemset(rxq->sw_ring, 0, sizeof(rxq->sw_ring[0]) * rxq->nb_rx_desc);\n+}\n+\n+static const struct idpf_rxq_ops def_singleq_rx_ops_vec = {\n+\t.release_mbufs = release_rxq_mbufs_vec,\n+};\n+\n+static inline int\n+idpf_singleq_rx_vec_setup_default(struct idpf_rx_queue *rxq)\n+{\n+\tuintptr_t p;\n+\tstruct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */\n+\n+\tmb_def.nb_segs = 1;\n+\tmb_def.data_off = RTE_PKTMBUF_HEADROOM;\n+\tmb_def.port = rxq->port_id;\n+\trte_mbuf_refcnt_set(&mb_def, 1);\n+\n+\t/* prevent compiler reordering: rearm_data covers previous fields */\n+\trte_compiler_barrier();\n+\tp = (uintptr_t)&mb_def.rearm_data;\n+\trxq->mbuf_initializer = *(uint64_t *)p;\n+\treturn 0;\n+}\n+\n+int __rte_cold\n+idpf_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)\n+{\n+\trxq->ops = &def_singleq_rx_ops_vec;\n+\treturn idpf_singleq_rx_vec_setup_default(rxq);\n+}\ndiff --git a/drivers/common/idpf/idpf_common_rxtx.h b/drivers/common/idpf/idpf_common_rxtx.h\nindex 2da2a6dc49..ea6c6b78e9 100644\n--- a/drivers/common/idpf/idpf_common_rxtx.h\n+++ b/drivers/common/idpf/idpf_common_rxtx.h\n@@ -252,5 +252,7 @@ uint16_t idpf_singleq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n __rte_internal\n uint16_t idpf_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\tuint16_t nb_pkts);\n+__rte_internal\n+int idpf_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);\n \n #endif /* _IDPF_COMMON_RXTX_H_ */\ndiff --git a/drivers/common/idpf/version.map b/drivers/common/idpf/version.map\nindex bc2a069735..d022c72971 100644\n--- a/drivers/common/idpf/version.map\n+++ b/drivers/common/idpf/version.map\n@@ -43,6 +43,7 @@ INTERNAL {\n \tidpf_singleq_recv_pkts;\n \tidpf_singleq_xmit_pkts;\n \tidpf_prep_pkts;\n+\tidpf_singleq_rx_vec_setup;\n \n \tlocal: *;\n };\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex fbf2a8f0cd..b6d4e5abd0 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -746,63 +746,6 @@ idpf_stop_queues(struct rte_eth_dev *dev)\n \t}\n }\n \n-static void __rte_cold\n-release_rxq_mbufs_vec(struct idpf_rx_queue *rxq)\n-{\n-\tconst uint16_t mask = rxq->nb_rx_desc - 1;\n-\tuint16_t i;\n-\n-\tif (rxq->sw_ring == NULL || rxq->rxrearm_nb >= rxq->nb_rx_desc)\n-\t\treturn;\n-\n-\t/* free all mbufs that are valid in the ring */\n-\tif (rxq->rxrearm_nb == 0) {\n-\t\tfor (i = 0; i < rxq->nb_rx_desc; i++) {\n-\t\t\tif (rxq->sw_ring[i] != NULL)\n-\t\t\t\trte_pktmbuf_free_seg(rxq->sw_ring[i]);\n-\t\t}\n-\t} else {\n-\t\tfor (i = rxq->rx_tail; i != rxq->rxrearm_start; i = (i + 1) & mask) {\n-\t\t\tif (rxq->sw_ring[i] != NULL)\n-\t\t\t\trte_pktmbuf_free_seg(rxq->sw_ring[i]);\n-\t\t}\n-\t}\n-\n-\trxq->rxrearm_nb = rxq->nb_rx_desc;\n-\n-\t/* set all entries to NULL */\n-\tmemset(rxq->sw_ring, 0, sizeof(rxq->sw_ring[0]) * rxq->nb_rx_desc);\n-}\n-\n-static const struct idpf_rxq_ops def_singleq_rx_ops_vec = {\n-\t.release_mbufs = release_rxq_mbufs_vec,\n-};\n-\n-static inline int\n-idpf_singleq_rx_vec_setup_default(struct idpf_rx_queue *rxq)\n-{\n-\tuintptr_t p;\n-\tstruct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */\n-\n-\tmb_def.nb_segs = 1;\n-\tmb_def.data_off = RTE_PKTMBUF_HEADROOM;\n-\tmb_def.port = rxq->port_id;\n-\trte_mbuf_refcnt_set(&mb_def, 1);\n-\n-\t/* prevent compiler reordering: rearm_data covers previous fields */\n-\trte_compiler_barrier();\n-\tp = (uintptr_t)&mb_def.rearm_data;\n-\trxq->mbuf_initializer = *(uint64_t *)p;\n-\treturn 0;\n-}\n-\n-int __rte_cold\n-idpf_singleq_rx_vec_setup(struct idpf_rx_queue *rxq)\n-{\n-\trxq->ops = &def_singleq_rx_ops_vec;\n-\treturn idpf_singleq_rx_vec_setup_default(rxq);\n-}\n-\n void\n idpf_set_rx_function(struct rte_eth_dev *dev)\n {\ndiff --git a/drivers/net/idpf/idpf_rxtx.h b/drivers/net/idpf/idpf_rxtx.h\nindex eab363c3e7..a985dc2cf5 100644\n--- a/drivers/net/idpf/idpf_rxtx.h\n+++ b/drivers/net/idpf/idpf_rxtx.h\n@@ -44,7 +44,6 @@ void idpf_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);\n int idpf_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\t\tuint16_t nb_desc, unsigned int socket_id,\n \t\t\tconst struct rte_eth_txconf *tx_conf);\n-int idpf_singleq_rx_vec_setup(struct idpf_rx_queue *rxq);\n int idpf_tx_queue_init(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n int idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n int idpf_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n",
    "prefixes": [
        "14/15"
    ]
}