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Update a patch.

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Update a patch.

GET /api/patches/119355/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 119355,
    "url": "https://patches.dpdk.org/api/patches/119355/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221031083346.16558-16-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221031083346.16558-16-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221031083346.16558-16-beilei.xing@intel.com",
    "date": "2022-10-31T08:33:43",
    "name": "[v18,15/18] net/idpf: add support for Rx offloading",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "1aa78dd1c61696f604e8ceaec4c96c76bc0ddf29",
    "submitter": {
        "id": 410,
        "url": "https://patches.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221031083346.16558-16-beilei.xing@intel.com/mbox/",
    "series": [
        {
            "id": 25492,
            "url": "https://patches.dpdk.org/api/series/25492/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25492",
            "date": "2022-10-31T08:33:28",
            "name": "add support for idpf PMD in DPDK",
            "version": 18,
            "mbox": "https://patches.dpdk.org/series/25492/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/119355/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/119355/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7CEB8A00C2;\n\tMon, 31 Oct 2022 10:06:26 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3C33842BA6;\n\tMon, 31 Oct 2022 10:04:56 +0100 (CET)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 998024282E\n for <dev@dpdk.org>; Mon, 31 Oct 2022 10:04:31 +0100 (CET)",
            "from fmsmga006.fm.intel.com ([10.253.24.20])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 31 Oct 2022 02:04:30 -0700",
            "from dpdk-beileix-3.sh.intel.com ([10.67.110.253])\n by fmsmga006.fm.intel.com with ESMTP; 31 Oct 2022 02:04:24 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1667207071; x=1698743071;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=5rMWBxa9m5j0aPYu9kicTt9PwRayfVE/iv6Pv7zetVU=;\n b=ihzScHMId/119tl4o/9VUMdi+f+y1Z70coFzPNEG+vjcIfYRCtj4FXg+\n yhy7zeVyc7836dKf4pJg1TKdjlKHR3H/DY2mFk9UwQ/wgIc59CAu/6PB+\n VNY2jhYEc+5ktwkUUjO0YBTkDqjyz/rAbgYLlbBdPchgV1zc/GPwkWJsE\n UsAeVuzoSD1YDZs2lBUXQeGVnUI0BVnmzJK3vMkWHLI4FgLZcFHew7Mc+\n SwLK8OrNBbSb3o93Ctst7kOvFSnFZmIwge2HoBtMYvusEa4w8NhgjkBMf\n eLLMcQ7g3le/rGZCwur5nbAfGvAjKn5e9jaqC2enjrkINorKZ3RdD3FF6 A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10516\"; a=\"335507848\"",
            "E=Sophos;i=\"5.95,227,1661842800\"; d=\"scan'208\";a=\"335507848\"",
            "E=McAfee;i=\"6500,9779,10516\"; a=\"878664918\"",
            "E=Sophos;i=\"5.95,227,1661842800\"; d=\"scan'208\";a=\"878664918\""
        ],
        "X-ExtLoop1": "1",
        "From": "beilei.xing@intel.com",
        "To": "jingjing.wu@intel.com,\n\tbeilei.xing@intel.com",
        "Cc": "dev@dpdk.org, Junfeng Guo <junfeng.guo@intel.com>,\n Xiaoyun Li <xiaoyun.li@intel.com>",
        "Subject": "[PATCH v18 15/18] net/idpf: add support for Rx offloading",
        "Date": "Mon, 31 Oct 2022 08:33:43 +0000",
        "Message-Id": "<20221031083346.16558-16-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20221031083346.16558-1-beilei.xing@intel.com>",
        "References": "<20221031051556.98549-1-beilei.xing@intel.com>\n <20221031083346.16558-1-beilei.xing@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Junfeng Guo <junfeng.guo@intel.com>\n\nAdd Rx offloading support:\n - support CHKSUM and RSS offload for split queue model\n - support CHKSUM offload for single queue model\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n doc/guides/nics/features/idpf.ini |   5 ++\n drivers/net/idpf/idpf_ethdev.c    |   6 ++\n drivers/net/idpf/idpf_rxtx.c      | 123 ++++++++++++++++++++++++++++++\n drivers/net/idpf/idpf_vchnl.c     |  18 +++++\n 4 files changed, 152 insertions(+)",
    "diff": "diff --git a/doc/guides/nics/features/idpf.ini b/doc/guides/nics/features/idpf.ini\nindex d722c49fde..868571654f 100644\n--- a/doc/guides/nics/features/idpf.ini\n+++ b/doc/guides/nics/features/idpf.ini\n@@ -3,8 +3,13 @@\n ;\n ; Refer to default.ini for the full list of available PMD features.\n ;\n+; A feature with \"P\" indicates only be supported when non-vector path\n+; is selected.\n+;\n [Features]\n MTU update           = Y\n+L3 checksum offload  = P\n+L4 checksum offload  = P\n Linux                = Y\n x86-32               = Y\n x86-64               = Y\ndiff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c\nindex 58560ea404..a09f104425 100644\n--- a/drivers/net/idpf/idpf_ethdev.c\n+++ b/drivers/net/idpf/idpf_ethdev.c\n@@ -61,6 +61,12 @@ idpf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \n \tdev_info->flow_type_rss_offloads = IDPF_RSS_OFFLOAD_ALL;\n \n+\tdev_info->rx_offload_capa =\n+\t\tRTE_ETH_RX_OFFLOAD_IPV4_CKSUM           |\n+\t\tRTE_ETH_RX_OFFLOAD_UDP_CKSUM            |\n+\t\tRTE_ETH_RX_OFFLOAD_TCP_CKSUM            |\n+\t\tRTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM;\n+\n \tdev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS;\n \n \tdev_info->default_txconf = (struct rte_eth_txconf) {\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex a980714060..f15e61a785 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -1209,6 +1209,73 @@ idpf_stop_queues(struct rte_eth_dev *dev)\n \t}\n }\n \n+#define IDPF_RX_FLEX_DESC_ADV_STATUS0_XSUM_S\t\t\t\t\\\n+\t(RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_S) |     \\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_S) |     \\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_S) |    \\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EUDPE_S))\n+\n+static inline uint64_t\n+idpf_splitq_rx_csum_offload(uint8_t err)\n+{\n+\tuint64_t flags = 0;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_L3L4P_S)) == 0))\n+\t\treturn flags;\n+\n+\tif (likely((err & IDPF_RX_FLEX_DESC_ADV_STATUS0_XSUM_S) == 0)) {\n+\t\tflags |= (RTE_MBUF_F_RX_IP_CKSUM_GOOD |\n+\t\t\t  RTE_MBUF_F_RX_L4_CKSUM_GOOD);\n+\t\treturn flags;\n+\t}\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_IPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_L4E_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EIPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;\n+\n+\tif (unlikely((err & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_XSUM_EUDPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD;\n+\n+\treturn flags;\n+}\n+\n+#define IDPF_RX_FLEX_DESC_ADV_HASH1_S  0\n+#define IDPF_RX_FLEX_DESC_ADV_HASH2_S  16\n+#define IDPF_RX_FLEX_DESC_ADV_HASH3_S  24\n+\n+static inline uint64_t\n+idpf_splitq_rx_rss_offload(struct rte_mbuf *mb,\n+\t\t\t   volatile struct virtchnl2_rx_flex_desc_adv_nic_3 *rx_desc)\n+{\n+\tuint8_t status_err0_qw0;\n+\tuint64_t flags = 0;\n+\n+\tstatus_err0_qw0 = rx_desc->status_err0_qw0;\n+\n+\tif ((status_err0_qw0 & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_ADV_STATUS0_RSS_VALID_S)) != 0) {\n+\t\tflags |= RTE_MBUF_F_RX_RSS_HASH;\n+\t\tmb->hash.rss = (rte_le_to_cpu_16(rx_desc->hash1) <<\n+\t\t\t\tIDPF_RX_FLEX_DESC_ADV_HASH1_S) |\n+\t\t\t((uint32_t)(rx_desc->ff2_mirrid_hash2.hash2) <<\n+\t\t\t IDPF_RX_FLEX_DESC_ADV_HASH2_S) |\n+\t\t\t((uint32_t)(rx_desc->hash3) <<\n+\t\t\t IDPF_RX_FLEX_DESC_ADV_HASH3_S);\n+\t}\n+\n+\treturn flags;\n+}\n+\n static void\n idpf_split_rx_bufq_refill(struct idpf_rx_queue *rx_bufq)\n {\n@@ -1282,9 +1349,11 @@ idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tuint16_t pktlen_gen_bufq_id;\n \tstruct idpf_rx_queue *rxq;\n \tconst uint32_t *ptype_tbl;\n+\tuint8_t status_err0_qw1;\n \tstruct rte_mbuf *rxm;\n \tuint16_t rx_id_bufq1;\n \tuint16_t rx_id_bufq2;\n+\tuint64_t pkt_flags;\n \tuint16_t pkt_len;\n \tuint16_t bufq_id;\n \tuint16_t gen_id;\n@@ -1349,11 +1418,18 @@ idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm->next = NULL;\n \t\trxm->nb_segs = 1;\n \t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n \t\trxm->packet_type =\n \t\t\tptype_tbl[(rte_le_to_cpu_16(rx_desc->ptype_err_fflags0) &\n \t\t\t\t   VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_M) >>\n \t\t\t\t  VIRTCHNL2_RX_FLEX_DESC_ADV_PTYPE_S];\n \n+\t\tstatus_err0_qw1 = rx_desc->status_err0_qw1;\n+\t\tpkt_flags = idpf_splitq_rx_csum_offload(status_err0_qw1);\n+\t\tpkt_flags |= idpf_splitq_rx_rss_offload(rxm, rx_desc);\n+\n+\t\trxm->ol_flags |= pkt_flags;\n+\n \t\trx_pkts[nb_rx++] = rxm;\n \t}\n \n@@ -1513,6 +1589,48 @@ idpf_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \treturn nb_tx;\n }\n \n+#define IDPF_RX_FLEX_DESC_STATUS0_XSUM_S\t\t\t\t\\\n+\t(RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |\t\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_L4E_S) |\t\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S) |\t\\\n+\t RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S))\n+\n+/* Translate the rx descriptor status and error fields to pkt flags */\n+static inline uint64_t\n+idpf_rxd_to_pkt_flags(uint16_t status_error)\n+{\n+\tuint64_t flags = 0;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_L3L4P_S)) == 0))\n+\t\treturn flags;\n+\n+\tif (likely((status_error & IDPF_RX_FLEX_DESC_STATUS0_XSUM_S) == 0)) {\n+\t\tflags |= (RTE_MBUF_F_RX_IP_CKSUM_GOOD |\n+\t\t\t  RTE_MBUF_F_RX_L4_CKSUM_GOOD);\n+\t\treturn flags;\n+\t}\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_IPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_L4E_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_IP_CKSUM_BAD;\n+\n+\tif (unlikely((status_error & RTE_BIT32(VIRTCHNL2_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S)) != 0))\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_BAD;\n+\telse\n+\t\tflags |= RTE_MBUF_F_RX_OUTER_L4_CKSUM_GOOD;\n+\n+\treturn flags;\n+}\n+\n static inline void\n idpf_update_rx_tail(struct idpf_rx_queue *rxq, uint16_t nb_hold,\n \t\t    uint16_t rx_id)\n@@ -1546,6 +1664,7 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \tstruct rte_mbuf *rxm;\n \tstruct rte_mbuf *nmb;\n \tuint16_t rx_status0;\n+\tuint64_t pkt_flags;\n \tuint64_t dma_addr;\n \tuint16_t nb_rx;\n \n@@ -1611,10 +1730,14 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\trxm->pkt_len = rx_packet_len;\n \t\trxm->data_len = rx_packet_len;\n \t\trxm->port = rxq->port_id;\n+\t\trxm->ol_flags = 0;\n+\t\tpkt_flags = idpf_rxd_to_pkt_flags(rx_status0);\n \t\trxm->packet_type =\n \t\t\tptype_tbl[(uint8_t)(rte_cpu_to_le_16(rxd.flex_nic_wb.ptype_flex_flags0) &\n \t\t\t\t\t    VIRTCHNL2_RX_FLEX_DESC_PTYPE_M)];\n \n+\t\trxm->ol_flags |= pkt_flags;\n+\n \t\trx_pkts[nb_rx++] = rxm;\n \t}\n \trxq->rx_tail = rx_id;\ndiff --git a/drivers/net/idpf/idpf_vchnl.c b/drivers/net/idpf/idpf_vchnl.c\nindex 4ef354df89..00ac5b2a6b 100644\n--- a/drivers/net/idpf/idpf_vchnl.c\n+++ b/drivers/net/idpf/idpf_vchnl.c\n@@ -528,6 +528,24 @@ idpf_vc_get_caps(struct idpf_adapter *adapter)\n \n \tmemset(&caps_msg, 0, sizeof(struct virtchnl2_get_capabilities));\n \n+\tcaps_msg.csum_caps =\n+\t\tVIRTCHNL2_CAP_TX_CSUM_L3_IPV4          |\n+\t\tVIRTCHNL2_CAP_TX_CSUM_L4_IPV4_TCP      |\n+\t\tVIRTCHNL2_CAP_TX_CSUM_L4_IPV4_UDP      |\n+\t\tVIRTCHNL2_CAP_TX_CSUM_L4_IPV4_SCTP     |\n+\t\tVIRTCHNL2_CAP_TX_CSUM_L4_IPV6_TCP      |\n+\t\tVIRTCHNL2_CAP_TX_CSUM_L4_IPV6_UDP      |\n+\t\tVIRTCHNL2_CAP_TX_CSUM_L4_IPV6_SCTP     |\n+\t\tVIRTCHNL2_CAP_TX_CSUM_GENERIC          |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_L3_IPV4          |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_L4_IPV4_TCP      |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_L4_IPV4_UDP      |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_L4_IPV4_SCTP     |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_L4_IPV6_TCP      |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_L4_IPV6_UDP      |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_L4_IPV6_SCTP     |\n+\t\tVIRTCHNL2_CAP_RX_CSUM_GENERIC;\n+\n \tcaps_msg.rss_caps =\n \t\tVIRTCHNL2_CAP_RSS_IPV4_TCP             |\n \t\tVIRTCHNL2_CAP_RSS_IPV4_UDP             |\n",
    "prefixes": [
        "v18",
        "15/18"
    ]
}