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GET /api/patches/118988/?format=api
{ "id": 118988, "url": "https://patches.dpdk.org/api/patches/118988/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221024123335.3163331-2-michaelba@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221024123335.3163331-2-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221024123335.3163331-2-michaelba@nvidia.com", "date": "2022-10-24T12:33:34", "name": "[1/2] common/mlx5: fix miss null check in devargs parsing", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "94e02e204006661c62baf17a0509d9525eb9a587", "submitter": { "id": 1949, "url": "https://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221024123335.3163331-2-michaelba@nvidia.com/mbox/", "series": [ { "id": 25384, "url": "https://patches.dpdk.org/api/series/25384/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25384", "date": "2022-10-24T12:33:33", "name": "mlx5: fix miss NULL check in devargs parsing", "version": 1, "mbox": "https://patches.dpdk.org/series/25384/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/118988/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/118988/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A64A1A034C;\n\tMon, 24 Oct 2022 14:33:52 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 98DEB42B83;\n\tMon, 24 Oct 2022 14:33:52 +0200 (CEST)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2086.outbound.protection.outlook.com [40.107.220.86])\n by mails.dpdk.org (Postfix) with ESMTP id 09D3340695;\n Mon, 24 Oct 2022 14:33:51 +0200 (CEST)", "from CY5PR15CA0222.namprd15.prod.outlook.com (2603:10b6:930:88::17)\n by DM4PR12MB5866.namprd12.prod.outlook.com (2603:10b6:8:65::6) with\n Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.5746.23; 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helo=mail.nvidia.com; pr=C", "From": "Michael Baum <michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, <michaelba@nvidia.com>,\n <stable@dpdk.org>", "Subject": "[PATCH 1/2] common/mlx5: fix miss null check in devargs parsing", "Date": "Mon, 24 Oct 2022 15:33:34 +0300", "Message-ID": "<20221024123335.3163331-2-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221024123335.3163331-1-michaelba@nvidia.com>", "References": "<20221024123335.3163331-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000B8EA:EE_|DM4PR12MB5866:EE_", "X-MS-Office365-Filtering-Correlation-Id": "5f67dc6e-9f5e-46ce-3a87-08dab5bc002d", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 3VSE291nfsjXMzc6Lgny/uZLqy+inyAP5W/2EZo+YU5de3ZauOd2MNGMtWfmtx14qK6Q+AH4xd/qcqBUmIK495aAGrWShuZGDQuwTXyuiP6rMG4xfUZrSL5HuvuZFyA4alOfNhLh2I10Vy35/HOLR9Jkc51c04Q2WhoUQDxXFlfUeqFlBWbWlo4Gcl6UmbujRUTokBM9U+wPaVfYXhscVHceQ2RaPKTjxh/eWOo50LinWZ5AOL5cJRwn7MF0lx0lv1ZZE+m5q2yJgC4A/m4OkOVLLu2h56OdMXqUr2FWFkEKMXBhKFlH8HPtNCmG+ZfAai4Vu28o4w6XmwtK3NxFKhYRYvyntzsqYlkFe0Fs4j6YUo9qjqyEOur1fbjAAKG9fWUcjV1zQpziQi6cZ5tkq9ss0I4FVUBszSZcQ0Pl04JUoi1G3DVl3XI4Fz32NIKT1m4rlUVYlS8kJ/+IfPkPZ5w0mMjc+2Dj7TXJxT+otqePyNFGcp/5MIWvzZZYtMT6Fj6MOzsrDYqUzKGomyhqO9ooz1WmZNPDaiQr4jQWtR2zsbm4MZDTaJEBil/Ln7AMfdChJ6dejwJSiTuIh/7HwdjEfo+3bz+ccvO9y5R/KAUQdzqU9sL0ZMAsF8oFrt+Vmpr8v1wOKuTZi3/25DM7fubn8W0R7MCa4Aq438RmjabwPWtP7qKYR3WkFYR74dSecHD4NVCFfWhk8Q7c1zuWr4bBdcTn1qloG564x1tXeXGhpPpOB6CWum6b8f6Ic8lv/hfENLsgpGlBPvcRrDfC+NCXgwM95ywEciQSMREgKb8ReSVLedc0FYMUe/Y1laAB", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(136003)(376002)(39860400002)(396003)(346002)(451199015)(46966006)(40470700004)(36840700001)(8676002)(36860700001)(82740400003)(47076005)(36756003)(6666004)(450100002)(83380400001)(426003)(4326008)(478600001)(2906002)(54906003)(26005)(316002)(82310400005)(356005)(8936002)(40460700003)(41300700001)(6916009)(86362001)(40480700001)(55016003)(7636003)(2616005)(6286002)(7696005)(5660300002)(186003)(336012)(1076003)(70586007)(70206006);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Oct 2022 12:33:48.6539 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 5f67dc6e-9f5e-46ce-3a87-08dab5bc002d", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000B8EA.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR12MB5866", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The common MLX5 probe function parses first the devargs and save them in\na dictionary.\nIt gets structure called \"devargs\" as a member of EAL device containing\nall needed information.\n\nWhen \"devargs\" structure is invalid, the function avoids parsing it.\nHowever, when it valid but its field \"args\" is invalid, the function\ntries to parse it and dereference to NULL pointer.\n\nThis patch adds check to avoid this NULL dereferencing.\n\nFixes: a729d2f093e9 (\"common/mlx5: refactor devargs management\")\nCc: michaelba@nvidia.com\nCc: stable@dpdk.org\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common.c | 8 +++++---\n 1 file changed, 5 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c\nindex 4dcc8cc49c..bf22c0694d 100644\n--- a/drivers/common/mlx5/mlx5_common.c\n+++ b/drivers/common/mlx5/mlx5_common.c\n@@ -164,8 +164,9 @@ mlx5_kvargs_prepare(struct mlx5_kvargs_ctrl *mkvlist,\n \tstruct rte_kvargs *kvlist;\n \tuint32_t i;\n \n-\tif (devargs == NULL)\n+\tif (mkvlist == NULL)\n \t\treturn 0;\n+\tMLX5_ASSERT(devargs != NULL && devargs->args != NULL);\n \tkvlist = rte_kvargs_parse(devargs->args, NULL);\n \tif (kvlist == NULL) {\n \t\trte_errno = EINVAL;\n@@ -400,8 +401,9 @@ parse_class_options(const struct rte_devargs *devargs,\n {\n \tint ret = 0;\n \n-\tif (devargs == NULL)\n+\tif (mkvlist == NULL)\n \t\treturn 0;\n+\tMLX5_ASSERT(devargs != NULL);\n \tif (devargs->cls != NULL && devargs->cls->name != NULL)\n \t\t/* Global syntax, only one class type. */\n \t\treturn class_name_to_value(devargs->cls->name);\n@@ -965,7 +967,7 @@ mlx5_common_dev_probe(struct rte_device *eal_dev)\n \tint ret;\n \n \tDRV_LOG(INFO, \"probe device \\\"%s\\\".\", eal_dev->name);\n-\tif (eal_dev->devargs != NULL)\n+\tif (eal_dev->devargs != NULL && eal_dev->devargs->args != NULL)\n \t\tmkvlist_p = &mkvlist;\n \tret = mlx5_kvargs_prepare(mkvlist_p, eal_dev->devargs);\n \tif (ret < 0) {\n", "prefixes": [ "1/2" ] }