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GET /api/patches/118492/?format=api
{ "id": 118492, "url": "https://patches.dpdk.org/api/patches/118492/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221018194131.23006-26-andrew.boyer@amd.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221018194131.23006-26-andrew.boyer@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221018194131.23006-26-andrew.boyer@amd.com", "date": "2022-10-18T19:41:20", "name": "[v2,25/36] net/ionic: add a lookup table for checksum flags", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "888bacc4a12126a76dac120324a7f022a6d58dde", "submitter": { "id": 2861, "url": "https://patches.dpdk.org/api/people/2861/?format=api", "name": "Andrew Boyer", "email": "Andrew.Boyer@amd.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221018194131.23006-26-andrew.boyer@amd.com/mbox/", "series": [ { "id": 25088, "url": "https://patches.dpdk.org/api/series/25088/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25088", "date": "2022-10-11T00:49:57", "name": "net/ionic: updates for 22.11 release", "version": 1, "mbox": "https://patches.dpdk.org/series/25088/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/118492/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/118492/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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b=yX7rNO3bcY9gep/PCJbSaYLGRhZEIU0kNt/al4fh4ntoHBcmadwCQAJxLD81B+sMk7MjZkdpgyVfwz4PAabSB0ceRxxgmUia2fHT2tsSuUp2FqY39waqT047L3YGRrnC8Hs3A5Hyoxna9SiUbIw0vYsgCI62CfQjfLo2uc8cfvo=", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 165.204.84.17)\n smtp.mailfrom=amd.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=amd.com;", "Received-SPF": "Pass (protection.outlook.com: domain of amd.com designates\n 165.204.84.17 as permitted sender) receiver=protection.outlook.com;\n client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C", "From": "Andrew Boyer <andrew.boyer@amd.com>", "To": "<dev@dpdk.org>", "CC": "Andrew Boyer <andrew.boyer@amd.com>", "Subject": "[PATCH v2 25/36] net/ionic: add a lookup table for checksum flags", "Date": "Tue, 18 Oct 2022 12:41:20 -0700", "Message-ID": "<20221018194131.23006-26-andrew.boyer@amd.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20221011005032.47584-1-andrew.boyer@amd.com>", "References": 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SFS:(13230022)(4636009)(39860400002)(396003)(346002)(136003)(376002)(451199015)(46966006)(40470700004)(36840700001)(6916009)(81166007)(356005)(83380400001)(47076005)(82740400003)(86362001)(316002)(41300700001)(8936002)(26005)(2906002)(6666004)(16526019)(186003)(426003)(336012)(40480700001)(478600001)(44832011)(40460700003)(2616005)(36756003)(1076003)(5660300002)(82310400005)(70586007)(70206006)(8676002)(4326008)(36860700001)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "18 Oct 2022 19:46:33.8451 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e10a14df-597b-40ce-51f6-08dab1417621", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT022.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR12MB5747", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This improves performance by reducing branching.\n\nSigned-off-by: Andrew Boyer <andrew.boyer@amd.com>\n---\n drivers/net/ionic/ionic_rxtx.c | 47 ++++++++++++++++++++++++----------\n 1 file changed, 33 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c\nindex 8a544c03d3..697e6dcc15 100644\n--- a/drivers/net/ionic/ionic_rxtx.c\n+++ b/drivers/net/ionic/ionic_rxtx.c\n@@ -804,6 +804,36 @@ ionic_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,\n \treturn 0;\n }\n \n+#define IONIC_CSUM_FLAG_MASK (IONIC_RXQ_COMP_CSUM_F_VLAN - 1)\n+static const uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK]\n+\t\t__rte_cache_aligned = {\n+\t/* IP_BAD set */\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_BAD] = RTE_MBUF_F_RX_IP_CKSUM_BAD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_BAD | IONIC_RXQ_COMP_CSUM_F_TCP_OK] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_GOOD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_BAD | IONIC_RXQ_COMP_CSUM_F_TCP_BAD] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_BAD | IONIC_RXQ_COMP_CSUM_F_UDP_OK] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_GOOD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_BAD | IONIC_RXQ_COMP_CSUM_F_UDP_BAD] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_BAD,\n+\t/* IP_OK set */\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_OK] = RTE_MBUF_F_RX_IP_CKSUM_GOOD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_OK | IONIC_RXQ_COMP_CSUM_F_TCP_OK] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_OK | IONIC_RXQ_COMP_CSUM_F_TCP_BAD] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_BAD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_OK | IONIC_RXQ_COMP_CSUM_F_UDP_OK] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD,\n+\t[IONIC_RXQ_COMP_CSUM_F_IP_OK | IONIC_RXQ_COMP_CSUM_F_UDP_BAD] =\n+\t\t\tRTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_BAD,\n+\t/* No IP flag set */\n+\t[IONIC_RXQ_COMP_CSUM_F_TCP_OK] = RTE_MBUF_F_RX_L4_CKSUM_GOOD,\n+\t[IONIC_RXQ_COMP_CSUM_F_TCP_BAD] = RTE_MBUF_F_RX_L4_CKSUM_BAD,\n+\t[IONIC_RXQ_COMP_CSUM_F_UDP_OK] = RTE_MBUF_F_RX_L4_CKSUM_GOOD,\n+\t[IONIC_RXQ_COMP_CSUM_F_UDP_BAD] = RTE_MBUF_F_RX_L4_CKSUM_BAD,\n+};\n+\n /* RTE_PTYPE_UNKNOWN is 0x0 */\n static const uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK]\n \t\t__rte_cache_aligned = {\n@@ -836,7 +866,7 @@ ionic_rx_clean_one(struct ionic_rx_qcq *rxq,\n \tuint32_t pkt_type;\n \tuint32_t left, i;\n \tuint16_t cq_desc_len;\n-\tuint8_t ptype;\n+\tuint8_t ptype, cflags;\n \tvoid **info;\n \n \tcq_desc_len = rte_le_to_cpu_16(cq_desc->len);\n@@ -894,19 +924,8 @@ ionic_rx_clean_one(struct ionic_rx_qcq *rxq,\n \n \t/* Checksum */\n \tif (cq_desc->csum_flags & IONIC_RXQ_COMP_CSUM_F_CALC) {\n-\t\tif (cq_desc->csum_flags & IONIC_RXQ_COMP_CSUM_F_IP_OK)\n-\t\t\tpkt_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n-\t\telse if (cq_desc->csum_flags & IONIC_RXQ_COMP_CSUM_F_IP_BAD)\n-\t\t\tpkt_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n-\n-\t\tif ((cq_desc->csum_flags & IONIC_RXQ_COMP_CSUM_F_TCP_OK) ||\n-\t\t\t(cq_desc->csum_flags & IONIC_RXQ_COMP_CSUM_F_UDP_OK))\n-\t\t\tpkt_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n-\t\telse if ((cq_desc->csum_flags &\n-\t\t\t\tIONIC_RXQ_COMP_CSUM_F_TCP_BAD) ||\n-\t\t\t\t(cq_desc->csum_flags &\n-\t\t\t\tIONIC_RXQ_COMP_CSUM_F_UDP_BAD))\n-\t\t\tpkt_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n+\t\tcflags = cq_desc->csum_flags & IONIC_CSUM_FLAG_MASK;\n+\t\tpkt_flags |= ionic_csum_flags[cflags];\n \t}\n \n \trxm->ol_flags = pkt_flags;\n", "prefixes": [ "v2", "25/36" ] }