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{
    "id": 118464,
    "url": "https://patches.dpdk.org/api/patches/118464/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221019003918.257506-30-hernan.vargas@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
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    "msgid": "<20221019003918.257506-30-hernan.vargas@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221019003918.257506-30-hernan.vargas@intel.com",
    "date": "2022-10-19T00:39:17",
    "name": "[v4,29/30] baseband/acc100: configure PMON control registers",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5d839358cf508de9ea1fdd25d04439db29e45bc8",
    "submitter": {
        "id": 2659,
        "url": "https://patches.dpdk.org/api/people/2659/?format=api",
        "name": "Hernan Vargas",
        "email": "hernan.vargas@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221019003918.257506-30-hernan.vargas@intel.com/mbox/",
    "series": [
        {
            "id": 25287,
            "url": "https://patches.dpdk.org/api/series/25287/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25287",
            "date": "2022-10-19T00:38:48",
            "name": "baseband/acc100: changes for 22.11",
            "version": 4,
            "mbox": "https://patches.dpdk.org/series/25287/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/118464/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/118464/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "X-Original-To": "patchwork@inbox.dpdk.org",
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        "X-ExtLoop1": "1",
        "From": "Hernan Vargas <hernan.vargas@intel.com>",
        "To": "dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,\n maxime.coquelin@redhat.com",
        "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>",
        "Subject": "[PATCH v4 29/30] baseband/acc100: configure PMON control registers",
        "Date": "Tue, 18 Oct 2022 17:39:17 -0700",
        "Message-Id": "<20221019003918.257506-30-hernan.vargas@intel.com>",
        "X-Mailer": "git-send-email 2.37.1",
        "In-Reply-To": "<20221019003918.257506-1-hernan.vargas@intel.com>",
        "References": "<20221019003918.257506-1-hernan.vargas@intel.com>",
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        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
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        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Enable performance monitor control registers.\n\nSigned-off-by: Hernan Vargas <hernan.vargas@intel.com>\nReviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>\n---\n drivers/baseband/acc/acc100_pmd.h | 4 ++++\n 1 file changed, 4 insertions(+)",
    "diff": "diff --git a/drivers/baseband/acc/acc100_pmd.h b/drivers/baseband/acc/acc100_pmd.h\nindex eb6349c85a..8c0aec5ed8 100644\n--- a/drivers/baseband/acc/acc100_pmd.h\n+++ b/drivers/baseband/acc/acc100_pmd.h\n@@ -115,6 +115,8 @@ struct acc100_registry_addr {\n \tunsigned int depth_log1_offset;\n \tunsigned int qman_group_func;\n \tunsigned int ddr_range;\n+\tunsigned int pmon_ctrl_a;\n+\tunsigned int pmon_ctrl_b;\n };\n \n /* Structure holding registry addresses for PF */\n@@ -144,6 +146,8 @@ static const struct acc100_registry_addr pf_reg_addr = {\n \t.depth_log1_offset = HWPfQmgrGrpDepthLog21Vf,\n \t.qman_group_func = HWPfQmgrGrpFunction0,\n \t.ddr_range = HWPfDmaVfDdrBaseRw,\n+\t.pmon_ctrl_a = HWVfPmACntrlRegVf,\n+\t.pmon_ctrl_b = HWVfPmBCntrlRegVf,\n };\n \n /* Structure holding registry addresses for VF */\n",
    "prefixes": [
        "v4",
        "29/30"
    ]
}