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GET /api/patches/118265/?format=api
{ "id": 118265, "url": "https://patches.dpdk.org/api/patches/118265/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1666006905-74029-5-git-send-email-andy.pei@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1666006905-74029-5-git-send-email-andy.pei@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1666006905-74029-5-git-send-email-andy.pei@intel.com", "date": "2022-10-17T11:41:41", "name": "[v6,4/8] vdpa/ifc: write queue count to MQ register", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d1073453dd7f930ac11de2350c0625810ece604e", "submitter": { "id": 1185, "url": "https://patches.dpdk.org/api/people/1185/?format=api", "name": "Pei, Andy", "email": "andy.pei@intel.com" }, "delegate": { "id": 2642, "url": "https://patches.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1666006905-74029-5-git-send-email-andy.pei@intel.com/mbox/", "series": [ { "id": 25258, "url": "https://patches.dpdk.org/api/series/25258/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25258", "date": "2022-10-17T11:41:37", "name": "vdpa/ifc: add multi queue support", "version": 6, "mbox": "https://patches.dpdk.org/series/25258/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/118265/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/118265/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 205EDA055F;\n\tMon, 17 Oct 2022 13:46:05 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B1087427EA;\n\tMon, 17 Oct 2022 13:45:50 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id 3E40E40A84\n for <dev@dpdk.org>; Mon, 17 Oct 2022 13:45:46 +0200 (CEST)", "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 17 Oct 2022 04:45:44 -0700", "from dpdk-dipei.sh.intel.com ([10.67.110.251])\n by orsmga007.jf.intel.com with ESMTP; 17 Oct 2022 04:45:42 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1666007146; x=1697543146;\n h=from:to:cc:subject:date:message-id:in-reply-to: references;\n bh=Vw+EQojkuGZtMt5TTcckCCxAzKV7MQu6TroOvfBfjhM=;\n b=ZiUJuac4EHaSmgdXFqem4/dlztWmJ980Q9eUJAZgMe7LTse/+U4NiMab\n clwgItkbNBifjWL9nKWyXka3c1Z4cGtQtgUjRLr+4DXpwUECII0mOp4bb\n 2dohW/KfKqV6j/6okKxLq3DB1uJapNebEh4ASXdPwb3E9oB8X1TXX/EJx\n Dnke5zo/kzxq/4zR1o/59t94xhw3pnApp0ynM3R9u00Uq6k4iaZNgPgLb\n gp3e5SoGdAGqBbnyyWnfBmowW3GR9e3oghQxKjZrDvKLmjbzSEH8z3XoJ\n 2ACEf3enGsVTrzr6zq2Rv+0JpTEtbdH0xArOycyQXFAESHoXq37RcjYGJ g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10502\"; a=\"305763827\"", "E=Sophos;i=\"5.95,191,1661842800\"; d=\"scan'208\";a=\"305763827\"", "E=McAfee;i=\"6500,9779,10502\"; a=\"623199935\"", "E=Sophos;i=\"5.95,191,1661842800\"; d=\"scan'208\";a=\"623199935\"" ], "X-ExtLoop1": "1", "From": "Andy Pei <andy.pei@intel.com>", "To": "dev@dpdk.org", "Cc": "chenbo.xia@intel.com, rosen.xu@intel.com, wei.huang@intel.com,\n gang.cao@intel.com, maxime.coquelin@redhat.com", "Subject": "[PATCH v6 4/8] vdpa/ifc: write queue count to MQ register", "Date": "Mon, 17 Oct 2022 19:41:41 +0800", "Message-Id": "<1666006905-74029-5-git-send-email-andy.pei@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1666006905-74029-1-git-send-email-andy.pei@intel.com>", "References": "<1661229305-240952-2-git-send-email-andy.pei@intel.com>\n <1666006905-74029-1-git-send-email-andy.pei@intel.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Write queue count to IFCVF_MQ_OFFSET register\nto enable multi-queue feature.\n\nSigned-off-by: Andy Pei <andy.pei@intel.com>\nSigned-off-by: Huang Wei <wei.huang@intel.com>\nReviewed-by: Chenbo Xia <chenbo.xia@intel.com>\n---\n drivers/vdpa/ifc/base/ifcvf.c | 32 ++++++++++++++++++++++++++++++++\n 1 file changed, 32 insertions(+)", "diff": "diff --git a/drivers/vdpa/ifc/base/ifcvf.c b/drivers/vdpa/ifc/base/ifcvf.c\nindex 81c68c0..b377126 100644\n--- a/drivers/vdpa/ifc/base/ifcvf.c\n+++ b/drivers/vdpa/ifc/base/ifcvf.c\n@@ -202,6 +202,37 @@\n \tIFCVF_WRITE_REG32(val >> 32, hi);\n }\n \n+STATIC void\n+ifcvf_enable_mq(struct ifcvf_hw *hw)\n+{\n+\tu8 *mq_cfg;\n+\tu8 qid;\n+\tint nr_queue = 0;\n+\n+\tfor (qid = 0; qid < hw->nr_vring; qid++) {\n+\t\tif (!hw->vring[qid].enable)\n+\t\t\tcontinue;\n+\t\tnr_queue++;\n+\t}\n+\n+\tif (nr_queue == 0) {\n+\t\tWARNINGOUT(\"no enabled vring\\n\");\n+\t\treturn;\n+\t}\n+\n+\tmq_cfg = hw->mq_cfg;\n+\tif (mq_cfg) {\n+\t\tif (hw->device_type == IFCVF_BLK) {\n+\t\t\t*(u32 *)mq_cfg = nr_queue;\n+\t\t\tRTE_LOG(INFO, PMD, \"%d queues are enabled\\n\", nr_queue);\n+\t\t} else {\n+\t\t\t*(u32 *)mq_cfg = nr_queue / 2;\n+\t\t\tRTE_LOG(INFO, PMD, \"%d queue pairs are enabled\\n\",\n+\t\t\t\tnr_queue / 2);\n+\t\t}\n+\t}\n+}\n+\n STATIC int\n ifcvf_hw_enable(struct ifcvf_hw *hw)\n {\n@@ -219,6 +250,7 @@\n \t\treturn -1;\n \t}\n \n+\tifcvf_enable_mq(hw);\n \tfor (i = 0; i < hw->nr_vring; i++) {\n \t\tIFCVF_WRITE_REG16(i, &cfg->queue_select);\n \t\tio_write64_twopart(hw->vring[i].desc, &cfg->queue_desc_lo,\n", "prefixes": [ "v6", "4/8" ] }