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GET /api/patches/118097/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 118097,
    "url": "https://patches.dpdk.org/api/patches/118097/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221012235037.3293072-1-abdullah.sevincer@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221012235037.3293072-1-abdullah.sevincer@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221012235037.3293072-1-abdullah.sevincer@intel.com",
    "date": "2022-10-12T23:50:34",
    "name": "[v2,1/4] event/dlb2: remove cos from port probing",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "be63d06565dc6946309da98a3d77aebf48d8a917",
    "submitter": {
        "id": 2843,
        "url": "https://patches.dpdk.org/api/people/2843/?format=api",
        "name": "Sevincer, Abdullah",
        "email": "abdullah.sevincer@intel.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221012235037.3293072-1-abdullah.sevincer@intel.com/mbox/",
    "series": [
        {
            "id": 25193,
            "url": "https://patches.dpdk.org/api/series/25193/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25193",
            "date": "2022-10-12T23:50:34",
            "name": "[v2,1/4] event/dlb2: remove cos from port probing",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/25193/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/118097/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/118097/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4C2C0A00C2;\n\tThu, 13 Oct 2022 01:51:05 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 027D042C9C;\n\tThu, 13 Oct 2022 01:51:05 +0200 (CEST)",
            "from mga06.intel.com (mga06b.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id 33BB942C27\n for <dev@dpdk.org>; Thu, 13 Oct 2022 01:51:03 +0200 (CEST)",
            "from orsmga006.jf.intel.com ([10.7.209.51])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 12 Oct 2022 16:50:40 -0700",
            "from txanpdk02.an.intel.com ([10.123.117.76])\n by orsmga006.jf.intel.com with ESMTP; 12 Oct 2022 16:50:40 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1665618663; x=1697154663;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=/vH2ynVWeqxWlcXDp0YJ+YapW61F4fUpRa4BKxii08A=;\n b=mq3Ik0snZ7/hwVDF3GZqezNtvOKWgkJDka19N+PcjnwClbMBWVITalcy\n GEFiZ5LwnMQubSOSXkQtoFSscMPQ4DRzAbxdNxbrLnGKjV9h2BC+gdXaz\n Dq62Oxo+Z8B+F2zyI8SLul9pRZYRmvqSI761zgCQNRXETMVSZiC8tbDa2\n 4FFD1Nd7bodqESm0G1sE9+QM7qhPiXte5gEie0mzZylT6WhzaHY17MRn6\n b5pKjkFZ+SKataHEr1GRg4+oKIWkAfghAHcI3pzkiGPsgpWXjPsa5we6G\n NtfuaZBo05WVKSNdSSMVMual3Mcg6ZCtatf4mOBhCOl++Pt4us19prRKh w==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10498\"; a=\"366936400\"",
            "E=Sophos;i=\"5.95,180,1661842800\"; d=\"scan'208\";a=\"366936400\"",
            "E=McAfee;i=\"6500,9779,10498\"; a=\"604746821\"",
            "E=Sophos;i=\"5.95,180,1661842800\"; d=\"scan'208\";a=\"604746821\""
        ],
        "X-ExtLoop1": "1",
        "From": "Abdullah Sevincer <abdullah.sevincer@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "jerinj@marvell.com,\n\tAbdullah Sevincer <abdullah.sevincer@intel.com>",
        "Subject": "[PATCH v2 1/4] event/dlb2: remove cos from port probing",
        "Date": "Wed, 12 Oct 2022 18:50:34 -0500",
        "Message-Id": "<20221012235037.3293072-1-abdullah.sevincer@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20221012143247.3239356-1-abdullah.sevincer@intel.com,\n shivani.doneria@intel.com>",
        "References": "<20221012143247.3239356-1-abdullah.sevincer@intel.com,\n shivani.doneria@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This commit removes cos (class of service)\nfrom port probing criteria and applies enhancements\nfor selection of ports from best cos when default\ncos (255) is used.\n\nSigned-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>\n---\n drivers/event/dlb2/dlb2.c                  |  5 +-\n drivers/event/dlb2/dlb2_priv.h             |  2 +-\n drivers/event/dlb2/dlb2_user.h             |  2 +-\n drivers/event/dlb2/pf/base/dlb2_hw_types.h |  2 +-\n drivers/event/dlb2/pf/base/dlb2_resource.c | 85 ++++++++++++++--------\n 5 files changed, 60 insertions(+), 36 deletions(-)",
    "diff": "diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c\nindex 7fd89e940b..b52ce20a4e 100644\n--- a/drivers/event/dlb2/dlb2.c\n+++ b/drivers/event/dlb2/dlb2.c\n@@ -180,11 +180,12 @@ dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int *port_cos)\n {\n \tint q;\n \n-\tfor (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++)\n+\tfor (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++) {\n+\t\tdlb2->ev_ports[q].cos_id = port_cos[q];\n \t\tif (port_cos[q] != DLB2_COS_DEFAULT) {\n-\t\t\tdlb2->ev_ports[q].cos_id = port_cos[q];\n \t\t\tdlb2->cos_ports[port_cos[q]]++;\n \t\t}\n+\t}\n }\n \n static void\ndiff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h\nindex 9ef5bcb901..fca1720504 100644\n--- a/drivers/event/dlb2/dlb2_priv.h\n+++ b/drivers/event/dlb2/dlb2_priv.h\n@@ -421,7 +421,7 @@ struct dlb2_config {\n };\n \n enum dlb2_cos {\n-\tDLB2_COS_DEFAULT = -1,\n+\tDLB2_COS_DEFAULT = 255,\n \tDLB2_COS_0 = 0,\n \tDLB2_COS_1,\n \tDLB2_COS_2,\ndiff --git a/drivers/event/dlb2/dlb2_user.h b/drivers/event/dlb2/dlb2_user.h\nindex 28c6aaaf43..8739e2a5ac 100644\n--- a/drivers/event/dlb2/dlb2_user.h\n+++ b/drivers/event/dlb2/dlb2_user.h\n@@ -450,7 +450,7 @@ struct dlb2_create_dir_queue_args {\n  * - num_hist_list_entries: Number of history list entries. This must be\n  *\tgreater than or equal cq_depth.\n  * - cos_id: class-of-service to allocate this port from. Must be between 0 and\n- *\t3, inclusive.\n+ *\t3, inclusive. Should be 255 if default.\n  * - cos_strict: If set, return an error if there are no available ports in the\n  *\trequested class-of-service. Else, allocate the port from a different\n  *\tclass-of-service if the requested class has no available ports.\ndiff --git a/drivers/event/dlb2/pf/base/dlb2_hw_types.h b/drivers/event/dlb2/pf/base/dlb2_hw_types.h\nindex 87996ef621..be09363893 100644\n--- a/drivers/event/dlb2/pf/base/dlb2_hw_types.h\n+++ b/drivers/event/dlb2/pf/base/dlb2_hw_types.h\n@@ -351,7 +351,7 @@ struct dlb2_hw {\n \tint prod_core_list[RTE_MAX_LCORE];\n \tu8 num_prod_cores;\n \tint dir_pp_allocations[DLB2_MAX_NUM_DIR_PORTS_V2_5];\n-\tint ldb_pp_allocations[DLB2_MAX_NUM_LDB_PORTS];\n+\tint ldb_pp_allocations[DLB2_MAX_NUM_LDB_PORTS + DLB2_NUM_COS_DOMAINS];\n \n \t/* Virtualization */\n \tint virt_mode;\ndiff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c b/drivers/event/dlb2/pf/base/dlb2_resource.c\nindex 280a8e51b1..3f36acb6a4 100644\n--- a/drivers/event/dlb2/pf/base/dlb2_resource.c\n+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c\n@@ -577,11 +577,14 @@ static int dlb2_attach_ldb_ports(struct dlb2_hw *hw,\n \t/* Allocate num_ldb_ports from any class-of-service */\n \tfor (i = 0; i < args->num_ldb_ports; i++) {\n \t\tfor (j = 0; j < DLB2_NUM_COS_DOMAINS; j++) {\n+\t\t\t/* Allocate from best performing cos */\n+\t\t\tu32 cos_idx = j + DLB2_MAX_NUM_LDB_PORTS;\n+\t\t\tu32 cos_id = hw->ldb_pp_allocations[cos_idx];\n \t\t\tret = __dlb2_attach_ldb_ports(hw,\n \t\t\t\t\t\t      rsrcs,\n \t\t\t\t\t\t      domain,\n \t\t\t\t\t\t      1,\n-\t\t\t\t\t\t      j,\n+\t\t\t\t\t\t      cos_id,\n \t\t\t\t\t\t      resp);\n \t\t\tif (ret == 0)\n \t\t\t\tbreak;\n@@ -819,21 +822,29 @@ static int dlb2_pp_cycle_comp(const void *a, const void *b)\n \n /* Probe producer ports from different CPU cores */\n static void\n-dlb2_get_pp_allocation(struct dlb2_hw *hw, int cpu, int port_type, int cos_id)\n+dlb2_get_pp_allocation(struct dlb2_hw *hw, int cpu, int port_type)\n {\n+\tstruct dlb2_pp_thread_data dlb2_thread_data[DLB2_MAX_NUM_DIR_PORTS_V2_5];\n \tstruct dlb2_dev *dlb2_dev = container_of(hw, struct dlb2_dev, hw);\n-\tint i, err, ver = DLB2_HW_DEVICE_FROM_PCI_ID(dlb2_dev->pdev);\n+\tstruct dlb2_pp_thread_data cos_cycles[DLB2_NUM_COS_DOMAINS];\n+\tint ver = DLB2_HW_DEVICE_FROM_PCI_ID(dlb2_dev->pdev);\n+\tint num_ports_per_sort, num_ports, num_sort, i, err;\n \tbool is_ldb = (port_type == DLB2_LDB_PORT);\n-\tint num_ports = is_ldb ? DLB2_MAX_NUM_LDB_PORTS :\n-\tDLB2_MAX_NUM_DIR_PORTS(ver);\n-\tstruct dlb2_pp_thread_data dlb2_thread_data[num_ports];\n-\tint *port_allocations = is_ldb ? hw->ldb_pp_allocations :\n-\t\t\t\t\t hw->dir_pp_allocations;\n-\tint num_sort = is_ldb ? DLB2_NUM_COS_DOMAINS : 1;\n-\tstruct dlb2_pp_thread_data cos_cycles[num_sort];\n-\tint num_ports_per_sort = num_ports / num_sort;\n+\tint *port_allocations;\n \tpthread_t pthread;\n \n+\tif (is_ldb) {\n+\t\tport_allocations = hw->ldb_pp_allocations;\n+\t\tnum_ports = DLB2_MAX_NUM_LDB_PORTS;\n+\t\tnum_sort = DLB2_NUM_COS_DOMAINS;\n+\t} else {\n+\t\tport_allocations = hw->dir_pp_allocations;\n+\t\tnum_ports = DLB2_MAX_NUM_DIR_PORTS(ver);\n+\t\tnum_sort = 1;\n+\t}\n+\n+\tnum_ports_per_sort = num_ports / num_sort;\n+\n \tdlb2_dev->enqueue_four = dlb2_movdir64b;\n \n \tDLB2_LOG_INFO(\" for %s: cpu core used in pp profiling: %d\\n\",\n@@ -841,8 +852,7 @@ dlb2_get_pp_allocation(struct dlb2_hw *hw, int cpu, int port_type, int cos_id)\n \n \tmemset(cos_cycles, 0, num_sort * sizeof(struct dlb2_pp_thread_data));\n \tfor (i = 0; i < num_ports; i++) {\n-\t\tint cos = is_ldb ? (i >> DLB2_NUM_COS_DOMAINS) : 0;\n-\n+\t\tint cos = (i >> DLB2_NUM_COS_DOMAINS) % DLB2_NUM_COS_DOMAINS;\n \t\tdlb2_thread_data[i].is_ldb = is_ldb;\n \t\tdlb2_thread_data[i].pp = i;\n \t\tdlb2_thread_data[i].cycles = 0;\n@@ -861,12 +871,17 @@ dlb2_get_pp_allocation(struct dlb2_hw *hw, int cpu, int port_type, int cos_id)\n \t\t\tDLB2_LOG_ERR(\": thread join failed! err=%d\", err);\n \t\t\treturn;\n \t\t}\n-\t\tcos_cycles[cos].cycles += dlb2_thread_data[i].cycles;\n+\n+\t\tif (is_ldb)\n+\t\t\tcos_cycles[cos].cycles += dlb2_thread_data[i].cycles;\n \n \t\tif ((i + 1) % num_ports_per_sort == 0) {\n-\t\t\tint index = cos * num_ports_per_sort;\n+\t\t\tint index = 0;\n \n-\t\t\tcos_cycles[cos].pp = index;\n+\t\t\tif (is_ldb) {\n+\t\t\t\tcos_cycles[cos].pp = cos;\n+\t\t\t\tindex = cos * num_ports_per_sort;\n+\t\t\t}\n \t\t\t/*\n \t\t\t * For LDB ports first sort with in a cos. Later sort\n \t\t\t * the best cos based on total cycles for the cos.\n@@ -880,21 +895,23 @@ dlb2_get_pp_allocation(struct dlb2_hw *hw, int cpu, int port_type, int cos_id)\n \t}\n \n \t/*\n-\t * Re-arrange best ports by cos if default cos is used.\n+\t * Sort by best cos aggregated over all ports per cos\n+\t * Note: After DLB2_MAX_NUM_LDB_PORTS sorted cos is stored and so'pp'\n+\t * is cos_id and not port id.\n \t */\n-\tif (is_ldb && cos_id == DLB2_COS_DEFAULT)\n-\t\tqsort(cos_cycles, num_sort,\n-\t\t      sizeof(struct dlb2_pp_thread_data),\n+\tif (is_ldb) {\n+\t\tqsort(cos_cycles, num_sort, sizeof(struct dlb2_pp_thread_data),\n \t\t      dlb2_pp_cycle_comp);\n+\t\tfor (i = 0; i < DLB2_NUM_COS_DOMAINS; i++)\n+\t\t\tport_allocations[i + DLB2_MAX_NUM_LDB_PORTS] = cos_cycles[i].pp;\n+\t}\n \n \tfor (i = 0; i < num_ports; i++) {\n-\t\tint start = is_ldb ? cos_cycles[i / num_ports_per_sort].pp : 0;\n-\t\tint index = i % num_ports_per_sort;\n-\n-\t\tport_allocations[i] = dlb2_thread_data[start + index].pp;\n+\t\tport_allocations[i] = dlb2_thread_data[i].pp;\n \t\tDLB2_LOG_INFO(\": pp %d cycles %d\", port_allocations[i],\n-\t\t\t     dlb2_thread_data[start + index].cycles);\n+\t\t\t      dlb2_thread_data[i].cycles);\n \t}\n+\n }\n \n int\n@@ -903,11 +920,10 @@ dlb2_resource_probe(struct dlb2_hw *hw, const void *probe_args)\n \tconst struct dlb2_devargs *args = (const struct dlb2_devargs *)probe_args;\n \tconst char *mask = NULL;\n \tint cpu = 0, cnt = 0, cores[RTE_MAX_LCORE];\n-\tint i, cos_id = DLB2_COS_DEFAULT;\n+\tint i;\n \n \tif (args) {\n \t\tmask = (const char *)args->producer_coremask;\n-\t\tcos_id = args->cos_id;\n \t}\n \n \tif (mask && rte_eal_parse_coremask(mask, cores)) {\n@@ -942,8 +958,8 @@ dlb2_resource_probe(struct dlb2_hw *hw, const void *probe_args)\n \tif (hw->num_prod_cores)\n \t\tcpu = hw->prod_core_list[0];\n \n-\tdlb2_get_pp_allocation(hw, cpu, DLB2_LDB_PORT, cos_id);\n-\tdlb2_get_pp_allocation(hw, cpu, DLB2_DIR_PORT, DLB2_COS_DEFAULT);\n+\tdlb2_get_pp_allocation(hw, cpu, DLB2_LDB_PORT);\n+\tdlb2_get_pp_allocation(hw, cpu, DLB2_DIR_PORT);\n \n \treturn 0;\n }\n@@ -4543,7 +4559,8 @@ dlb2_verify_create_ldb_port_args(struct dlb2_hw *hw,\n \t\treturn -EINVAL;\n \t}\n \n-\tif (args->cos_id >= DLB2_NUM_COS_DOMAINS) {\n+\tif (args->cos_id >= DLB2_NUM_COS_DOMAINS &&\n+\t    (args->cos_id != DLB2_COS_DEFAULT || args->cos_strict)) {\n \t\tresp->status = DLB2_ST_INVALID_COS_ID;\n \t\treturn -EINVAL;\n \t}\n@@ -4554,7 +4571,13 @@ dlb2_verify_create_ldb_port_args(struct dlb2_hw *hw,\n \t\t\t\t\t  typeof(*port));\n \t} else {\n \t\tfor (i = 0; i < DLB2_NUM_COS_DOMAINS; i++) {\n-\t\t\tid = (args->cos_id + i) % DLB2_NUM_COS_DOMAINS;\n+\t\t\tif (args->cos_id == DLB2_COS_DEFAULT) {\n+\t\t\t\t/* Allocate from best performing cos */\n+\t\t\t\tu32 cos_idx = i + DLB2_MAX_NUM_LDB_PORTS;\n+\t\t\t\tid = hw->ldb_pp_allocations[cos_idx];\n+\t\t\t} else {\n+\t\t\t\tid = (args->cos_id + i) % DLB2_NUM_COS_DOMAINS;\n+\t\t\t}\n \n \t\t\tport = DLB2_DOM_LIST_HEAD(domain->avail_ldb_ports[id],\n \t\t\t\t\t\t  typeof(*port));\n",
    "prefixes": [
        "v2",
        "1/4"
    ]
}