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{
    "id": 117456,
    "url": "https://patches.dpdk.org/api/patches/117456/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221006110105.2986966-9-dsosnowski@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
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        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221006110105.2986966-9-dsosnowski@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221006110105.2986966-9-dsosnowski@nvidia.com",
    "date": "2022-10-06T11:01:05",
    "name": "[v2,8/8] app/flow-perf: add hairpin queue memory config",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "53efd240aabc127bc5563f2b8d173f12402ac4be",
    "submitter": {
        "id": 2386,
        "url": "https://patches.dpdk.org/api/people/2386/?format=api",
        "name": "Dariusz Sosnowski",
        "email": "dsosnowski@nvidia.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221006110105.2986966-9-dsosnowski@nvidia.com/mbox/",
    "series": [
        {
            "id": 25009,
            "url": "https://patches.dpdk.org/api/series/25009/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25009",
            "date": "2022-10-06T11:00:57",
            "name": "ethdev: introduce hairpin memory capabilities",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/25009/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/117456/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/117456/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Dariusz Sosnowski <dsosnowski@nvidia.com>",
        "To": "Wisam Jaddo <wisamm@nvidia.com>",
        "CC": "<dev@dpdk.org>",
        "Subject": "[PATCH v2 8/8] app/flow-perf: add hairpin queue memory config",
        "Date": "Thu, 6 Oct 2022 11:01:05 +0000",
        "Message-ID": "<20221006110105.2986966-9-dsosnowski@nvidia.com>",
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    },
    "content": "This patch adds the hairpin-conf command line parameter to flow-perf\napplication. hairpin-conf parameter takes a hexadecimal bitmask with\nbits having the following meaning:\n\n- Bit 0 - Force memory settings of hairpin RX queue.\n- Bit 1 - Force memory settings of hairpin TX queue.\n- Bit 4 - Use locked device memory for hairpin RX queue.\n- Bit 5 - Use RTE memory for hairpin RX queue.\n- Bit 8 - Use locked device memory for hairpin TX queue.\n- Bit 9 - Use RTE memory for hairpin TX queue.\n\nSigned-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>\n---\n app/test-flow-perf/main.c | 32 ++++++++++++++++++++++++++++++++\n 1 file changed, 32 insertions(+)",
    "diff": "diff --git a/app/test-flow-perf/main.c b/app/test-flow-perf/main.c\nindex f375097028..4a9206803a 100644\n--- a/app/test-flow-perf/main.c\n+++ b/app/test-flow-perf/main.c\n@@ -46,6 +46,15 @@\n #define DEFAULT_RULES_BATCH     100000\n #define DEFAULT_GROUP                0\n \n+#define HAIRPIN_RX_CONF_FORCE_MEMORY  (0x0001)\n+#define HAIRPIN_TX_CONF_FORCE_MEMORY  (0x0002)\n+\n+#define HAIRPIN_RX_CONF_LOCKED_MEMORY (0x0010)\n+#define HAIRPIN_RX_CONF_RTE_MEMORY    (0x0020)\n+\n+#define HAIRPIN_TX_CONF_LOCKED_MEMORY (0x0100)\n+#define HAIRPIN_TX_CONF_RTE_MEMORY    (0x0200)\n+\n struct rte_flow *flow;\n static uint8_t flow_group;\n \n@@ -61,6 +70,7 @@ static uint32_t policy_id[MAX_PORTS];\n static uint8_t items_idx, actions_idx, attrs_idx;\n \n static uint64_t ports_mask;\n+static uint64_t hairpin_conf_mask;\n static uint16_t dst_ports[RTE_MAX_ETHPORTS];\n static volatile bool force_quit;\n static bool dump_iterations;\n@@ -482,6 +492,7 @@ usage(char *progname)\n \tprintf(\"  --enable-fwd: To enable packets forwarding\"\n \t\t\" after insertion\\n\");\n \tprintf(\"  --portmask=N: hexadecimal bitmask of ports used\\n\");\n+\tprintf(\"  --hairpin-conf=0xXXXX: hexadecimal bitmask of hairpin queue configuration\\n\");\n \tprintf(\"  --random-priority=N,S: use random priority levels \"\n \t\t\"from 0 to (N - 1) for flows \"\n \t\t\"and S as seed for pseudo-random number generator\\n\");\n@@ -629,6 +640,7 @@ static void\n args_parse(int argc, char **argv)\n {\n \tuint64_t pm, seed;\n+\tuint64_t hp_conf;\n \tchar **argvopt;\n \tuint32_t prio;\n \tchar *token;\n@@ -648,6 +660,7 @@ args_parse(int argc, char **argv)\n \t\t{ \"enable-fwd\",                 0, 0, 0 },\n \t\t{ \"unique-data\",                0, 0, 0 },\n \t\t{ \"portmask\",                   1, 0, 0 },\n+\t\t{ \"hairpin-conf\",               1, 0, 0 },\n \t\t{ \"cores\",                      1, 0, 0 },\n \t\t{ \"random-priority\",            1, 0, 0 },\n \t\t{ \"meter-profile-alg\",          1, 0, 0 },\n@@ -880,6 +893,13 @@ args_parse(int argc, char **argv)\n \t\t\t\t\trte_exit(EXIT_FAILURE, \"Invalid fwd port mask\\n\");\n \t\t\t\tports_mask = pm;\n \t\t\t}\n+\t\t\tif (strcmp(lgopts[opt_idx].name, \"hairpin-conf\") == 0) {\n+\t\t\t\tend = NULL;\n+\t\t\t\thp_conf = strtoull(optarg, &end, 16);\n+\t\t\t\tif ((optarg[0] == '\\0') || (end == NULL) || (*end != '\\0'))\n+\t\t\t\t\trte_exit(EXIT_FAILURE, \"Invalid hairpin config mask\\n\");\n+\t\t\t\thairpin_conf_mask = hp_conf;\n+\t\t\t}\n \t\t\tif (strcmp(lgopts[opt_idx].name,\n \t\t\t\t\t\"port-id\") == 0) {\n \t\t\t\tuint16_t port_idx = 0;\n@@ -2035,6 +2055,12 @@ init_port(void)\n \t\t\t\thairpin_conf.peers[0].port = port_id;\n \t\t\t\thairpin_conf.peers[0].queue =\n \t\t\t\t\tstd_queue + tx_queues_count;\n+\t\t\t\thairpin_conf.use_locked_device_memory =\n+\t\t\t\t\t!!(hairpin_conf_mask & HAIRPIN_RX_CONF_LOCKED_MEMORY);\n+\t\t\t\thairpin_conf.use_rte_memory =\n+\t\t\t\t\t!!(hairpin_conf_mask & HAIRPIN_RX_CONF_RTE_MEMORY);\n+\t\t\t\thairpin_conf.force_memory =\n+\t\t\t\t\t!!(hairpin_conf_mask & HAIRPIN_RX_CONF_FORCE_MEMORY);\n \t\t\t\tret = rte_eth_rx_hairpin_queue_setup(\n \t\t\t\t\t\tport_id, hairpin_queue,\n \t\t\t\t\t\trxd_count, &hairpin_conf);\n@@ -2050,6 +2076,12 @@ init_port(void)\n \t\t\t\thairpin_conf.peers[0].port = port_id;\n \t\t\t\thairpin_conf.peers[0].queue =\n \t\t\t\t\tstd_queue + rx_queues_count;\n+\t\t\t\thairpin_conf.use_locked_device_memory =\n+\t\t\t\t\t!!(hairpin_conf_mask & HAIRPIN_TX_CONF_LOCKED_MEMORY);\n+\t\t\t\thairpin_conf.use_rte_memory =\n+\t\t\t\t\t!!(hairpin_conf_mask & HAIRPIN_TX_CONF_RTE_MEMORY);\n+\t\t\t\thairpin_conf.force_memory =\n+\t\t\t\t\t!!(hairpin_conf_mask & HAIRPIN_TX_CONF_FORCE_MEMORY);\n \t\t\t\tret = rte_eth_tx_hairpin_queue_setup(\n \t\t\t\t\t\tport_id, hairpin_queue,\n \t\t\t\t\t\ttxd_count, &hairpin_conf);\n",
    "prefixes": [
        "v2",
        "8/8"
    ]
}