Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/116744/?format=api
{ "id": 116744, "url": "https://patches.dpdk.org/api/patches/116744/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220923144334.27736-7-suanmingm@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220923144334.27736-7-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220923144334.27736-7-suanmingm@nvidia.com", "date": "2022-09-23T14:43:13", "name": "[06/27] net/mlx5: enable mark flag for all ports in the same domain", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a05704b8f508c4e1880dfe1ef21e5be98b4765d2", "submitter": { "id": 1887, "url": "https://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220923144334.27736-7-suanmingm@nvidia.com/mbox/", "series": [ { "id": 24805, "url": "https://patches.dpdk.org/api/series/24805/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=24805", "date": "2022-09-23T14:43:07", "name": "net/mlx5: HW steering PMD update", "version": 1, "mbox": "https://patches.dpdk.org/series/24805/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/116744/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/116744/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D14E3A054A;\n\tFri, 23 Sep 2022 16:44:50 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8874842BCC;\n\tFri, 23 Sep 2022 16:44:14 +0200 (CEST)", "from NAM10-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam10on2045.outbound.protection.outlook.com [40.107.94.45])\n by mails.dpdk.org (Postfix) with ESMTP id C6F5942BC2\n for <dev@dpdk.org>; Fri, 23 Sep 2022 16:44:12 +0200 (CEST)", "from BN7PR06CA0049.namprd06.prod.outlook.com (2603:10b6:408:34::26)\n by SN7PR12MB6716.namprd12.prod.outlook.com (2603:10b6:806:270::20)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.20; Fri, 23 Sep\n 2022 14:44:11 +0000", "from BN8NAM11FT057.eop-nam11.prod.protection.outlook.com\n (2603:10b6:408:34:cafe::2a) by BN7PR06CA0049.outlook.office365.com\n (2603:10b6:408:34::26) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.20 via Frontend\n Transport; Fri, 23 Sep 2022 14:44:10 +0000", "from mail.nvidia.com (216.228.117.161) by\n BN8NAM11FT057.mail.protection.outlook.com (10.13.177.49) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.5654.14 via Frontend Transport; Fri, 23 Sep 2022 14:44:10 +0000", "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Fri, 23 Sep\n 2022 07:43:58 -0700", "from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com\n (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 23 Sep\n 2022 07:43:56 -0700" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=E9E84UBPYyz/W/947vXj3K2FupXbNpKuMJt2FXGjDPwaTREnrocjpQceztzTslkm8ZBMUxo4nnVY5CzeLLjaKTN+Q/sVukJglPLqHMjE9jAPwtLgngx5OhKYVbGfZrdoMdb/fJPgT2UsVm+tJ6BAZey5EGeY4wmSotA05e6ZtvnKi/vqXs++vdzv1EY4lEvhb5IX7LYpOT17+GMaKCQjhyGMXrvG8eYLSubohMEIRL1yXZvfQEGKQqQlgtJqS/CsKmexS9i0fpUD4uYdM6BPOxK9ox+j102L9wXtr1CL9RsdZLxCq6gguUYRBGxbGAgkSpBPxUhiRWqeLKnYvHqsHA==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=IrpPY7kxFwY/0BuhqfWtZOaLNcikkWNx8R6GHK3fb/E=;\n b=KZbzRdIIXgTHrzbBHqzVqWfccNpPQEeRrjiF12+TRC+eUY111SZxNgEdr32QGZvZPHHtDJr1yqgkr4mMXXEFwzV2M0ZOPtIJ0UagzaNaR+5RgmKkISrUjojdbm3l/G7Gu3uIo0LjhHuI53e0gdxPUL3ApZ4DgjwgQXhTFEUIbMvshQiF5X7Brl4jEiRczY5KTHAGG9pa+UZNgOQx/9KGZiqRXunEIOGrF0NGRe4N5UU7/NrhRkBmJ4odLxhSls+6NV4eQK6J0NSpInuz5fuX8ffSubrRgcara2SASMwCy3KnqKC4cilPdJAuJzT1ItrN0dOBrIJThucIX42b1025fQ==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=IrpPY7kxFwY/0BuhqfWtZOaLNcikkWNx8R6GHK3fb/E=;\n b=KP/mI1ae2wdZ7q8O68cqiYNZQpoECabZiAxs4VFrQoOA0s5HHgQvsxqWxrP8jPyIIDBsFvGhVMgpy6CZhEGEOT9xTo1V7ZGo4xCEAo0GHuks0J7QqSzJMWBjy2+G5rLAp0HzOVtwIq2Z5lMPsdLc7+OUhQigO0gunliYzWYJbQfQT4bOEWw5QPZqhfVezPQoFtIZJKXmN1PayXoBouN+6BFNNfbGopHdmHOO4vMJRliA+21B/UWkd9BxPgqjYtoxGU+/Og5/NMboBq0NOVnaUIutwA0C2UUCMmgks3j5FuKUtMvOiu43a3IjOHu2Zy3XMhfemHAU+0ABBvAseV1tzQ==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.161)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.161 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>, Raja Zidane <rzidane@nvidia.com>", "CC": "<dev@dpdk.org>, Bing Zhao <bingz@nvidia.com>", "Subject": "[PATCH 06/27] net/mlx5: enable mark flag for all ports in the same\n domain", "Date": "Fri, 23 Sep 2022 17:43:13 +0300", "Message-ID": "<20220923144334.27736-7-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20220923144334.27736-1-suanmingm@nvidia.com>", "References": "<20220923144334.27736-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN8NAM11FT057:EE_|SN7PR12MB6716:EE_", "X-MS-Office365-Filtering-Correlation-Id": "b2d52d41-9cc5-46e5-b867-08da9d7213b4", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n qNy6aArssBcVd/Hvo3Ox/URZjxilU5leEAIfb6aMXOia6/9PIpx4OdqXoYql7Ae9iaWGd3NwX5vYzZpIfp2mU8T6YSh5s003jEWTyNVF6AnR57V6B5IZyJxGKzX/ICNz+HuIbsMVrsE+678mT/SiTuwA66JHH76PZW4Pcj6qjhc1qUYhe/OHeUnbClZc52dyHtBPWKcMNDVILfFxNzmpv9NJgQ+S9QKJrXOY7TxIPnZU28pznVW+DB3TWZWBvnYVSnhB/UP7AQLqM02piL9kTQU66elZDGPtrymvRSzJKRLPy0A5ykMVn2ckFslnM3f1sHeuKtnEHL0c3zL/QAOifHm9EpUQ5kZe+WT6GHyLHfV//NAfIrqwOMYJrGXLdkW1ROcAFvhawRzaGLzNV8zcYTMDVECCAi5HJj2FPSkG1heKe/lLR5fLY5pAIIM8xTobiuyJlPor7XzEFMPkEztM9ki3ZrG1/xSZKb8maFPEwHMHEDQErMykOUBtxAk9rGeZS3GRFowC1kjiZl/ZvoO/bo8yw/1wrXFTmCeyMGp22BuiaYIZrcewCFA8I1jllnbupRpbVN4yXDlS+ppMHiFpIxeD8CXMUNoEK+w32hAcOkjWQ7w8vr0SzlQ7t/bSEtcID5gkarX53IwBVGq2JUUcYupTY/JGWpJ+Fl7ozLOxyNUg8Oj1Xg5uFC94TxipGB3cd/mpL+FpwxkgAEDsw8DIxtVbKn4Flan4VPwdr42Nvosv3S0msai9nb47XN1vXWjgJ68uRFPKtVuOFBdgqYkYhg==", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(39860400002)(376002)(396003)(136003)(346002)(451199015)(46966006)(40470700004)(36840700001)(107886003)(6666004)(7696005)(2616005)(356005)(36756003)(6286002)(26005)(110136005)(316002)(6636002)(478600001)(54906003)(36860700001)(186003)(40460700003)(1076003)(426003)(47076005)(40480700001)(7636003)(336012)(16526019)(86362001)(83380400001)(82740400003)(55016003)(2906002)(70206006)(8936002)(8676002)(4326008)(5660300002)(41300700001)(70586007)(82310400005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "23 Sep 2022 14:44:10.6758 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n b2d52d41-9cc5-46e5-b867-08da9d7213b4", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT057.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SN7PR12MB6716", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Bing Zhao <bingz@nvidia.com>\n\nIn the switchdev mode, there is a unique FDB domain for all the\nrepresentors and only the eswitch manager can insert the rule into\nthis domain.\n\nIf a flow rule is like below:\nflow create 0 ingress transfer pattern port_id id is X / eth / end\nactions mark id 25 ...\nIt is used for representor X and the mark flag was not enabled for\nthe queues of this port.\n\nTo fix this, once the mark flag needs to be enabled, in a FDB case,\nall the queues' mark flag belonging to the same domain will be\nengaged for only once.\n\nFixes: e211aca851a7 (\"net/mlx5: fix mark enabling for Rx\")\n\nSigned-off-by: Bing Zhao <bingz@nvidia.com>\n---\n drivers/net/mlx5/mlx5.h | 2 ++\n drivers/net/mlx5/mlx5_flow.c | 28 ++++++++++++++++++++++++----\n 2 files changed, 26 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex f3bd45d4c5..18d70e795f 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1202,6 +1202,8 @@ struct mlx5_dev_ctx_shared {\n \tuint32_t flow_priority_check_flag:1; /* Check Flag for flow priority. */\n \tuint32_t metadata_regc_check_flag:1; /* Check Flag for metadata REGC. */\n \tuint32_t hws_tags:1; /* Check if tags info for HWS initialized. */\n+\tuint32_t shared_mark_enabled:1;\n+\t/* If mark action is enabled on Rxqs (shared E-Switch domain). */\n \tuint32_t max_port; /* Maximal IB device port index. */\n \tstruct mlx5_bond_info bond; /* Bonding information. */\n \tstruct mlx5_common_device *cdev; /* Backend mlx5 device. */\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex 3abb39aa92..c856d249db 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -1481,13 +1481,32 @@ flow_rxq_mark_flag_set(struct rte_eth_dev *dev)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tstruct mlx5_rxq_ctrl *rxq_ctrl;\n+\tuint16_t port_id;\n \n-\tif (priv->mark_enabled)\n+\tif (priv->sh->shared_mark_enabled)\n \t\treturn;\n-\tLIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {\n-\t\trxq_ctrl->rxq.mark = 1;\n+\tif (priv->master || priv->representor) {\n+\t\tMLX5_ETH_FOREACH_DEV(port_id, dev->device) {\n+\t\t\tstruct mlx5_priv *opriv =\n+\t\t\t\trte_eth_devices[port_id].data->dev_private;\n+\n+\t\t\tif (!opriv ||\n+\t\t\t opriv->sh != priv->sh ||\n+\t\t\t opriv->domain_id != priv->domain_id ||\n+\t\t\t opriv->mark_enabled)\n+\t\t\t\tcontinue;\n+\t\t\tLIST_FOREACH(rxq_ctrl, &opriv->rxqsctrl, next) {\n+\t\t\t\trxq_ctrl->rxq.mark = 1;\n+\t\t\t}\n+\t\t\topriv->mark_enabled = 1;\n+\t\t}\n+\t} else {\n+\t\tLIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {\n+\t\t\trxq_ctrl->rxq.mark = 1;\n+\t\t}\n+\t\tpriv->mark_enabled = 1;\n \t}\n-\tpriv->mark_enabled = 1;\n+\tpriv->sh->shared_mark_enabled = 1;\n }\n \n /**\n@@ -1623,6 +1642,7 @@ flow_rxq_flags_clear(struct rte_eth_dev *dev)\n \t\trxq->ctrl->rxq.tunnel = 0;\n \t}\n \tpriv->mark_enabled = 0;\n+\tpriv->sh->shared_mark_enabled = 0;\n }\n \n /**\n", "prefixes": [ "06/27" ] }